JPH0350202U - - Google Patents
Info
- Publication number
- JPH0350202U JPH0350202U JP11019889U JP11019889U JPH0350202U JP H0350202 U JPH0350202 U JP H0350202U JP 11019889 U JP11019889 U JP 11019889U JP 11019889 U JP11019889 U JP 11019889U JP H0350202 U JPH0350202 U JP H0350202U
- Authority
- JP
- Japan
- Prior art keywords
- control signal
- control
- signal line
- signal
- processing unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 1
Landscapes
- Hardware Redundancy (AREA)
- Feedback Control In General (AREA)
- Safety Devices In Control Systems (AREA)
Description
第１図は本考案装置の構成を示す図、第２図〜
第３図は中央処理装置のフローチヤートを示す図
、第４図は切換え指示装置の構成を示す図、第５
図は二重系指示装置と本考案装置の組合せ方を示
す図である。
１……中央処理装置（ＣＰＵ）、２……制御信
号切換え指示装置、３……No.１システム制御入
力装置、４……No.２システム制御入力装置、５
……制御信号切換え装置、６……プリンタ、７…
…No.１システムＣＰＵ信号線、８……No.２シス
テムＣＰＵ信号線、９……No.１システムＰＩＯ
信号線、１０……No.２システムＰＩＯ信号線、
１１……No.１システムマスター信号線、１２…
…No.２システムマスター信号線、１３……制御
信号入力用端子盤、１４……制御信号出力用端子
盤、１５１……No.１システムの中央処理装置、
１５２……No.２システムの中央処理装置、１５
３……No.１システムの制御信号出力装置、１５
４……No.２システムの制御信号出力装置、１５
５……キーボード、１５６……印字装置、１５７
……表示装置。
Figure 1 is a diagram showing the configuration of the device of the present invention, Figures 2-
FIG. 3 is a flowchart of the central processing unit, FIG. 4 is a diagram showing the configuration of the switching instruction device, and FIG.
The figure shows how to combine the dual system indicating device and the device of the present invention. 1... Central processing unit (CPU), 2... Control signal switching instruction device, 3... No. 1 system control input device, 4... No. 2 system control input device, 5
...Control signal switching device, 6...Printer, 7...
...No.1 system CPU signal line, 8...No.2 system CPU signal line, 9...No.1 system PIO
Signal line, 10...No.2 system PIO signal line,
11...No.1 system master signal line, 12...
...No.2 system master signal line, 13...Terminal board for control signal input, 14...Terminal board for control signal output, 151...Central processing unit of No.1 system,
152...Central processing unit of No. 2 system, 15
3...No.1 system control signal output device, 15
4...No.2 system control signal output device, 15
5...Keyboard, 156...Printing device, 157
...Display device.
Claims (1)
制御系を有する制御装置の切換え装置において、
中央処理装置１と、制御信号切換え指示装置２と
、No.１システム制御入力装置３及びNo.２システ
ム制御入力装置４と、制御信号切換え装置５と、
No.１システムＣＰＵ信号線７及びNo.２システム
ＣＰＵ信号線８と、No.１システムＰＩＯ信号線
９とNo.２システムＰＩＯ信号線１０と、No.１シ
ステムマスター信号線１１及びNo.２システムマ
スター信号線１２と、制御信号入力用端子盤１３
と、制御信号出力用端子盤１４からなり、前記No
.１システム制御入力装置３は制御信号入力用端
子盤１３を経由して入力したNo.１システムの制
御信号を中央処理装置１へ出力し、前記No.２シ
ステム制御入力装置４は制御信号入力用端子盤１
３を経由して入力したNo.２システムの制御信号
を中央処理装置１へ出力し、前記中央処理装置１
は、No.１システムマスター信号線１１またはNo.
２システムマスター信号線１２により、切換えに
より使用する制御システムの中央処理装置１５１
または１５２にマスターであることを知らせると
ともに、No.１システムＣＰＵ信号線７によりNo.
１システムＣＰＵの状態を、No.２システムＣＰ
Ｕ８によりNo.２システムＣＰＵの状態を確認し
、No.１システムＰＩＯ信号線９によりNo.１シス
テムＰＩＯの状態を、No.２システムＰＩＯ信号
線１０によりNo.２システムＰＩＯの状態を確認
し、切換え指示装置２からの指示に従がい制御信
号切換え装置５に切換え信号を出力し、前記制御
信号切換え装置５は中央処理装置１からの切換え
信号に従がい、No.１システムの制御信号またはN
o.２システムの制御信号を制御信号出力用端子盤
１４に出力することを特徴とする制御信号切換装
置。 In a switching device for a control device having two control systems each including a central processing unit and an input/output processing unit,
A central processing unit 1, a control signal switching instruction device 2, a No. 1 system control input device 3, a No. 2 system control input device 4, a control signal switching device 5,
No. 1 system CPU signal line 7, No. 2 system CPU signal line 8, No. 1 system PIO signal line 9, No. 2 system PIO signal line 10, No. 1 system master signal line 11 and No. 2 System master signal line 12 and control signal input terminal board 13
and a terminal board 14 for control signal output.
.1 system control input device 3 outputs the control signal of the No. 1 system input via the control signal input terminal board 13 to the central processing unit 1, and the No. 2 system control input device 4 inputs the control signal. terminal board 1
3, the control signal of the No. 2 system is output to the central processing unit 1, and the central processing unit 1
is No. 1 system master signal line 11 or No.
2 system master signal line 12, the central processing unit 151 of the control system to be used is switched.
Alternatively, the No. 1 system CPU signal line 7 is used to notify the No. 152 that it is the master.
The status of No. 1 system CPU is changed to No. 2 system CPU.
Check the status of the No. 2 system CPU using U8, the status of the No. 1 system PIO using the No. 1 system PIO signal line 9, and the status of the No. 2 system PIO using the No. 2 system PIO signal line 10. , outputs a switching signal to the control signal switching device 5 in accordance with the instruction from the switching instruction device 2, and the control signal switching device 5 follows the switching signal from the central processing unit 1, and outputs a switching signal to the control signal of the No. 1 system or N
A control signal switching device characterized in that the control signal of the o.2 system is output to a control signal output terminal board 14.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11019889U JPH0350202U (en) | 1989-09-20 | 1989-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11019889U JPH0350202U (en) | 1989-09-20 | 1989-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0350202U true JPH0350202U (en) | 1991-05-16 |
Family
ID=31658747
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11019889U Pending JPH0350202U (en) | 1989-09-20 | 1989-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0350202U (en) |
-
1989
- 1989-09-20 JP JP11019889U patent/JPH0350202U/ja active Pending