JPH0350252U - - Google Patents
Info
- Publication number
- JPH0350252U JPH0350252U JP11023689U JP11023689U JPH0350252U JP H0350252 U JPH0350252 U JP H0350252U JP 11023689 U JP11023689 U JP 11023689U JP 11023689 U JP11023689 U JP 11023689U JP H0350252 U JPH0350252 U JP H0350252U
- Authority
- JP
- Japan
- Prior art keywords
- standby time
- avoidance
- microcomputer
- circuit
- reset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Description
第１図は、本考案の実施例を示す回路図、第２
図及び第３図は、第１図の動作を示すタイミング
チヤートである。
４……回避信号作成回路、１３……待機時間回
避回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG.
3 and 3 are timing charts showing the operation of FIG. 1. 4...Avoidance signal generation circuit, 13...Waiting time avoidance circuit.
Claims (1)
安定用の待機時間を設けて成るマイクロコンピユ
ータにおいて、 前記マイクロコンピユータのリセツト時、制御
信号に基づいて、前記待機時間を回避するための
回避信号を作成する回避信号作成回路と、 前記回避信号作成回路から得られた回避信号に
基づいて、マイクロコンピユータのリセツト解除
から動作開始までの待機時間を回避させる待機時
間回路と、 を備えたことを特徴とするマイクロコンピユー
タの待機時間制御回路。 (2) 前記制御信号に基づいて、前記待機時間の
回避・非回避の切り換え制御を行なうことを特徴
とする請求項(1)記載のマイクロコンピユータの
待機時間制御回路。[Claims for Utility Model Registration] (1) In a microcomputer that provides a standby time for oscillation stabilization between the release of reset and the start of operation, when the microcomputer is reset, the standby time is determined based on a control signal. an avoidance signal generation circuit that generates an avoidance signal for avoiding the above-mentioned avoidance signal generation circuit; and a standby time circuit that avoids the wait time from the reset cancellation of the microcomputer to the start of operation based on the avoidance signal obtained from the avoidance signal generation circuit. A standby time control circuit for a microcomputer, characterized in that it is equipped with the following. (2) The standby time control circuit for a microcomputer according to claim (1), wherein switching control between avoidance and non-avoidance of the standby time is performed based on the control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11023689U JPH0350252U (en) | 1989-09-19 | 1989-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11023689U JPH0350252U (en) | 1989-09-19 | 1989-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0350252U true JPH0350252U (en) | 1991-05-16 |
Family
ID=31658784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11023689U Pending JPH0350252U (en) | 1989-09-19 | 1989-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0350252U (en) |
-
1989
- 1989-09-19 JP JP11023689U patent/JPH0350252U/ja active Pending