JPH0350885A - Buried semiconductor optical element - Google Patents

Buried semiconductor optical element

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Publication number
JPH0350885A
JPH0350885A JP18769789A JP18769789A JPH0350885A JP H0350885 A JPH0350885 A JP H0350885A JP 18769789 A JP18769789 A JP 18769789A JP 18769789 A JP18769789 A JP 18769789A JP H0350885 A JPH0350885 A JP H0350885A
Authority
JP
Japan
Prior art keywords
layer
semiconductor
buried
inp
core layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18769789A
Other languages
Japanese (ja)
Inventor
Jitsujiyun Kuruma
車 日▲じゅん▼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18769789A priority Critical patent/JPH0350885A/en
Publication of JPH0350885A publication Critical patent/JPH0350885A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent a waveguide loss to be caused when an active layer is melted back from a transverse direction by a method wherein an antimeltback layer whose band gap is smaller that that of a core layer and is larger than that of a semiconductor buried layer is formed between the core layer and the semiconductor buried layer. CONSTITUTION:Au undoped InGaAsP active layer 2 with a wavelength composition of 1.54mum, an undoped InGaAsP antimeltback layer 3 with a wavelength composition of 1.3mum and a p-InP clad layer 4 are crystal-grown on the surface of an n-InP substrate 1 by an LPE growth method; after that, two grooves 12, 13 and a mesa stripe 14 1.0mum wide which is sandwiched between them are formed in the orientation [110]. Then, a p-InGaAsP AMB layer 5 with a wavelength composition of 1.3mum, a p-InP current-blocking layer 6 and an n-InP current-blocking layer 7 are crystal-grown on a semiconductor multilayer crystal excluding the upper part of the mesa stripe 14, and a p-InP buried layer 8 and a p<+> InGaAsP contact layer 9 with a wavelength composition of 1.2mum are crystal-grown on the whole surface by the LPE growth method. By using a buried semiconductor optical element manufactured in this manner, a waveguide loss can be reduced by about 10% as compared with conventional optical elements.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はコア層(活性層)が横方向からメルトバツクさ
れることによって発生する導波路損失のない埋め込み型
半導体光素子に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a buried semiconductor optical device without waveguide loss caused by lateral meltback of a core layer (active layer).

(従来の技術) 埋め込み型半導体レーザや半導体光増幅器、半導体光導
波路に代表される埋め込み型半導体光素子は、近年ます
ます重要になりつつある。この種埋め込み型光素子の構
造の一例が、例えば、昭和57年度、電子通信学会総合
全国大会光および量子エレクトロニクスAの予稿集85
7頁に記載されている。その構造は、第2図に示すよう
な二重チャンネル形プレナー埋め込み構造(Doubl
e  Channel  Planar  Burie
d  Heterostructure、以後DC−P
BH構造と略して記す)を有する4本横遣では、n−I
nP基板1上にノンドープ I nGaAsP活性層2、アンチメルトバック(AM
B)層3、p−InPクラッド層4を設け、メサストラ
イプ14を形成し、更に、その上にp−1np電流ブロ
ック層6、n−InP電流ブロック層7、p−InP埋
め込み層8、p” −1nGaAsPコンタクト層9を
形成している0図中、10と11は電極を12.13は
清を示す。
(Prior Art) In recent years, embedded semiconductor optical devices such as embedded semiconductor lasers, semiconductor optical amplifiers, and semiconductor optical waveguides have become increasingly important. An example of the structure of this type of embedded optical device is, for example, in 1985, Proceedings of the Institute of Electronics and Communication Engineers General National Conference on Optical and Quantum Electronics A, 85
It is described on page 7. Its structure is a double channel planar embedded structure (Double) as shown in Figure 2.
e Channel Planar Burie
d Heterostructure, hereinafter referred to as DC-P
In a four-wire horizontal structure with a BH structure (abbreviated as BH structure), n-I
On an nP substrate 1, a non-doped InGaAsP active layer 2 and an anti-meltback (AM
B) A layer 3, a p-InP cladding layer 4 are provided to form a mesa stripe 14, and furthermore, a p-1np current blocking layer 6, an n-InP current blocking layer 7, a p-InP buried layer 8, a p-InP In the figure showing the formation of the -1nGaAsP contact layer 9, 10 and 11 are electrodes, and 12 and 13 are electrodes.

このように従来の構造は、pnpn電流ブロック機構を
内部に有するため、ストライプ状になった活性領域への
電流集中度がよく、その結果、この構造を用いた半導体
レーザは発振波長1.3μm帯において、発振しきい値
15〜20mA、光出力50mW以上、最高動作温度1
20℃以上など、優れた特性を有する。また、この構造
を用いた半導体光増幅器においては、活性層への電流注
入効率がよいことから、25dB以上の信号利得が得ら
れている。
As described above, since the conventional structure has a pnpn current blocking mechanism inside, the degree of current concentration in the striped active region is good, and as a result, a semiconductor laser using this structure has an oscillation wavelength of 1.3 μm. , oscillation threshold 15-20mA, optical output 50mW or more, maximum operating temperature 1
It has excellent properties such as a temperature of 20°C or higher. Further, in a semiconductor optical amplifier using this structure, a signal gain of 25 dB or more is obtained because the efficiency of current injection into the active layer is high.

(発明が解決しようとする課題) しかしながら、上述の従来の埋め込み型半導体光素子を
液相エピタキシャル(LPE)成長法を用いて作製する
場合、活性層(以下、発光素子を一例として取り上げ、
説明するので、コア層を活性層と呼ぶことにする)の上
にクラッド層を成長する前に、アンチメルトバック層を
成長することによって活性層の上からのメルトバックは
防止しているが、第2図に示したように埋め込み成長時
にコア層が横方向からメルトバックされ、それによって
導波路損失が増大し、また、導波路の作製精度も悪くな
る傾向にあった。
(Problem to be Solved by the Invention) However, when manufacturing the above-mentioned conventional buried semiconductor optical device using a liquid phase epitaxial (LPE) growth method, the active layer (hereinafter, a light emitting device is taken as an example),
For the purpose of explanation, meltback from above the active layer is prevented by growing an anti-meltback layer before growing the cladding layer on the core layer (the core layer will be referred to as the active layer). As shown in FIG. 2, the core layer was melted back in the lateral direction during buried growth, which increased waveguide loss and also tended to deteriorate waveguide fabrication accuracy.

このような点で従来の埋め込み型半導体光素子には解決
すべき課題があった。特に、InPにほぼ格子整合した
I n+−x Gag Asy P+−yを活性層とし
て用いる場合、アプライドフィジックスレター(App
 1.Phys、Lett、)。
In this respect, conventional embedded semiconductor optical devices have problems to be solved. In particular, when using I n+-x Gag Asy P+-y, which is almost lattice-matched to InP, as the active layer, Applied Physics Letters (App
1. Phys, Lett,).

32 (4)、234 (1978)に記載されている
ように、活性層波長組成を1゜4μm以上に長波長化す
ると、活性層はInメルトによってメルトバックを受は
易くなり、活性層を厚くした場合にこの横方向からのメ
ルトバックは顕著となる。
32 (4), 234 (1978), when the wavelength composition of the active layer is made longer than 1°4 μm, the active layer becomes more susceptible to meltback due to In melt, and the active layer becomes thicker. In this case, the meltback from the lateral direction becomes noticeable.

更に、埋め込み型半導体光素子として半導体光増幅器を
考えると、増幅利得の入力光開光依存性を極力抑えるた
め、活性層の断面形状を正方形に近付けるなどの方策を
とる必要があるが、この場合、作製技術の観点から、活
性層厚を0.2〜0,4μm程度に厚くする必要がある
。従って、活性層は、横方向からのメルトバックを受は
易くなる。
Furthermore, when considering a semiconductor optical amplifier as an embedded semiconductor optical device, it is necessary to take measures such as making the cross-sectional shape of the active layer close to a square in order to suppress the dependence of the amplification gain on the input light opening as much as possible. From the viewpoint of manufacturing technology, it is necessary to increase the active layer thickness to about 0.2 to 0.4 μm. Therefore, the active layer is more susceptible to meltback from the lateral direction.

本発明の目的は、活性層が横方向からメルトバックされ
ることによって発生する導波路損失のない埋め込み型半
導体光素子を提供することにある。
An object of the present invention is to provide a buried semiconductor optical device that is free from waveguide loss caused by lateral meltback of the active layer.

(課題を解決するための手段) 前述の課題を解決するため本発明の埋め込み型半導体光
素子は、光の導波、発光、増幅またはその組合わせの機
能を有する少なくとも1つの半導体層によって構成され
たコア層と、該コア層を上下方向に挟み、前記コア層よ
り大きなバンドギャップエネルギーを有する2つの半導
体クラッド層と、前記コア層を横方向に挟み前記コア層
よりも大きなバンドギャップエネルギーを有する2つの
半導体埋め込み層とを備えるストライプ構造を有する埋
め込み型半導体光素子において、前記コア層と前記半導
体埋め込み層との間に、前記コア層よりも小さく前記半
導体埋め込み層よりも大きなバンドギャップを有するア
ンチメルトバック層が設けられている。
(Means for Solving the Problems) In order to solve the above-mentioned problems, an embedded semiconductor optical device of the present invention is composed of at least one semiconductor layer having the functions of light waveguide, light emission, amplification, or a combination thereof. two semiconductor cladding layers that sandwich the core layer in the vertical direction and have a larger band gap energy than the core layer; and two semiconductor cladding layers that sandwich the core layer in the horizontal direction and have a larger band gap energy than the core layer. In a buried type semiconductor optical device having a striped structure including two semiconductor buried layers, an anti-semiconductor optical device having a band gap smaller than the core layer and larger than the semiconductor buried layer is provided between the core layer and the semiconductor buried layer. A meltback layer is provided.

(作用) 上述の通り、本発明ではコア層と半導体埋め込み層との
間にアンチメルトバック層を設けているので、前述のメ
ルトバックを防止できる。
(Function) As described above, in the present invention, since the anti-meltback layer is provided between the core layer and the semiconductor buried layer, the above-mentioned meltback can be prevented.

I EEEジャーナルオプカンタムエレクトロニクス(
IEEE  J、of  QuantumElectr
on、QE−17,635(1981))に記載されて
いるようにInPにほぼ格子整合した波長組成1.4μ
m以上のIn+−えGag Asアp、−、を活性層と
して用いる場合、アンチメルトバック層としては波長組
成1.3.czm以上のI n l −X G a K
 A S y P +−yを用いる必要がある。従って
、この材料系においては、波長組成1.3〜1−4 )
t m I n r−x G a zA S y P 
l−yをアンチメルトバック層として用いることによっ
て、活性層のメルトバックを防止できる。
I EEE Journal Opquantum Electronics (
IEEE J, of Quantum Electr.
On, QE-17, 635 (1981)
When In+-eGagAsap,-, having a wavelength of 1.3 or more is used as an active layer, the anti-meltback layer has a wavelength composition of 1.3. I n l −X G a K over czm
It is necessary to use A S y P +-y. Therefore, in this material system, the wavelength composition is 1.3 to 1-4)
t m I n r-x G a z A S y P
By using ly as an anti-meltback layer, meltback of the active layer can be prevented.

(実施例) 次に本発明について図面を参照しながら説明する。(Example) Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例である1、5μm帯InGa
AsP  DC−PBHtJ造半導体レーザの断面図で
ある。
Figure 1 shows a 1.5 μm band InGa film according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view of an AsP DC-PBHtJ semiconductor laser.

先ず、本構造を得るための作製法を以下に述べる。First, the manufacturing method for obtaining this structure will be described below.

n−InP基板1の上面に、波長組成1.54μmのノ
ンドープInGaAsP活性層2、波長組成1.3u、
mのノンドープInGaAsPアンチメルトバック層(
AMB層)3、ρ−InPクラヅド層4をLPE成長法
によりそれぞれ厚さ0.1μm、0.01μm、1μm
となるように順次結晶成長した後、[110]方向に、
深さ1.5μm、幅4μmの2本の湧12,13とそれ
によって挟まれる幅1,0μmのメサストライプ14を
形成する。
On the upper surface of the n-InP substrate 1, a non-doped InGaAsP active layer 2 with a wavelength composition of 1.54 μm, a wavelength composition of 1.3u,
m non-doped InGaAsP anti-meltback layer (
AMB layer) 3 and ρ-InP cladding layer 4 were grown to thicknesses of 0.1 μm, 0.01 μm, and 1 μm, respectively, by the LPE growth method.
After successive crystal growth in the [110] direction,
Two springs 12 and 13 with a depth of 1.5 μm and a width of 4 μm and a mesa stripe 14 with a width of 1.0 μm sandwiched between them are formed.

次に、上記半導体多層結晶の上にメサストライプ14の
上部を除いて、波長組成1.3μmのp−InGaAs
P   AMB層5、p   I  n P 電流ブロ
ック層6、n−1nP電流ブロック層7を、そして全面
にp−InP埋め込み層8、波長組成1.2μmのp”
−I nGaAs Pコンタクト層9をそれぞれ、平坦
部での厚さが0.01μm、1μm、0.5μm、6μ
m、0.5μmとなるように順次LPE成長法により結
晶成長する。
Next, p-InGaAs with a wavelength composition of 1.3 μm was placed on the semiconductor multilayer crystal except for the upper part of the mesa stripe 14.
A P AMB layer 5, a p I n P current blocking layer 6, an n-1nP current blocking layer 7, a p-InP buried layer 8 on the entire surface, and a p'' with a wavelength composition of 1.2 μm.
-I nGaAs P contact layer 9 has a thickness of 0.01 μm, 1 μm, 0.5 μm, and 6 μm at the flat portion, respectively.
Crystals are sequentially grown by the LPE growth method so as to have a thickness of 0.5 μm and 0.5 μm.

さらに、p側にCr / A uからなる電極10を、
n−1nP基板1の下にAuGeNiからなる電極11
を形成する。
Furthermore, an electrode 10 made of Cr/Au is placed on the p side.
An electrode 11 made of AuGeNi is provided under the n-1nP substrate 1.
form.

このようにして作製した埋め込み型半導体光素子による
と、導波路損失を従来の半導体光素子に比較して10%
程度低減できる。また、前述の半導体光素子と同様な方
法で、活性層を横方向からメルトバックさせることなく
、活性層厚が0.25μm程度と厚く、メサ幅が0.4
μm程度と狭い素子を作製し、両端面に無反射コーティ
ングを行うことで、信号利得30dB、TE−7M利得
差1dB以下の良好な半導体光増幅器を作製できる。
According to the embedded semiconductor optical device manufactured in this way, the waveguide loss is 10% lower than that of conventional semiconductor optical devices.
The degree can be reduced. In addition, by using a method similar to that of the semiconductor optical device described above, the active layer is as thick as about 0.25 μm, and the mesa width is 0.4 μm, without causing the active layer to melt back from the lateral direction.
By fabricating an element as narrow as about μm and applying anti-reflection coating to both end faces, it is possible to fabricate a good semiconductor optical amplifier with a signal gain of 30 dB and a TE-7M gain difference of 1 dB or less.

上述実施例において、埋め込み層は導電型の異なる複数
の半導体層または高抵抗半導体層でW4成され得るし、
上記活性層およびアンチメルトバック層がInPにほぼ
格子整合したIn+−tGaxA S y P l−y
からなり、上記アンチメルトバック層の波長組成が室温
で1.3μm以上であることも好ましい例である。
In the above embodiments, the buried layer may be formed of a plurality of semiconductor layers of different conductivity types or a high resistance semiconductor layer, and
In+-tGaxA S y P ly-y in which the active layer and anti-meltback layer are almost lattice-matched to InP
It is also a preferable example that the wavelength composition of the anti-meltback layer is 1.3 μm or more at room temperature.

更に、上記実施例においては、DC−PBH構造を用い
て作製した能動的な半導体光素子(半導体レーザや半導
体光増幅器)についての例を説明したが、池の構造、例
えばBHm造などを用いて構成しても良く、また受動的
な光導波路の場合にも本発明を適用できることは明らか
である。また、用いる半導体材料らInP系に限るもの
ではない。
Furthermore, in the above embodiment, an example of an active semiconductor optical device (semiconductor laser or semiconductor optical amplifier) fabricated using a DC-PBH structure was explained, but it is also possible to fabricate an active semiconductor optical device (semiconductor laser or semiconductor optical amplifier) using a pond structure, such as a BHm structure. It is clear that the present invention can also be applied to passive optical waveguides. Furthermore, the semiconductor material used is not limited to InP-based materials.

さらに、コア層として、単層の半導体層をもつ光半導体
素子の例を説明したが、超格子などの多層半導体層をコ
ア層としてもつ素子に対しても有効である。
Furthermore, although an example of an optical semiconductor device having a single semiconductor layer as a core layer has been described, the present invention is also effective for devices having a multilayer semiconductor layer such as a superlattice as a core layer.

(発明の効果) 以上説明したように、コア層が横方向からメルトバック
されることによって発生ずる導波路損失のない埋め込み
型半導体光素子を提供することができ、有用である。
(Effects of the Invention) As described above, it is possible to provide a buried semiconductor optical device without waveguide loss caused by the core layer being laterally melted back, which is useful.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すり、C−PBHW4造
半導体レーザの断面図、第2図は従来例を示すDC−P
B)(構造半導体レーザの断面図である。 1−n−InP基板、2・・・ノンドープI nGaA
sP活性層、3・・・アンチメルトバック層、1−p 
 InPクラッド層、5−p  InGaAsPアンチ
メルトバック層、6・・・p−1nP電流ブロック層、
7・・・n−InP電流ブロック層、8=−p−InP
埋め込み層、9・=p” −I nGaAsPコンタク
ト層、10 、11 ・=電Wi、12゜13・・・清
、14・・・メサストライプ、15・・・活性層がメル
トバックされる方向。
FIG. 1 shows an embodiment of the present invention, and is a sectional view of a C-PBHW4 semiconductor laser, and FIG. 2 shows a conventional example of a DC-PHW semiconductor laser.
B) (It is a cross-sectional view of a structured semiconductor laser. 1-n-InP substrate, 2... non-doped InGaA
sP active layer, 3... anti-meltback layer, 1-p
InP cladding layer, 5-p InGaAsP anti-meltback layer, 6...p-1nP current blocking layer,
7...n-InP current blocking layer, 8=-p-InP
Buried layer, 9.=p"-InGaAsP contact layer, 10, 11.=Electrical Wi, 12°13... Clear, 14... Mesa stripe, 15... Direction in which the active layer is melted back.

Claims (1)

【特許請求の範囲】[Claims] 光の導波、発光、増幅またはその組合わせの機能を有す
る少なくとも1つの半導体層によって構成されたコア層
と、該コア層を上下方向に挟み、前記コア層より大きな
バンドギャップエネルギーを有する2つの半導体クラッ
ド層と、前記コア層を横方向に挟み前記コア層よりも大
きなバンドギャップエネルギーを有する2つの半導体埋
め込み層とを備えるストライプ構造を有する埋め込み型
半導体光素子において、前記コア層と前記半導体埋め込
み層との間に、前記コア層よりも小さく前記半導体埋め
込み層よりも大きなバンドギャップを有するアンチメル
トバック層が設けられていることを特徴とする埋め込み
型半導体光素子。
A core layer composed of at least one semiconductor layer having the functions of light waveguide, light emission, amplification, or a combination thereof, and two semiconductor layers sandwiching the core layer in the vertical direction and having a larger band gap energy than the core layer. In a buried type semiconductor optical device having a stripe structure comprising a semiconductor cladding layer and two semiconductor buried layers that sandwich the core layer in the lateral direction and have a larger bandgap energy than the core layer, the core layer and the semiconductor buried 1. An embedded semiconductor optical device, further comprising an anti-meltback layer having a smaller bandgap than the core layer and a larger band gap than the semiconductor buried layer.
JP18769789A 1989-07-19 1989-07-19 Buried semiconductor optical element Pending JPH0350885A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18769789A JPH0350885A (en) 1989-07-19 1989-07-19 Buried semiconductor optical element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18769789A JPH0350885A (en) 1989-07-19 1989-07-19 Buried semiconductor optical element

Publications (1)

Publication Number Publication Date
JPH0350885A true JPH0350885A (en) 1991-03-05

Family

ID=16210569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18769789A Pending JPH0350885A (en) 1989-07-19 1989-07-19 Buried semiconductor optical element

Country Status (1)

Country Link
JP (1) JPH0350885A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002037306A (en) * 2000-07-27 2002-02-06 Japan Crown Cork Co Ltd Resin cap for carbonated beverage vessel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002037306A (en) * 2000-07-27 2002-02-06 Japan Crown Cork Co Ltd Resin cap for carbonated beverage vessel

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