JPH0351567U - - Google Patents

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Publication number
JPH0351567U
JPH0351567U JP11093689U JP11093689U JPH0351567U JP H0351567 U JPH0351567 U JP H0351567U JP 11093689 U JP11093689 U JP 11093689U JP 11093689 U JP11093689 U JP 11093689U JP H0351567 U JPH0351567 U JP H0351567U
Authority
JP
Japan
Prior art keywords
video
video signal
basic
signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11093689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11093689U priority Critical patent/JPH0351567U/ja
Publication of JPH0351567U publication Critical patent/JPH0351567U/ja
Pending legal-status Critical Current

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  • Studio Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この考案の一実施例を示す多チヤン
ネル映像の重ね合わせ装置のブロツク図、第2図
A〜Eは第1図の実施例において、重ね合わせる
べきVTR画像の生成を説明するための波形図、
第3図AおよびBは第1図の実施例における重ね
合わせのための走査線および映像例を示す図であ
る。 1……TV、2,4……バツフアアンプ、3…
…VTR、5……同期信号抽出回路、6……可変
遅延回路、7……同期信号削除回路、8……加算
器、9……切替スイツチ、10……切替信号発生
回路。
Fig. 1 is a block diagram of a multi-channel video superimposition device showing one embodiment of this invention, and Figs. 2 A to E are for explaining the generation of VTR images to be superimposed in the embodiment of Fig. 1. waveform diagram,
3A and 3B are diagrams illustrating scan lines and image examples for superimposition in the embodiment of FIG. 1. 1...TV, 2, 4...Buffer amplifier, 3...
...VTR, 5...Synchronizing signal extraction circuit, 6...Variable delay circuit, 7...Synchronizing signal deletion circuit, 8...Adder, 9...Switching switch, 10...Switching signal generating circuit.

Claims (1)

【実用新案登録請求の範囲】 テレビジヨン映像信号やビデオテープレコーダ
ー映像信号から成る複数の映像信号のうち基本と
なる映像信号から基本同期信号を抽出する抽出回
路と、 前記基本同期信号により同期がとられた前記基
本となる映像信号以外の他の映像信号を所定時間
遅延する可変遅延回路と、 前記可変遅延回路で遅延された前記他の映像信
号から同期信号を削除する削除回路と、 前記削除回路により削除された前記他の映像信
号の同期信号の代わりに前記基本同期信号を挿入
する挿入回路と、 前記複数の映像信号が供給される複数の入力端
子を有し、前記抽出回路により抽出された基本同
期信号のうち基本垂直同期信号に基づいて前記複
数の入力端子に供給される映像信号を順次時系列
的に選択出力する切替スイツチと、 を備えて成ることを特徴とする多チヤンネル映像
重ね合わせ装置。
[Claims for Utility Model Registration] An extraction circuit for extracting a basic synchronization signal from a basic video signal among a plurality of video signals including a television video signal and a video tape recorder video signal; a variable delay circuit that delays a video signal other than the basic video signal that has been transmitted for a predetermined time; a deletion circuit that deletes a synchronization signal from the other video signal delayed by the variable delay circuit; and the deletion circuit. an insertion circuit that inserts the basic synchronization signal in place of the synchronization signal of the other video signal deleted by the video signal; and a plurality of input terminals to which the plurality of video signals extracted by the extraction circuit are provided. a changeover switch that selectively outputs video signals supplied to the plurality of input terminals in a time-series manner based on a basic vertical synchronization signal among the basic synchronization signals; and a multi-channel video superimposition characterized by comprising: Device.
JP11093689U 1989-09-25 1989-09-25 Pending JPH0351567U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11093689U JPH0351567U (en) 1989-09-25 1989-09-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11093689U JPH0351567U (en) 1989-09-25 1989-09-25

Publications (1)

Publication Number Publication Date
JPH0351567U true JPH0351567U (en) 1991-05-20

Family

ID=31659440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11093689U Pending JPH0351567U (en) 1989-09-25 1989-09-25

Country Status (1)

Country Link
JP (1) JPH0351567U (en)

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