JPH0351712Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] The present invention solves problems such as flow rate pulse transmission failure in a flow rate integration system that integrates flow rate pulses and transfers a predetermined flow rate during fluid reception, shipping, etc. The present invention relates to a flow rate pulse integration error prevention system that prevents integration errors caused by flow rate pulses.

[Prior Art] When charging or dispensing a predetermined flow rate, it is usually done as follows.

First, the flow rate to be measured is set in advance in the batch counter that functions as a control section, and the start button is pressed. As a result, the flow path is opened by the on-off valve, and the fluid flows. The fluid is metered by a flow meter disposed in the flow path. Metering is performed by counting and integrating the flow rate pulses emitted from the flow meter. When the integrated value reaches the set amount above,
The batch counter issues a valve close signal, which closes the flow path.

The basic principle of these batch counters is that the flow rate pulse is transmitted completely in proportion to the flow rate. However, if the flow rate transmission pulses are stopped due to a defect in the transmitter itself, the transmission line, etc., the flow is still present but not counted, and the valve cannot be closed, which may lead to serious accidents such as overflow.

Regarding this issue, the applicant has proposed patent no. 1103774.
In this issue, we proposed an "alarm device for flow rate oscillators." This alarm device issues an alarm when the flow rate pulse, which is transmitted in proportion to the flow rate, stops while the fluid is flowing, or when the flow rate pulse is transmitted intermittently. The principle is as follows.

That is, a switch that closes for a short time every time a flow pulse arrives is connected in parallel with the integral feedback capacitor of the integral calculation circuit that receives the DC power as input, and discharges the charge in the integral capacitor. Since this discharge time is extremely short compared to the flow rate pulse interval, the integrating circuit is activated immediately and a voltage proportional to time is output. Compare the reference voltage determined based on the flow rate pulse frequency with the above integral output voltage, and if the integral output voltage exceeds the reference voltage,
If the flow rate pulse does not arrive within a predetermined time, it is determined that there is an abnormality and an alarm is issued.

[Problems to be solved by the invention] In the conventional example described above, the integrated output voltage is
High when the flow rate pulse frequency is low in the low flow area,
It becomes low when the flow rate pulse frequency is high in the high flow area, and the waveform is sawtooth. This voltage ratio has a value equal to the flow rate range. Therefore, when the flow rate range is widened, the voltage ratio increases, and if the flow rate range of a normal flowmeter is 1:10, then the voltage ratio will be 1/10 at the maximum flow rate.
The voltage will be . Therefore, if the comparison voltage is set to a constant value, even if there are several missing pulses, if the time is shorter than the interval between flow rate pulses in the low flow rate region, no alarm will be issued.

On the other hand, the comparison voltage can be changed depending on the flow rate range. However, unless the number of voltage stages is increased, the same problem will remain, resulting in an increase in the number of components in the circuit configuration.

The present invention was developed to solve the above problems, and even when the flow rate range is wide, it is possible to reliably detect abnormalities due to non-arrival of pulses, and to detect flow rate pulses without abnormalities when receiving or shipping fluid. The purpose of the present invention is to provide a flow rate pulse integration error prevention system that can transfer a predetermined flow rate by integrating flow rate pulses based on the flow rate integration system, and can prevent integration errors due to failure of flow pulse transmission in the flow rate integration system. do.

[Means for Solving the Problems] The present invention provides a flow control device that includes a solenoid valve and a flowmeter in a flow path, and a control unit that closes the solenoid valve based on flow rate information from the flowmeter. As a means to solve the above problem with a flow rate pulse integration error prevention system, as shown in Figure 1, two types of flow rate pulses with different levels and different phases are sent to the flow meter as flow rate information. The control unit is provided with flow rate information output means for outputting flow rate information, and the control unit is configured to output flow rate information consisting of the two types of flow rate pulses.
a flow rate pulse detection means for respectively detecting a combination of two types of flow pulses and any one type of flow pulse; pulse number difference detection means for determining the difference between 1/2 of the number of pulses of the combined flow rate pulses of the species and the number of flow rate pulses of the one type; and whether the absolute value of the pulse number difference is greater than a preset value. If the pulse number difference is larger than the set value, it is determined that there is an abnormality, and the one with the larger number of pulses is selected from the two types of flow rate pulses.
The present invention is characterized in that it is configured to include an abnormality determination means that is used as a basis for integrating the flow rate.

The flow rate information output means can be configured by, for example, comprising a flow pulse generator that outputs a high-level flow pulse and a flow pulse generator that outputs a low-level flow pulse. The flow rate information output means outputs two types of flow pulses, high and low, with their phases shifted.

The flow rate pulse detection means includes a circuit that can detect both high and low flow rate pulses, and a circuit that can detect only one of the high level flow pulses, for example. These can be realized by a comparison circuit with a low reference voltage and a comparison circuit with a high reference voltage.

The pulse number difference detection means can be configured to include, for example, a 1/2 frequency divider and an addition/subtraction counter.

[Function] The present invention configured as described above has a circuit that outputs two types of flow rate pulses, high and low, by the flow rate information output means, and has a circuit that can detect both of the two types of flow rate pulses, and a circuit that can detect only one of the two types of flow rate pulses. The circuit determines the number of pulses of the two types of flow rate pulses combined and the number of one type of pulses. Then, 1/2 of the former number of pulses is compared with the latter number of pulses, and if the absolute value of the difference is smaller than a preset value, it is determined to be normal, and if it is larger, it is determined to be abnormal. Thereby, an abnormality due to non-arrival of a pulse can be detected.

Here, the preset numerical value is set to 2 because two types of flow rate pulses are used.
That is, if the pulse number difference is 2, it can be seen that either the high or low flow rate pulse has not arrived yet.

In addition, this invention also determines whether there is an abnormality in either high or low level pulses based on the sign of the difference between 1/2 of the number of pulses of the two types of flow pulses combined and the number of pulses of one type. can do. As a result, if there is an abnormality, one of the two types of flow rate pulses with a larger number of pulses is selected as the basis for integration.

In this way, in the present invention, redundancy is increased by using two types of flow pulses with high and low levels, and if the probability of occurrence of an abnormality in each of the high and low level flow pulse generators is 1/R, This is set as (1/R) ² to reduce the probability of abnormality occurrence.

In addition, by using the above two types of pulses, it is possible to detect the presence of unarrived pulses and discover abnormalities.Moreover, in the case of an abnormality, a pulse with no abnormality can be selected from the two types of pulses, and the fluid In a flow rate integration system that integrates flow rate pulses and transfers a predetermined flow rate during receiving, shipping, etc., it is possible to prevent integration errors due to poor flow rate pulse transmission, etc.
System reliability has been greatly improved.

[Example] An example of the present invention will be described with reference to the drawings.

<Configuration of Embodiment> FIG. 2 shows the configuration of an embodiment of the flow rate pulse integration error prevention system of the present invention.

This embodiment is applied to a system that measures a certain amount of fluid by disposing a flow meter 2 and a solenoid valve 3 in a flow path 1. 201, 202 and a converter 20 that converts the signals from these so that they can be transmitted.
3, and a batch counter 10 which is connected via the converter 203 and the transmission line 304, has an output connected to the electromagnetic valve 3, and functions as a control section.
It is composed of:

The flow rate pulse transmitters 201 and 202 constitute flow rate information output means, and each is configured in the same manner as a single flow rate pulse transmitter. Furthermore, the levels of the output pulses are distinguished into high and low levels, and the output phases thereof are different by φ.

The batch counter 10 includes first and second comparison circuits 11 and 12 that constitute the flow rate pulse detection means,
A 1/2 frequency divider 13 and an arithmetic circuit 14 that constitute a pulse number difference detection means and an abnormality determination means, a display 15 that displays the accumulated flow rate, and a solenoid valve when the accumulated flow rate reaches a set value. and an operation section 16 for performing an operation to close the door.

The first and second comparison circuits 11 and 12 are both composed of operational amplifiers, and take the voltage drop across the resistor R ₁ as the input signal voltage, and use the voltage divided by the resistors R ₂ , R ₃ , and R ₄ as the corresponding input signal voltage. The reference voltages are V ₁ and V ₂ . Then, when the input signal exceeds the respective reference voltages V ₁ and V ₂ , a signal is output. This signal is shown in Figure 2.
Indicated by X and Y in FIG.

The 1/2 frequency divider 13 includes the first comparison circuit 11
A signal Z obtained by frequency-dividing the output signal Y of is output.

For example, as shown in FIG. 3, the arithmetic circuit 14 includes an oscillator 17 that oscillates a reference pulse, and a pulse having a time width necessary to detect an abnormality in the flow rate pulse emitted from the reference pulse at the minimum flow rate. a frequency divider 18 to be formed, and a gate that is opened and closed by the output of the frequency divider 18 to set a time period for respectively taking in the output X of the second comparison circuit 12 and the output Z of the 1/2 frequency divider 13. 20, 21 and the gate 2
An addition/subtraction counter 22 adds and subtracts the signals taken in from 0 and 21, and the output of the frequency divider 18 is added to 2.
A delay circuit 1 delays the signal by an open time of 0 and 21 and sends it as a reset signal to the addition/subtraction counter 22.
9, a determination circuit 23 that determines whether the absolute value of the output of the addition/subtraction counter 22 is greater than a preset value (2 in this embodiment) and outputs a corresponding determination signal; A gate 24 selects either the output X or Y-X in response to a judgment signal, and the output pulses of the gate 24 are integrated, and when a preset value is reached,
It is configured to include an integration circuit 25 that sends an end signal to the operating section 16, and an alarm device 26 that issues an alarm upon receiving a determination signal output from the determination circuit 23 as an abnormal situation.

The addition/subtraction counter 22 includes an addition terminal for cumulatively adding input pulses and a subtraction terminal for cumulatively subtracting input pulses.
Inputting the output X of the second comparison circuit 12 to the addition terminal,
The output Z of the 1/2 frequency divider 13 is input to the subtraction terminal. Further, the output of the addition/subtraction counter 22 becomes + if the number of input pulses to the addition terminal and the subtraction terminal is large, and becomes - if the number of pulses input to the latter is large. The positive and negative signs, together with the calculation result (absolute value), are sent to the discrimination circuit 23.
sent to.

The determination circuit 23 includes a determination signal output circuit (not shown) that determines whether the calculation result of the addition/subtraction counter 22 exceeds a preset value (2 in this embodiment) and outputs a determination signal; A selection signal forming circuit (not shown) outputs a selection signal for selecting which of the high-level flow pulse and the low-level flow pulse should be integrated based on the judgment signal and the positive/negative sign. Ru. For example, the judgment signal output circuit is composed of a 1-bit counter,
Further, the selection signal forming circuit is constituted by an AND gate circuit or the like.

As shown in FIG. 4, the gate 24 includes an AND gate circuit 241 that takes the logical product of the judgment signal and the output signal It is configured to include an AND gate circuit 243 that takes the AND of the signal and the above (Y-X), and an OR gate circuit 244 that takes the OR of the AND gate circuit 241 and the AND gate circuit 243.

The integration circuit 25 includes a counter that counts the output pulses from the gate 24, and a comparison circuit (both not shown) that determines whether the counted value of the counter has reached a preset value. configured.
The count value of the counter is sent to the display 15, and the determination result of the comparison circuit is sent to the operation unit 16.

<Operation of the embodiment> The operation of the embodiment configured as described above will be explained.

It is now assumed that the electromagnetic valve 3 is in an open state and fluid is flowing through the flow path 1. Flow meter 2 detects this fluid flow and sends signals to flow pulse generators 201 and 2.
02. 201,2 to flow pulse transmitter
02 outputs flow rate pulses having high level and low level peak values, these are sent to the converter 203,
As shown in Figure 5a, the wave height is at a high level.
20 mA, low level 12 mA, is formed into a pulse signal with a phase difference φ, and is sent to the batch counter 10 via the transmission line 304.

In the batch counter 10, this current pulse signal is converted into a voltage pulse having a high level of 10V and a low level of 6V, as shown in FIG. 5b, by a resistor _R1 (500Ω). Note that although this voltage pulse signal is actually waveform-shaped, it is omitted here.

The voltage pulse signal is applied to the first and second comparison circuits 1 and 1.
1 and 12. The first and second comparison circuits 11 and 12 connect a DC power supply +B to a resistor R ₂ ,
Reference voltage V ₂ formed by voltage division by R ₃ and R ₄ ,
Compare V ₁ and input voltage. Here, the reference voltage
V ₁ is set slightly lower than the voltage peak value of the low-level flow pulse, while the reference voltage V ₂ is set to be between the voltage peak value of the high-level flow pulse and the voltage peak value of the low-level flow pulse. Set it to .

In such a state, if the sequentially inputted flow rate pulses are compared with the reference voltage, if the transmission is being performed normally, the first comparison circuit 11 will output a pulse signal Y based on the flow rate pulses at both high and low levels. On the other hand, from the second comparator circuit 12,
As the pulse signal X based on the high-level flow rate pulse, one pulse is sequentially outputted at a pulse interval that is inversely proportional to the flow rate.

Next, if there is a failure in any of the flow rate pulse generators, for example, if the flow rate pulse 201 is defective, the pulse signal X will not be output and the pulse signal Y
is only one pulse. On the other hand, when the flow rate pulse generator 202 is defective, only the pulse signal X is output.

The pulse signal Y is frequency-divided by 1/2 by a 1/2 frequency divider 13 and outputted as a pulse signal Z. This pulse signal Z is inputted to the - terminal of the addition/subtraction counter via the gate 21. On the other hand, the pulse signal
It is input to the terminal as well as to the AND gate circuit 241 of the gate 24.

In the arithmetic circuit 14 shown in FIG. 3, the frequency of the reference pulse from the oscillator 17 is divided by the frequency divider 18 to form a time width corresponding to the flow rate pulse interval based on the minimum measurable flow rate. 20 and 21
A gate control signal is generated to keep the gate open for that period of time.

The addition/subtraction counter 22 adds and subtracts pulses input from the + terminal and the - terminal. The calculation result is input to the discrimination circuit 23. The difference in the number of pulses between the pulse signals X and Z passing through the gates 20 and 21 is within two pulses if normal, but exceeds two pulses if abnormal. In the latter case, the discrimination circuit 23
outputs a determination signal that notifies the alarm device 26 of an abnormality, causing the alarm device 26 to issue an alarm. This alarm is held for an appropriate time by a holding circuit (not shown).
Continuously reported.

This addition/subtraction counter 22 receives the signal from the frequency divider 18 through a delay circuit 19 through gates 20 and 21.
It is reset with a delayed signal to a point after the gate closes and before the opening of the next gate.

The determination circuit 23 selects the signal pulse X when the above-mentioned determination signal is a signal for determining abnormality, and if the output sign of the addition/subtraction counter 22 is +, and selects the signal pulse Y if the output sign is -. A signal is sent to gate 24.

Furthermore, if the determination signal is a signal that is determined to be in a normal state, the determination circuit 23 selects the signal pulse X regardless of the output sign of the addition/subtraction counter 22. However, in normal cases,
Either of or Y may be selected, but if X is selected, signal pulses based on high-level flow rate pulses will be counted, and it is considered that reliability in accuracy will be high.

When the selection signal for selecting the signal pulse X is input to the gate 24, the AND gate circuit 241 selects the signal pulse X and sends it to the integration circuit 25 via the OR gate circuit 244. On the other hand, when a selection signal for selecting the signal pulse Y is input, the AND gate circuit 243 selects the signal pulse corresponding to the low-level flow rate pulse selected by the exclusive OR gate circuit 242, and the signal pulse is outputted via the OR gate circuit 244. and sends it to the integration circuit 25.

In the integration circuit 25, a counter (not shown) counts the output pulses from the gate 24, and a comparison circuit (not shown) determines whether the counted value of the counter has reached a preset value. The count value of the counter is sent to the display 15 and displayed. Further, when the count value reaches the set value as a result of the determination in the comparison circuit, a termination signal is outputted and sent to the operation section 16, and the solenoid valve 3 is closed.

This allows a preset amount of fluid to be measured.

[Effects of the invention] As explained above, the present invention is able to reliably detect abnormalities by detecting non-arrival of pulses even when the flow rate range is wide, and allows fluids to be accepted and shipped based on flow rate pulses without abnormalities. A predetermined flow rate can be transferred by integrating the pulses as described above, which has the effect of preventing the occurrence of integration errors due to failure in sending flow rate pulses in the flow rate integration system. Therefore, a highly reliable flow rate integration system can be constructed.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of the present invention;
The figure is a circuit diagram showing the configuration of one embodiment of the present invention.
The figure is a block diagram showing the structure of the arithmetic circuit in the above embodiment, FIG. 4 is a logic circuit diagram showing the structure of the gate included in the above arithmetic circuit, and FIGS. 5a and 5b show the waveforms of signal pulses in the above embodiment. FIG. 1...Flow path, 2...Flowmeter, 3...Solenoid valve, 1
0... Batch counter, 11... First comparison circuit,
12...Second comparison circuit, 13...1/2 frequency divider, 1
4...Arithmetic circuit, 15 display, 16...operation unit,
22...Addition/subtraction counter, 23...Discrimination circuit, 2
4...Gate, 25...Integrator circuit, 201, 20
2...Flow rate transmitter.

Claims (1)

[Claims for Utility Model Registration] Flow rate pulse integration error prevention system in a flow rate control device equipped with a solenoid valve and a flow meter in a flow path, and a control section that closes the solenoid valve based on flow rate information from the flow meter. The flow meter is provided with a flow rate information output means for outputting two types of flow rate pulses with different levels and different phases as flow rate information, and the control unit is provided with a flow rate information output means that outputs two types of flow rate pulses with different levels as flow rate information, and a flow rate information outputting means that outputs two types of flow rate pulses with different levels as flow rate information, and a flow rate information outputting means that outputs two types of flow rate pulses with different levels as flow rate information. From the information,
a flow rate pulse detection means for respectively detecting a combination of two types of flow pulses and any one type of flow pulse; pulse number difference detection means for determining the difference between 1/2 of the number of pulses of the combined flow rate pulses of the species and the number of flow rate pulses of the one type; and whether the absolute value of the pulse number difference is greater than a preset value. If the pulse number difference is larger than the set value, it is determined that there is an abnormality, and the one with the larger number of pulses is selected from the two types of flow rate pulses.
What is claimed is: 1. A flow rate pulse integration error prevention system, comprising: an abnormality determination means that is used as a basis for flow rate integration.