JPH0351842U - - Google Patents
Info
- Publication number
- JPH0351842U JPH0351842U JP11307889U JP11307889U JPH0351842U JP H0351842 U JPH0351842 U JP H0351842U JP 11307889 U JP11307889 U JP 11307889U JP 11307889 U JP11307889 U JP 11307889U JP H0351842 U JPH0351842 U JP H0351842U
- Authority
- JP
- Japan
- Prior art keywords
- depressions
- view
- utility
- scope
- registration request
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案のＬＳＩの概略図である。Ａ
下面図、Ｂ 下面図中の線３の断面図、Ｃ 下面
図中の線４の断面図。 １……ＬＳＩパツケージ本体、２……凹形のピ
ン部。 第２図はソケツトの概略図である。Ａ 上面図
、Ｂ 上面図中の線７の断面図、Ｃ 上面図中の
線８の断面図。 ５……ソケツト本体、６……凸形の接合部。
下面図、Ｂ 下面図中の線３の断面図、Ｃ 下面
図中の線４の断面図。 １……ＬＳＩパツケージ本体、２……凹形のピ
ン部。 第２図はソケツトの概略図である。Ａ 上面図
、Ｂ 上面図中の線７の断面図、Ｃ 上面図中の
線８の断面図。 ５……ソケツト本体、６……凸形の接合部。
Claims (1)
- ＬＳＩパツケージ本体に幾つかのくぼみを設け
、そこにピンを設けたことを特徴とするＩＣパツ
ケージ。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11307889U JPH0351842U (ja) | 1989-09-26 | 1989-09-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11307889U JPH0351842U (ja) | 1989-09-26 | 1989-09-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0351842U true JPH0351842U (ja) | 1991-05-20 |
Family
ID=31661504
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11307889U Pending JPH0351842U (ja) | 1989-09-26 | 1989-09-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0351842U (ja) |
-
1989
- 1989-09-26 JP JP11307889U patent/JPH0351842U/ja active Pending