JPH0353023U - - Google Patents
Info
- Publication number
- JPH0353023U JPH0353023U JP11342189U JP11342189U JPH0353023U JP H0353023 U JPH0353023 U JP H0353023U JP 11342189 U JP11342189 U JP 11342189U JP 11342189 U JP11342189 U JP 11342189U JP H0353023 U JPH0353023 U JP H0353023U
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- circuit
- input terminal
- amplifier circuit
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図はこの考案による電子アツテネータ回路
の一実施例を示す回路図、第２図は第１図に示す
実施例における定電流回路を抵抗に置き換えた例
を示す回路図、第３図は従来の電子アツテネータ
回路の基本回路図である。
ＴＲ１〜ＴＲ１１……トランジスタ、Ｒ１〜Ｒ
１３，Ｒ１５，Ｒ２１〜Ｒ２３……抵抗、Ｄ１，
Ｄ２，Ｄ３……ダイオード、ＳＷ１，ＳＷ２，Ｓ
Ｗ１５，ＳＷ２１〜ＳＷ２３……電子スイツチ。
Fig. 1 is a circuit diagram showing an example of an electronic attenuator circuit according to this invention, Fig. 2 is a circuit diagram showing an example in which the constant current circuit in the embodiment shown in Fig. 1 is replaced with a resistor, and Fig. 3 is a conventional circuit diagram. FIG. 2 is a basic circuit diagram of an electronic attenuator circuit. TR1~TR11...transistor, R1~R
13, R15, R21-R23...Resistance, D1,
D2, D3...Diode, SW1, SW2, S
W15, SW21 to SW23...Electronic switch.
Claims (1)
する少なくとも２つの差動増幅回路を備え、 １つの前記差動増幅回路の非反転入力は入力端
が接続され、他方の前記差動増幅回路の非反転入
力は減衰用の抵抗を介して前記入力端が接続され
るとともに、 前記差動増幅回路にはそれぞれ、前記差動増幅
回路の能動状態／非能動状態への設定制御を行う
ための電子スイツチ、 を備えて成ることを特徴とする電子アツテネータ
回路。[Claims for Utility Model Registration] At least two differential amplifier circuits whose inverting inputs are connected to output terminals to form a feedback circuit are provided, the non-inverting input of one of the differential amplifier circuits is connected to the input terminal, The other non-inverting input of the differential amplifier circuit is connected to the input terminal via an attenuation resistor, and the differential amplifier circuit is connected to the active state/inactive state of the differential amplifier circuit, respectively. An electronic attenuator circuit comprising: an electronic switch for controlling the settings of the electronic attenuator circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11342189U JPH0628824Y2 (en) | 1989-09-29 | 1989-09-29 | Electronic attenuator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11342189U JPH0628824Y2 (en) | 1989-09-29 | 1989-09-29 | Electronic attenuator circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0353023U true JPH0353023U (en) | 1991-05-22 |
| JPH0628824Y2 JPH0628824Y2 (en) | 1994-08-03 |
Family
ID=31661837
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11342189U Expired - Lifetime JPH0628824Y2 (en) | 1989-09-29 | 1989-09-29 | Electronic attenuator circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0628824Y2 (en) |
-
1989
- 1989-09-29 JP JP11342189U patent/JPH0628824Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0628824Y2 (en) | 1994-08-03 |
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