JPH0353076U - - Google Patents
Info
- Publication number
- JPH0353076U JPH0353076U JP11520689U JP11520689U JPH0353076U JP H0353076 U JPH0353076 U JP H0353076U JP 11520689 U JP11520689 U JP 11520689U JP 11520689 U JP11520689 U JP 11520689U JP H0353076 U JPH0353076 U JP H0353076U
- Authority
- JP
- Japan
- Prior art keywords
- correction signal
- outputs
- afc
- adjusting
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Details Of Television Scanning (AREA)
Description
第１図は本考案に係る水平偏向回路の一実施例
を示す回路図、第２図は本考案の他の実施例を示
す回路図、第３図は従来の水平偏向回路を示す回
路図、第４図は水平偏向コイル及びＣＲＴのばら
つきによつて発生するラスタ歪を説明するための
説明図である。
３……同期偏向用ＩＣ、４……ＡＦＣ回路、５
……比較信号入力端子、７……増幅回路、８……
入力端子、９，１０……出力端子、Ｒ３〜Ｒ５…
…抵抗、ＶＲ２……可変抵抗、Ｃ７〜Ｃ９……コ
ンデンサ。
FIG. 1 is a circuit diagram showing one embodiment of a horizontal deflection circuit according to the present invention, FIG. 2 is a circuit diagram showing another embodiment of the present invention, and FIG. 3 is a circuit diagram showing a conventional horizontal deflection circuit. FIG. 4 is an explanatory diagram for explaining raster distortion caused by variations in the horizontal deflection coil and CRT. 3... Synchronous deflection IC, 4... AFC circuit, 5
...Comparison signal input terminal, 7...Amplification circuit, 8...
Input terminal, 9, 10...Output terminal, R3 to R5 ...
...Resistance, VR2 ...Variable resistance, C7 to C9 ...Capacitor.
Claims (1)
るＡＦＣ回路と、 画面の左右で非対称な水平ラスタ歪を補正する
ための垂直周期の補正信号を出力する補正信号出
力手段と、 前記補正信号の振幅レベルを調整してこの補正
信号で前記ＡＦＣ電圧を変調する振幅調整手段と
を具備したことを特徴とする水平偏向回路。[Claims for Utility Model Registration] An AFC circuit that outputs an AFC voltage to adjust the horizontal oscillation frequency, and a correction signal output means that outputs a vertical period correction signal to correct asymmetric horizontal raster distortion on the left and right sides of the screen. and amplitude adjusting means for adjusting the amplitude level of the correction signal and modulating the AFC voltage with this correction signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11520689U JPH0353076U (en) | 1989-09-28 | 1989-09-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11520689U JPH0353076U (en) | 1989-09-28 | 1989-09-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0353076U true JPH0353076U (en) | 1991-05-22 |
Family
ID=31663544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11520689U Pending JPH0353076U (en) | 1989-09-28 | 1989-09-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0353076U (en) |
-
1989
- 1989-09-28 JP JP11520689U patent/JPH0353076U/ja active Pending
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