JPH0354505B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile image signal processing device that reproduces halftones using a dither method, and more particularly to an image signal processing device that takes transmission time into account.

Generally, in digital facsimile, an image signal processing method using a dither method is known as a method for reproducing halftones.

In this method, for example, as shown in Figure 1, slice levels of 0 to 15 are set between the white level and the black level, and the analog image signal corresponding to each pixel output from the scanner's CCD image sensor is
For example, as shown in FIG. 2, each of the 16 different slice levels set above is binarized to reproduce halftones.

In addition, 1 box A in Fig. 2 represents the pixel size, and the number within it represents the slice level. In the illustrated example, the slice level is different for each pixel, and a 4 x 4 slice level pattern is created. Binarization is performed by repeating B.

According to this, since an image plane with 4×4 pixels as one unit can be expressed in 16 gradations, it is possible to reproduce halftones close to the original image.

However, in this type of conventional image signal processing method, as seen in the above conventional example,
Since binarization was performed by switching the slice level for each pixel, if this was encoded and transmitted using the normal Modified Hoffman method, unless the intermediate tone is extremely close to black or white, it will not be black or white. As a result of the white run length being shortened, the coding efficiency deteriorates and the transmission time becomes longer.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image signal processing apparatus that can shorten transmission time by eliminating the drawbacks of the above-mentioned conventional techniques in the dither system.

In order to achieve this object, the present invention is characterized in that a plurality of slice levels are switched at least every two pixels in the main scanning direction.

That is, the applicant has developed a slice level pattern B in which the number of pixels when switching the slice level is switched every pixel in the main scanning direction of the conventional method shown in FIG.
The transmission time and the reproduced image were investigated by changing the pattern from the pattern C shown in FIG. 3, in which switching occurs every two pixels, to the pattern D shown in FIG. 4, in which switching occurs every four pixels.

As a result, the results shown in FIG. 5 regarding the transmission time were obtained. Here, E is an example of the experimental results when the original contains only pictures including halftones, and F is an example of the experimental results when the original contains pictures containing halftones and text.

As is clear from this result, it can be seen that the transmission time can be considerably shortened by switching the slice level every two or more pixels.

On the other hand, regarding the halftone reproduction image, although it cannot be shown in the drawing, the image quality gradually decreases as the number of switching pixels increases, but even if the number of switching pixels is increased to 4, it is still sufficient for practical use. A halftone image was obtained.

Furthermore, as shown in FIG. 6, a mixed pattern of pattern C and pattern C shifted by 2 bits in the main scanning direction, and furthermore, as shown in FIG.
2 using a mixed pattern of pattern D and pattern D', which is shifted by 4 bits in the main scanning direction.
I tried to quantify it.

As a result, it was found that although the transmission time did not change, the image quality of the halftone reproduced image was improved compared to the cases of FIGS. 3 and 4.

From the above, if the slice level is switched for two or more pixels, the transmission time can be shortened.

The present invention has been made based on such experimental results, and specific examples thereof will be described below with reference to FIGS. 8 and 9.

FIG. 8 shows a configuration diagram of the facsimile transmission side image signal processing device when the analog image signal output from the CCD image sensor is binarized using the slice level pattern shown in FIG. 6.
2 is a timing signal generator that generates a sub-scanning clock a and a main-scanning clock b, and 2 is a main-scanning clock b.
3 is a binary counter that divides the main scanning clock b by 1/2, 4 is the 1/2 frequency output and
A quaternary counter that counts the output pulses from the AND circuit 5, 6 a quaternary counter that counts the sub-scanning clock a, 7 a binary counter that divides the sub-scanning clock a by 1/8, and 8 16 counters. ROM that stores digital data representing the slice level of
9 is a peak hold circuit that holds the peak value of the analog image signal c; 10 is a D/A converter that converts the digital data output from the ROM 8 into a slice level corresponding to the peak value; and 11 is a peak hold circuit that holds the peak value of the analog image signal c. This is a comparator that compares it with the slice level and binarizes it.

Now, when the document reading device is started, as shown in the timing chart of FIG.
The main scanning clock b is generated at a rate of . In synchronization with this main scanning clock b, the CCD image sensor 2 outputs an analog image signal c proportional to the amount of light received at that time.

At this time, the quaternary counter 6 is clocked by the sub-scanning clock a.
is counted and the counted value d is output to the ROM8.
At the same time, the quaternary counter 4 sets the main scanning clock b to 2.
It counts each bit and outputs the counted value e to the ROM8. The ROM 8 selects one of the 16 pieces of data stored therein using the count values d and e as addresses and outputs it to the D/A converter 10.

As a result, the ROM 8 outputs four pieces of data that are different for each line and are sequentially selected for every two pixels.

The D/A converter 10 converts this data into a slice level g corresponding to the peak value output from the peak hold circuit 9 and outputs it to the comparator 11. The comparator 11 binarizes the analog image signal c output from the CCD image sensor 2 by comparing it with the slice level g, and outputs it as a digital signal h to an encoding device (not shown).

Therefore, as shown in FIG. 6, the first four lines of analog image signals output from the CCD image sensor 2 are 8×
Binarization is performed by repeating the slice level pattern C of 4.

The analog image signals for the next four lines are also binarized in the same manner as described above, but at this time, the output i of the binary counter 7 becomes "1" and the AND circuit 5 is opened. Therefore, the sub-scanning clock a generated from the timing signal generator 1 is input to the quaternary counter 4 via the AND circuit 5, and before the output from the binary counter 3 is input to the quaternary counter 4, the counted value is Increase by one.

As a result, the analog image signals for the next four lines are binarized using the slice level pattern C' that is shifted by two pixels from the first four lines.

By encoding and transmitting the binarized digital image signal h in this way, the receiving side can obtain a halftone image with almost the same quality as the conventional method shown in FIG. As shown, if the original is only a picture containing halftones, the transmission time can be reduced to about half.

Incidentally, except for the AND circuit 5 shown in Fig. 8,
The analog image signal c output from the CCD image sensor 2 is binarized using the slice level pattern C shown in FIG. On the other hand, if a quaternary counter is used instead of the binary counter 3, the analog image signal c output from the CCD image sensor 2 will be
Binarization is performed using the slice level patterns D and D' shown in the figure, and at this time, if the AND circuit 5 is removed, the binarization is performed using the pattern D shown in FIG. Similarly, switching every 3 pixels or every 5 pixels can be easily performed.

As described above, according to the present invention, in the image signal processing device using the Denza method, the slice level is switched over two pixels or more, and therefore the required transmission time in facsimile using the data compression device using the Modified Hoffman method. It becomes possible to shorten the .

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a general slice level setting state in a dither method, FIG. 2 is a diagram of slice level patterns in a dither method, and FIGS. 3 and 4 are slice level setting diagrams according to each embodiment of the present invention. The pattern diagram, Figure 5, is a correlation diagram between the number of slice level switching pixels and transmission time, Figures 6 and 7.
The figure is a slice level pattern diagram according to each embodiment of the present invention, FIG. 8 is a block diagram of an image signal processing circuit according to an embodiment of the present invention, and FIG. 9 is a diagram for explaining the operation of FIG. It is a time chart. 1... Timing signal generator, 2... CCD image sensor, 3, 7... Binary counter, 4, 6
... Quaternary counter, 5 ... AND circuit, 8 ...
ROM, 9... Peak hold circuit, 10...
D/A converter, 11... comparator.

Claims (1)

[Claims] 1. m and n are natural numbers of 2 or more, and an m×n dither matrix consisting of m slice patterns in the main scanning direction and n slice patterns in the sub-scanning direction is provided, and the slice patterns in this dither matrix Compare the corresponding slice level and analog image signal.
In an image signal processing device that reproduces halftones of mXn gradations, the main scanning clock is set at a predetermined period of 1/a.
(a is a natural number of 2 or more);
a memory storing the slice pattern, an addressing means for counting the output of the frequency dividing means and designating an address of the memory, a peak hold means for holding the peak value of the analog image signal, and the dither matrix. converting means for converting the slice pattern in the image into a slice level corresponding to the peak value; and comparing means for comparing the slice level and the analog image signal to binarize the slice pattern in the main scanning direction. An image signal processing device characterized in that switching is performed for each arbitrary plurality of pixels a.