JPH0354950A - Bus monitoring device - Google Patents

Abstract

PURPOSE:To improve the debugging efficiency of software in an electronic exchange by displaying only information relating to a time switch out of collected data obtained from plural processors as a logical expression message. CONSTITUTION:The electronic exchange 21 executes data processing for connecting lines of a telephone set, a data terminal, etc., by means of plural processors 22. Data communicated between the processors 22 are written in a communicating common memory 24 through a common bus 25 and simultaneously transmitted to the bus monitor device 26 through an interface card 27. The transmitted data are stored in a data storing part 28. Only for the data in an address range of the common memory 24 to which respective addresses are allocated for the time switch 23 out of the stored or collecting data, binary data are displayed as a logical message in the time switch data selecting and display part 29.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a bus monitor device that monitors a common bus between processors in, for example, a multiprocessor electronic exchange.

(Prior art) In general, in electronic exchanges that use line-to-line switches for circuit switching of communication paths, a common bus is used for communication with a processor for controlling the line-to-line switches, and software debugging is required. Therefore, monitoring this common bus is very effective.

Therefore, extracting the information accessed to the time switch from the data on this common bus and displaying only the information regarding the connection status of the communication path using a logical expression is difficult to understand the overall operating status of the electronic exchange in question. This will lead to understanding, isolating the cause of hardware/software failures, and improving software debugging efficiency.

When monitoring the above-mentioned common bus, a large amount of data from multiple processors will be captured on the monitor side, and it is necessary to extract only the information regarding the time switch from this data and display it as a dump (binary image). By doing this, we can grasp the overall operating status of the target electronic exchange, isolate the cause of the node software in the event of a failure, and debug the software.

For example, in the case of a two-party extension call sequence between telephone A and telephone B stored in time slot number A and time slot number B, respectively, the data on the above-mentioned common bus will be as shown in FIG. The figure shows an example of a dumb display.

In the figure, 1 is a buffer relative address in the data storage section, 2 is data on the common bus, 3 is a control signal and address signal on the common bus, 4 is the processor name, 5 is the access mode, 6 is the address, and 7 is the data. . Note that 8 means data 7.

Each line of data is then displayed only once by the processor when it makes one access on the common bus.

And the data for one access to the time switch is
are mixed within these large amounts of data.

Therefore, specifying the target address range when dumping r
Data regarding the time switch is extracted from JG 1. Then, the supervisor analyzes this data and discovers its meaning.

Therefore, with conventional binary images, the logical meaning of the data is not explicit, so there is a problem in that it is difficult to quickly grasp the meaning of the call status.

(Problems to be Solved by the Invention) As described above, in the conventional bus monitor device, only the time switch information is extracted from the data collected in chronological order from multiple processors; The way to display this is to specify the target address range when dumping! The method was to extract data using 11.

Therefore, with conventional binary images, the logical meaning of the data is not explicit, so there is a problem that it is difficult to intuitively understand the call status.

The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to provide a bus monitor device that can easily and quickly grasp the connection status of communication paths in an electronic exchange.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides an electronic switching system in which a plurality of processors and a time switch for connection of communication paths are connected to a common bus via an interface. A bus monitor device that is connected to the common bus and monitors data on the common bus includes a data storage means for storing data from the common bus, and a data storage means for extracting data related to the time switch from the data stored in the data storage means. The apparatus includes a data extraction means and a data conversion means for converting the data extracted by the data extraction means into a logically expressed message.

(Function) The bus monitor device of the present invention displays only the information regarding Houma Sui and Sochi from the collected data from a plurality of processors in a logically expressed message. The connection state of the communication path can be easily and quickly ascertained, thereby improving the efficiency of debugging software in the electronic exchange.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram for explaining a system in which a bus monitor device according to an embodiment of the present invention is incorporated into an electronic exchange.

As shown in the figure, the electronic exchange (PBX) 21 includes a plurality of processors #1 (22a) to #n (22n), a time switch 23 which is hardware for connecting communication paths, and a processor/time switch between each processor. A common memory 24 for communication between them and a common bus 25 connecting them are provided. In addition, the bus monitor device 2
6 is connected to the common bus 25 of the electronic exchange 21 via an interface card 27. The bus monitor device 26 includes a data storage section 28 that stores data transmitted via the interface card 27, and a data conversion means that converts the stored data into a logically expressed message.J7 switch data selection display 29 and a console 30.

The electronic exchange 21 uses a plurality of processors #1 (22a) to ## to perform data processing for line connections of telephones, data terminals, etc.
n (22n).

For example, processors #1 (22a) to #n (220
) is written into the common memory 24 via the common bus 25 and simultaneously transmitted to the bus monitor 26 via the interface card 27 connected to the common bus 25.

The transmitted data is stored in the data storage section 28. The data that has been accumulated or is being collected is displayed on the console 30 in the time switch data selection display section 29.

FIG. 2 shows the structure of data flowing on the common bus 25.

As shown in the figure, this data is transmitted to system bus control signals 31. system bus address signal 32;
Consists of data signals 33 of the system bus.

FIG. 3 shows the bit 1 configuration of the system bus control signal 31.

In addition, in the same figure, AOH: Odd address access AOL: Even address access Word access with both pit sets R/W: Access type Read with l, write with 0 WDT: Presence or absence of trap Data collection ends at 1 OPEN: indicates unused shows.

The system bus control signal 31 described above is R/W
and OWNO~2, respectively, identify the access type (read/write example) and the accessed processor, and identify the accessed address (the address corresponds to the processor) based on the information of the address signal 32 of the system bus. (indicates the other party's processor).

Then, in the two time switch data selection display sections,
Each of the above addresses converts pinary data into a logical message and displays it only for data within the address range allocated on the common memory for time switching.

Next, message display in the bus monitor device according to the present invention will be explained.

FIG. 4 is a sequence diagram for explaining an example of the operation of a two-party extension call between telephones A and B respectively housed in time slot number A and time slot number B. In the figure, PDT (Extension Dial Tone): Sound that prompts dialing RBT (Ring Back Tone); Sound that indicates that the other party is ringing RT (Restriction Tone): Sound that indicates that the other party has disconnected PBREC (PB Receiver): Dial This is the hardware for reception.

The logical message display according to the present invention displays signals as meaningful messages by editing at a level corresponding to the operation sequence of the above-mentioned electronic exchange (PBX in the figure).

FIG. 5 shows an example of displaying a logically expressed message according to the present invention.

In the figure, 41 is the processor name, 42 is the access direction, 43 is the access mode, 44 is the instruction code for the time switch, 45 is time slot A (corresponding to terminal A), 46 is the connection direction, 47 is time slot B or Indicates the sound source name.

The messages of each logical expression correspond to the operations of the PBX in the sequence diagram of FIG. 4, and correspond to the data of the time switch. Therefore, the time switch data extracted in this way can be stored and the state of the communication path can be displayed.

[Effects of the Invention] As explained above, the bus monitor device of the present invention displays only the information regarding the time switch from the collected data from a plurality of processors in a logically expressed message. The connection state of the communication path in the electronic exchange can be easily and quickly grasped, thereby improving the efficiency of debugging the software in the electronic exchange.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining a system using a bus monitor device according to an embodiment of the present invention, FIG. 2 is a diagram showing the data structure on the common bus in FIG. 1, and FIG. 2 is a diagram for explaining control signals of the system bus, FIG. 4 is a sequence diagram for explaining an example of the operation of an electronic exchange, and FIG. 5 is a diagram for explaining a display example of a logically expressed message in the present invention. FIG. 6 is a diagram showing an example of all data flowing on the common bus. 21...Electronic exchange, 22a-22n...Processor, 23...Time switch, 25...Common bus, 2
6... Bus monitor device, 27... Interface card, 28... Data storage section, 29... Time switch data selection display section, 30... Console.

Claims (1)

[Scope of Claims] A bus monitor that is connected via an interface to the common bus of an electronic exchange in which a plurality of processors and a time switch related to connection of communication paths are connected to the common bus, and that monitors data on the common bus. The apparatus includes: a data storage means for storing data from the common bus; a data extraction means for extracting data related to the time switch from among the data stored in the data storage means; A bus monitor device comprising: data conversion means for converting data into a logically expressed message.