JPH0355845A - Wiring forming method - Google Patents
Wiring forming methodInfo
- Publication number
- JPH0355845A JPH0355845A JP1192899A JP19289989A JPH0355845A JP H0355845 A JPH0355845 A JP H0355845A JP 1192899 A JP1192899 A JP 1192899A JP 19289989 A JP19289989 A JP 19289989A JP H0355845 A JPH0355845 A JP H0355845A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- film
- opening
- layer
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、いわゆる多層配線構造を有する集積回路な
どで好適に実施される配線形成方法に関するものである
.
〔従来の技術〕
いわゆるVLSI(νery Large Scale
Integrated circuit :超LS I
)などでは、従来から、絶縁膜を介在させて、Alなど
で構威した配線を複数層積層させ、三次元的な配線を行
ったいわゆる多層配線構造が用いられている.この多層
配線構造を有する集積回路では、配線形戒のための面積
を実質的に減少させて、高集積化.高密度化.チップの
小型化に寄与することができるとともに、平均配線長が
短くなるので配線抵抗による動作速度の遅延を抑制する
ことができるなどの利点がある.
第2図は多層配線構造を有する集積回路などの半導体装
置の一部の構威を示す断面図である.たとえばSing
などの絶縁基#Ji1表面に第1層目のAl配線2が形
成され、このAn配線2を形成した絶縁基板lを被覆し
てStowなどの絶縁膜3が形成される.そして、この
絶縁s3の表面に第2層目のAl配vA4が形成される
.第1層目のA2配線2と第2層目のA2配線4との電
気的接続は、絶縁膜3に形成したビア・ホールなどと称
される開口部5を介して行われる。すなわち、絶縁膜3
の形成後に開口部5を形成し、この状態でAA配線4を
たとえばスパッタ法などにより形成することによって、
開口部5内の領域から開口部5外の絶縁膜3表面の領域
にまで連続したAl配線4が形成され、このようにして
前記開口部5でAIl配線2.4が接触して電気的に接
続されることになる.
〔発明が解決しようとする課題〕
第3図は第2図に示された構戒の開口部5近傍の様子を
拡大して示す断面図であり、第4図はAl配線4(斜線
を付して示す.)を展開して示す平面図である。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a wiring forming method that is suitably implemented in integrated circuits having a so-called multilayer wiring structure. [Prior art] So-called VLSI (νery large scale
Integrated circuit: Super LS I
), etc., have conventionally used a so-called multilayer wiring structure in which multiple layers of wiring made of Al or the like are laminated with an intervening insulating film to provide three-dimensional wiring. In integrated circuits with this multi-layer wiring structure, the area for wiring can be substantially reduced, allowing for higher integration. High density. In addition to contributing to the miniaturization of chips, the average wiring length is shortened, which has the advantage of suppressing delays in operating speed due to wiring resistance. Figure 2 is a cross-sectional view showing the structure of a part of a semiconductor device such as an integrated circuit having a multilayer wiring structure. For example, Sing
A first layer of Al wiring 2 is formed on the surface of an insulating substrate #Ji1 such as, and an insulating film 3 such as Stow is formed to cover the insulating substrate l on which this An wiring 2 is formed. Then, a second layer of Al layer A4 is formed on the surface of this insulation s3. Electrical connection between the first layer A2 wiring 2 and the second layer A2 wiring 4 is made through an opening 5 called a via hole or the like formed in the insulating film 3. That is, the insulating film 3
After the formation of the opening 5, the AA wiring 4 is formed in this state by, for example, a sputtering method.
A continuous Al wiring 4 is formed from the area inside the opening 5 to the area on the surface of the insulating film 3 outside the opening 5, and in this way, the Al wiring 2.4 comes into contact with the opening 5 and is electrically connected. It will be connected. [Problems to be Solved by the Invention] FIG. 3 is an enlarged sectional view showing the vicinity of the opening 5 of the structure shown in FIG. 2, and FIG. FIG.
VLS Iなどでは、多層配線の配線幅や形成面積が微
細化しており、これに伴って開口部5はたとえば絶縁膜
3の膜厚と同程度である1.0μm角程度の大きさとな
っている.このように微細な開口部5を形成した絶縁膜
3表面に第2層目のA2配線4をスバッタ法で形成した
場合には、第3図において参照符号l1で示すように開
口部5の底面の周辺近傍には、Aj2原子が被着せず、
このため開口部5の底面のAi配線部分4aと開口部5
の立上がり部から絶縁膜3の表面部分に至る部分のAl
配線部分4bとの間が第4図に示されるような断線した
状態となる恐れがあり、結果としてAl配線2,4間が
断線する恐れがある.このように従来では、開口部5に
おける第1層目および第2層目のAffi配線2.4間
の電気的接続を良好に達威することができず、これによ
って集積回路の製造に当たり、その歩留りが悪いなどの
問題が生じていた.
この発明の目的は、上述の技術的課題を解決し、配線接
続が確実に行われるようにした配線形戒方法を提供する
ことである.
〔課題を解決するための手段〕
この発明の配線形成方法は、基板表面に第1の配線を形
成し、
この第1の配線を形成した前記基板上に絶縁膜を形戒し
、
この絶縁膜に選択的に開口部を形成して、この開口部で
前記第1の配線を露出させ、
加熱により軟化または溶融させることができる導電性膜
を前記開口部近傍に選択的に形成し、この導電性膜を加
熱して軟化または溶融させて前記開口部内に充填させ、
この状態から第2の配線を前記導電性膜に接触するよう
に前記絶縁膜表面に形成することを特徴とする.
〔作用〕
この発明の構或によれば、基板表面に、絶縁膜を介在さ
せて三次元的に形成される第1および第2の配線は、絶
縁膜に選択的に形成した開口部内に充填される導電性膜
を介して電気的に接続される.この導電性膜は加熱によ
り軟化または溶融させることができるもので、前記絶縁
膜の開口部近傍にこの湛電性膜を形成した後に、この導
電性膜に加熱を施すことにより、前記開口部内にこの導
電性膜を充填させることができる.
このように絶縁膜の開口部内に導電性膜が充填される結
果、この導電性膜と第1の配線との間、および導電性膜
と第2の配線との間は容易に接触させることができ、し
たがって各電気的接続は確実に達威される.このように
して、第1および第2の配線間の電気的接続が確実に達
威されるようになる.
〔実施例〕
第1図はこの発明の一実施例の配線形成方法を説明する
ための断面図である,Stowなどで構威した絶縁基板
11表面には、たとえばスパッタ法により第1の配線で
ある第1層目のAl配線l2が形成される.このAl配
線l2はその表面に高融点金属被覆膜12aを有してい
る.
Affi配線12を形成した絶縁基板11表面には、絶
縁膜として、CVD法によりSing膜13が形成され
、このSing膜13には、選択的に開口部14(たと
えば1.0μm角程度の大きさを有している.)が形成
される.この開口部l4からは、AI!.配線l2の前
記高融点金属被覆膜12aが露出する。この状態が第1
図(1)に示されている.この状態から、導電性膜とし
て、スバッタ法によってSing膜13の膜厚と同程度
の膜厚を有するAfllll5を形成し、このAl膜1
5表面にフォトリソグラフィ技術を用いて選択的にフォ
トレジストl6を形戒する.このフォトレジストl6は
、開口部l4上の部分に形成される.この状態が第1図
(2)に示されている.
次に、Affi膜15に通常のドライエッチングを施し
て、開口部14近傍の部分のみを残し、残余の部分を除
去する.この後にフォトレジスト16を除去し、さらに
フォトリソグラフィ技術およびエッチング技術を用いて
、開口部14近傍に残した/l膜15を被覆する反射防
止膜17を形成する。この反射防止膜17は、たとえば
Al膜15側から順にSins膜17aとSiNa膜1
7bとを積層して構威したものである.
反射防止膜17の形成後には、絶縁基板1l表面に向け
てエネルギー線としてレーザ光19を照射する.レーザ
光19のエネルギーは反射防止膜17を介してAI!.
膜15で吸収され、これによりこの/l膜15は加熱さ
れて溶融または軟化する。In VLSI and the like, the wiring width and formation area of multilayer wiring are becoming smaller, and as a result, the opening 5 has a size of about 1.0 μm square, which is about the same as the thickness of the insulating film 3. .. When the second layer of A2 wiring 4 is formed by the sputtering method on the surface of the insulating film 3 in which the fine openings 5 are formed in this way, the bottom surface of the openings 5 is There are no Aj2 atoms attached near the periphery of
Therefore, the Ai wiring portion 4a on the bottom of the opening 5 and the opening 5
Al in the portion from the rising portion of
There is a possibility that a disconnection between the Al wiring portion 4b and the Al wiring portion 4b will occur as shown in FIG. 4, and as a result, a disconnection between the Al wirings 2 and 4 may occur. As described above, in the past, it was not possible to achieve a good electrical connection between the Affi wiring 2.4 in the first layer and the second layer in the opening 5, and as a result, when manufacturing an integrated circuit, Problems such as poor yield were occurring. The purpose of this invention is to solve the above-mentioned technical problems and provide a wired precept method that ensures reliable wiring connections. [Means for Solving the Problems] The wiring forming method of the present invention includes forming a first wiring on the surface of a substrate, forming an insulating film on the substrate on which the first wiring is formed, and forming the insulating film. selectively forming an opening in the opening to expose the first wiring; selectively forming a conductive film in the vicinity of the opening that can be softened or melted by heating; The conductive film is heated to soften or melt and fill the opening, and from this state a second wiring is formed on the surface of the insulating film so as to be in contact with the conductive film. [Operation] According to the structure of the present invention, the first and second wirings formed three-dimensionally on the substrate surface with an insulating film interposed therebetween are filled into openings selectively formed in the insulating film. electrically connected via a conductive film. This conductive film can be softened or melted by heating, and after forming the conductive film near the opening of the insulating film, by heating the conductive film, the inside of the opening can be melted. This conductive film can be filled. As a result of filling the opening of the insulating film with the conductive film, it is possible to easily make contact between the conductive film and the first wiring and between the conductive film and the second wiring. possible, thus ensuring that each electrical connection is achieved. In this way, electrical connection between the first and second wires is ensured. [Embodiment] FIG. 1 is a cross-sectional view for explaining a wiring forming method according to an embodiment of the present invention.A first wiring is formed on the surface of an insulating substrate 11 using a Stow method, for example, by sputtering. A certain first layer Al wiring l2 is formed. This Al wiring l2 has a high melting point metal coating film 12a on its surface. A Sing film 13 is formed by CVD as an insulating film on the surface of the insulating substrate 11 on which the Affi wiring 12 is formed, and an opening 14 (for example, about 1.0 μm square in size) is selectively formed in the Sing film 13. ) is formed. From this opening l4, AI! .. The high melting point metal coating film 12a of the wiring 12 is exposed. This state is the first
This is shown in Figure (1). From this state, as a conductive film, Aflllll5 having a film thickness comparable to that of the Sing film 13 is formed by a sputtering method, and this Al film 1
5. Photoresist 16 is selectively formed on the surface using photolithography technology. This photoresist l6 is formed over the opening l4. This state is shown in Figure 1 (2). Next, the Affi film 15 is subjected to normal dry etching to leave only the portion near the opening 14 and remove the remaining portion. Thereafter, the photoresist 16 is removed, and an antireflection film 17 is formed to cover the /l film 15 left in the vicinity of the opening 14 using photolithography and etching techniques. This antireflection film 17 includes, for example, a Sins film 17a and a SiNa film 1 in order from the Al film 15 side.
It is constructed by stacking 7b and 7b. After forming the antireflection film 17, a laser beam 19 is irradiated as an energy beam toward the surface of the insulating substrate 1l. The energy of the laser beam 19 is transmitted through the anti-reflection film 17 to the AI! ..
It is absorbed by the film 15, which heats the /l film 15 and melts or softens it.
この状態が第1図(3)に示されている。前記反射防止
膜17は、レーザ光19をl 1 5に効率良く吸収さ
せるためのもので、Sift膜17aとS i N a
膜17bとの各膜厚は、レーザ光19の波長に対して、
反射防止膜として好適に作用するように設定される。た
とえば、レーザ光19としてArイオンレーザを用いる
場合には、主波長は514.5nmおよび488.On
mであるから、SiOz膜17aの膜厚は5 0 n
m, SiN4膜17bの膜厚は60nmに選ばれる.
レーザ光l9の照射によりAl膜15は溶融または軟化
し、これによりこのAl膜15は第1図(4)に示すよ
うに開口部14に隙間なく充填されることになる.第1
層目のAl配線12の表面の高融点金属被覆膜12aの
働きにより、Al膜l5が溶融・軟化するときに、第1
層目のAffi配線12が溶融したりなどすることはな
い.第1図(1)または(2)に示されるように、An
膜15をスパッタ法により形成した状態では、1μm角
程度の微細な開口部l4の底面の周辺部ではこのA2膜
l5は被着されにくく、したがってAl膜15は開口部
14内を埋め尽くすことができないが、前述のようなレ
ーザ光19の照射によるAj!膜15の溶融・軟化処理
の後には、このAffi膜15を開口部14内に隙間な
く埋め込ませることができる.第1図(4)に示された
状態から、絶縁膜13表面に、開口部14に埋め込まれ
たA2膜l5に接触するように、たとえばスパッタ法に
より、第2の配線である第2層目のAffi配線20が
形成される.この状態は第1図(5)に示されており、
この状態では、第2層目の/l配線20がAn!llI
15を介して第1層目のA2配線12に電気的に接続さ
れることになる.しかも開口部l4内に形成したA2膜
15は、この開口部14内に隙間なく埋め込まれている
ので、AIl配線12とAIl膜l5との間およびA2
膜l5とAl配線20との間は容易に接触させることが
できるので、A2配線12.20間の接続は確実なもの
となる.
このようにしてこの実施例によれば、第1層目および第
2層目の/l配!12.20を確実に接続させることが
できるようになるので、たとえば集積回路の製造などに
おいて、その回路配線の相互接続を確実に行わせて、そ
の歩留りを向上することができるようになる.
前述の実施例では、AI.膜15の加熱のために、レー
ザ光を用いるようにしたが、レーザ光の代わりに、赤外
ランプやヒータによる赤外線や電子ビームなどの他のエ
ネルギー線が用いられてもよい。This state is shown in FIG. 1(3). The anti-reflection film 17 is for efficiently absorbing the laser beam 19 into l 1 5, and the anti-reflection film 17 is for efficiently absorbing the laser beam 19 into l 1 5.
The film thickness of the film 17b is as follows with respect to the wavelength of the laser beam 19:
It is set to suitably act as an antireflection film. For example, when using an Ar ion laser as the laser beam 19, the main wavelengths are 514.5 nm and 488.5 nm. On
m, the thickness of the SiOz film 17a is 50 n.
m, the thickness of the SiN4 film 17b is selected to be 60 nm. The Al film 15 is melted or softened by the irradiation with the laser beam 19, so that the Al film 15 fills the opening 14 without any gaps as shown in FIG. 1(4). 1st
When the Al film 15 melts and softens due to the action of the high melting point metal coating film 12a on the surface of the Al wiring 12 in the first layer, the first
The Affi wiring 12 in the layer will not melt. As shown in FIG. 1 (1) or (2), An
When the film 15 is formed by sputtering, the A2 film 15 is difficult to adhere to the periphery of the bottom of the minute opening 14, which is approximately 1 μm square, and therefore the Al film 15 cannot completely fill the opening 14. Although it is not possible, Aj! by irradiation with the laser beam 19 as described above! After the film 15 is melted and softened, the Affi film 15 can be embedded in the opening 14 without any gaps. From the state shown in FIG. 1(4), a second layer, which is a second wiring, is formed on the surface of the insulating film 13 by sputtering, for example, so as to be in contact with the A2 film l5 embedded in the opening 14. Affi wiring 20 is formed. This state is shown in Figure 1 (5),
In this state, the /l wiring 20 of the second layer is An! llI
It is electrically connected to the first layer A2 wiring 12 via the wire 15. Moreover, since the A2 film 15 formed in the opening l4 is embedded in this opening 14 without any gaps, the A2 film 15 formed in the opening l4 is
Since the film 15 and the Al wiring 20 can be easily brought into contact, the connection between the A2 wiring 12 and 20 is reliable. In this way, according to this embodiment, the /l distribution of the first layer and the second layer! 12.20 can be reliably connected, for example, in the manufacture of integrated circuits, the circuit wiring can be reliably interconnected and the yield can be improved. In the embodiments described above, AI. Although laser light is used to heat the film 15, other energy rays such as infrared rays from an infrared lamp or heater or electron beams may be used instead of laser light.
以上のようにこの発明の配線形戒方法によれば、第1の
配線と第2の配線との間に形成される絶縁膜において、
第1および第2の配線の相互間の接続のために形成され
た開口部内には、導電性膜が充填されることになるので
、前記第1および第2の配線間の電気的接続はこの導電
性膜を介して確実に達戒されるようになる.この結果、
たとえば集積回路などの半導体装置の製造などにおいて
は、その回路配線の接続を確実に行わせて、歩留りを格
段に向上することができるようになる。As described above, according to the wiring type precept method of the present invention, in the insulating film formed between the first wiring and the second wiring,
Since the opening formed for the connection between the first and second wirings is filled with a conductive film, the electrical connection between the first and second wirings is established in this way. The precepts will be reliably achieved through the conductive film. As a result,
For example, in the manufacture of semiconductor devices such as integrated circuits, it becomes possible to connect circuit wiring reliably and to significantly improve yields.
第1図はこの発明の一実施例の配線形成方法を説明する
ための断面図、第2図は従来から用いられている多層配
線構造を有する集積回路の一部の構戒を示す断面図、第
3図は第2図に示された開口部5近傍の様子を拡大して
示す断面図、第4図はAffi配線4を展開して示す平
面図である.11・・・絶縁基板(基板)、12・・・
第1層目のAl配線(第1の配線)、l3・・・SiO
z膜(絶縁膜)l4・・・開口部、15・・・Al膜(
導電性膜)、17・・・反射防止膜、19・・・レーザ
光、20・・・第2層目の配線(第2の配線)
声
1
図FIG. 1 is a cross-sectional view for explaining a wiring forming method according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the structure of a part of an integrated circuit having a conventionally used multilayer wiring structure. 3 is an enlarged sectional view showing the vicinity of the opening 5 shown in FIG. 2, and FIG. 4 is a plan view showing the Affi wiring 4 expanded. 11... Insulating substrate (substrate), 12...
First layer Al wiring (first wiring), l3...SiO
Z film (insulating film) l4...opening, 15...Al film (
Conductive film), 17... Anti-reflection film, 19... Laser light, 20... Second layer wiring (second wiring) Voice 1 Figure
Claims (1)
、 この絶縁膜に選択的に開口部を形成して、この開口部で
前記第1の配線を露出させ、 加熱により軟化または溶融させることができる導電性膜
を前記開口部近傍に選択的に形成し、この導電性膜を加
熱して軟化または溶融させて前記開口部内に充填させ、 この状態から第2の配線を前記導電性膜に接触するよう
に前記絶縁膜表面に形成することを特徴とする配線形成
方法。[Claims] A first wiring is formed on the surface of a substrate, an insulating film is formed on the substrate on which the first wiring is formed, and an opening is selectively formed in this insulating film. The first wiring is exposed at the opening, a conductive film that can be softened or melted by heating is selectively formed in the vicinity of the opening, and the conductive film is heated to soften or melt. A wiring forming method, comprising: filling the opening, and from this state forming a second wiring on the surface of the insulating film so as to be in contact with the conductive film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1192899A JPH0355845A (en) | 1989-07-25 | 1989-07-25 | Wiring forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1192899A JPH0355845A (en) | 1989-07-25 | 1989-07-25 | Wiring forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0355845A true JPH0355845A (en) | 1991-03-11 |
Family
ID=16298832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1192899A Pending JPH0355845A (en) | 1989-07-25 | 1989-07-25 | Wiring forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0355845A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05206061A (en) * | 1991-06-10 | 1993-08-13 | Micron Technol Inc | Conductive contact plug and method for manufacturing conductive contact plug in integrated circuit using laser smoothing |
-
1989
- 1989-07-25 JP JP1192899A patent/JPH0355845A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05206061A (en) * | 1991-06-10 | 1993-08-13 | Micron Technol Inc | Conductive contact plug and method for manufacturing conductive contact plug in integrated circuit using laser smoothing |
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