JPH035672B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a solid-state imaging device, and in particular has a blooming suppression function that allows a high-quality image output signal to be obtained even with excessively intense incident light, and has a special blooming suppression function. Since there is no need for a control line to apply a control signal, there is no need for a special control signal power supply, and in terms of manufacturing, there is no need to manufacture a special control line, so the production yield can be improved. It provides an inexpensive and high-performance solid-state imaging device, and is considered to have made a significant contribution to the industry in the solid-state camera field, where future development is highly anticipated.

Conventional structure and its problems Solid-state imaging devices have advantages such as being smaller and lighter, lower power consumption, and higher reliability than conventional image pickup tubes, so they are being used as compact cameras instead of image pickup tubes. Applications are being considered. However, one of the biggest drawbacks of such solid-state imaging devices is the occurrence of blurring of images with strong brightness, called blooming, which occurs when incident light has excessive intensity. Therefore, various solid-state imaging devices having a blooming suppression function are being proposed in order to obtain a good image output signal.

FIGS. 1 and 2 are plan views of an example of a conventional solid-state imaging device equipped with the blooming suppression function described above. FIG. 1 shows a case where one drain region is provided for one photosensitive pixel column, and FIG. 2 shows a case where one drain region is provided for two photosensitive pixel columns. In Figures 1 and 2, 1
a, 1b... and 11a, 11b... are photodiodes (photosensitive pixels) formed on the surface area of the semiconductor substrate, 3a, 3b... (13a, 13b...
...) and 4a, 4b... (14a, 14b...
...) is a transfer gate electrode array for transferring the photoelectric conversion signal obtained by the photodiode to the signal output terminal, and 3a, 3b... (13a, 13
b...) is also the storage electrode of the CCD. 4
a, 4b... (14a, 14b...) indicate the transfer electrodes of the CCD, and 2a, 2b... and 12a, 12b... indicate the readout gate region between the photodiode and the signal charge readout CCD. show. Furthermore, the above photodiode 1
a, 1b... and 11a, 11b... control gate electrodes 5,
15 are formed, each of the control gate electrodes 5, 15
Drain regions 6 and 16 (or 6) to which a high DC voltage is constantly supplied are formed in the surface region of the semiconductor substrate adjacent to the drain regions 6 and 16 (or 6). In addition,
Above photodiode and signal charge readout CCD
A channel stop region is formed between each transfer gate electrode row.

In such a configuration, when the semiconductor substrate is irradiated with light, the photodiodes 1a, 1b...
. . . and 11a, 11b . . . generate a signal charge corresponding to the amount of incident light, and this signal charge is accumulated in each photodiode. Next, signal charge readout gate regions 2a, 2b... and 12
When a control pulse is applied to a, 12b..., each of the photodiodes 1a, 1c... and 11
The signal charges accumulated in a, 11c... are transferred to the storage electrodes 3a, 3c... of the signal current readout CCD.
and 13a, 13c (in other fields of interlaced scanning, photodiodes 1b... and 11b...
The signal charges of... storage electrodes 3b... and 1
3b...move down). Furthermore, clock pulses are applied to each transfer gate electrode 3a, 3b... and 4a, 4b... and 13a, 13b... and 1
4a, 14b..., the signal charges that have previously moved under each of the electrodes are sequentially transferred upward in FIG. is output as an image signal.

By the way, in the conventional device described above, each control gate 5, 15 is supplied with a control voltage, and each drain region 6 or 6 and 16 is supplied with a higher DC voltage. A potential barrier is formed inside the semiconductor substrate below 15. Therefore, if the intensity of the incident light is so strong that the signal charge generated in the photodiode becomes excessive and exceeds the potential barrier, this excess charge will flow into each drain region 6 and 16 (or 6). . Therefore, the conventional device shown in FIG. 1 or 2 can suppress the occurrence of blooming. However, in the conventional example, the normal signal charge is read out to the transfer stage after the excess current is discharged from the photodiode to the overflow drain, so the excess charge generated during the readout period cannot be removed, causing blooming. This creates the problem of Further, in the conventional example, control gate electrodes 5, 1 are provided between the drain regions 6 and 16 (or 6) and the photodiodes 1a, 1b... and 11a, 11b.
It is necessary to form 5. A power source is also required for applying control signals to the control gate electrodes 5 and 15. This means that solid-state imaging devices have special control lines and special power supplies, which not only leads to lower manufacturing yields, but also poses a problem in providing inexpensive solid-state imaging devices to the world. .

OBJECT OF THE INVENTION The present invention has been made in consideration of the above-mentioned circumstances, and it is an object of the present invention to provide a high-performance solid-state imaging device having a complete blooming suppression function with a high manufacturing yield.

Structure of the Invention The present invention comprises a control gate region between a drain region and a signal charge readout means, and further includes an electrode for driving the control gate region as a signal charge readout means from a photosensitive pixel in the solid-state imaging device. It is a common electrode with the electrode for driving the readout gate region to the transfer stage and the transfer electrode that transfers the signal charge on the transfer stage, and is structured so that the same control pulse is applied. After reading all the signal charges from to the transfer stage, the excess charge exceeding the amount of charge handled by the transfer stage is
It discharges from the transfer stage to the overflow drain.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a plan view showing the configuration of an embodiment of the solid-state imaging device according to the present invention. In addition,
The same reference numerals are given to the parts corresponding to the conventional one, and the explanation thereof is omitted, and only the parts that are different from the conventional one will be extracted and explained. That is, in the device of this embodiment, photodiodes 1a, 1b... and 11
The control gate electrodes 5 and 15 between a and 11b and the drain region 6 are removed, and instead of the control gate electrodes 5 and 15 between the drain region 6 and the storage electrode 3 of the signal charge readout CCD.
control gate regions 7a, 7b, .
..., 17a, 17b..., and for example, when reading signal charges accumulated in one photodiode 1a to the storage electrode 3a, the storage electrode 3a, the readout gate region 2a, and the control gate region 7a. The structure is such that the same clock pulse is applied to each electrode. That is, the diagonal lines in the figure indicate that the above-mentioned regions 2a, 3a, and 7a are formed of a common electrode.

Further, FIG. 4 is a sectional view taken along the line A--A of one embodiment of FIG. 3. In FIG. 4, 20 is a semiconductor substrate, 21 is a gate insulating film, and 22 is a polycrystalline silicon electrode.
A photodiode 1a, a drain region 6, a storage electrode 3a, a read gate region 2a, and a control gate region 7a are formed as surface regions of the semiconductor device. Furthermore, in FIG. 5, the heights of potential barriers corresponding to regions 1a, 2a, 3a, 7a, and 6 shown in the cross-sectional view of FIG. Examples of control pulses applied to crystalline silicon (22 in FIG. 4) are each shown.

In FIG. 6, 30 is a signal read pulse from the photosensitive pixel to the signal charge readout CCD in this embodiment, and 31 is a transfer clock pulse train for transferring the signal charge in the output direction. Note that this drive pulse is exactly the same as that of the conventional device and is not special to this invention.

The operation of this embodiment apparatus will be explained below using FIGS. 3, 4, and 5. When the photodiode 1a is empty, the potential is 23, and the polycrystalline silicon electrode 2 in FIG.
Region 2a when the voltage applied to 2 is at a low level V _L ,
The height of the potential of 3a and 7a is 26', 2
7', 28'. In this way, the storage electrode 3a
The potential 27' is equal to the potential barrier height 2 of each of the signal readout gate region 2a and the control gate region 7a.
Of course it is lower than 6.28', but
Moreover, the key point of this embodiment is that the height of the potential barrier 28' is lower than the height 26' of the potential barrier by, for example, at least 0.1 V or more. The purpose of setting the height of the potential barrier in this way is to smoothly perform the blooming suppression operation described below. In this state, when light is incident on the photodiode 1a, the potential of the diode 1a increases to a potential corresponding to the intensity of the incident light. Next, when applying a high level V _H to the polycrystalline silicon electrode 22 and reading out the signal charge accumulated in the photodiode, the heights of the potential barriers in regions 2a, 3a, and 7a are set to 26, 27, and 28, respectively. Then, at this time, the signal charge accumulated in the photodiode 1a is between 23 and 24, and the amount of signal charge is within the maximum amount of charge that can be transferred by the storage electrode 3a of the signal readout CCD. If the potential barrier 2
There are no charges greater than 8.

However, if the intensity of the incident light is excessive and a signal charge that causes blooming (for example, a potential of 25 in FIG. 5) is accumulated in the photodiode 1a, the maximum amount of signal charge that cannot be transferred to the storage electrode 3a of the CCD is accumulated. amount of charge is transferred, and any remaining amount of signal charge is discharged across potential barrier 28 to drain region 6 (potential 29). In this way, the clock pulse (31 in Figure 6) is then applied, and the amount of signal charge transferred in the direction of the output terminal, that is, in the direction perpendicular to the page in Figure 5, and in the direction above the page in Figure 3. This means that it never exceeds the maximum amount of charge that can be transferred by one storage electrode. As mentioned above, once all the signal charges of the photodiode are read out to the transfer stage, blooming can be prevented by discharging only the excess charge that exceeds the amount of charge handled by the transfer stage from the transfer stage to the overflow drain. Deter. Furthermore, by discharging from the transfer stage to the overflow drain, excess charge generated during the read period from the photodiode to the transfer stage can also be discharged to the overflow drain.

In addition, FIG. 7 shows another embodiment of the present invention. In the figure as well, a common electrode is provided on the gate regions 2a, 3a, 7a as in the embodiment of FIG. 3, but the arrangement of the regions 2a, 3a, 7a is different. The driving method is the same as described above. Another embodiment of the invention is also shown in FIG. This figure shows an example in which the present invention is applied to a photoconductor film laminated type device for improving the sensitivity of a solid-state imaging device. In this case, the amount of signal charge accumulated by the photoconductor film is larger than that by ordinary silicon photodiodes alone, so the blooming suppression according to the present invention is effective in stacked solid-state imaging devices. It can be said that this technology is indispensable for improving the characteristics of In Figure 8, 20-22 and 1a-3a, 6, 7
a is the same as in FIG. The photodiode 1a and the photoconductor film 36 are coupled through conductors 32 and 33 surrounded by insulating films 34 and 35.
37 is a transparent electrode.

Effects of the Invention (1) In the present invention, after the entire signal charge of the photodiode is once read out to the transfer stage, excess charge is discharged from the transfer stage to the overflow drain. Excess charges generated can also be drained to the overflow drain. In principle, this makes it possible to completely suppress the occurrence of blooming.

(2) In addition, in the configuration and drive of the present invention, the overflow control gate electrode, readout electrode, and transfer electrode are common, and due to the difference in potential barrier between the readout gate and the overflow control gate, excess charge is discharged to the overflow drain. control. Therefore, in order to realize the overflow operation, there is no need to add a special gate configuration or drive pulse, and there is an advantage that a very simple process and drive are required.

As described above, according to the present invention, it is possible to provide a high-performance solid-state imaging device with excellent blooming suppression ability.

[Brief explanation of the drawing]

1 and 2 are diagrams showing a schematic plan configuration of a conventional solid-state imaging device equipped with a blooming suppression function, respectively. FIG. 3 is a schematic plan view of a solid-state imaging device according to an embodiment of the present invention. FIG. 4 is A- in Figure 3.
A sectional view taken along line A', FIG. 5 is a diagram showing the height of the potential barrier in each gate region of FIG. 3 for explaining the above embodiment, and FIG. 6 is a diagram for driving the embodiment of FIG. 3. The pulse waveform diagram, FIG. 7, and FIG. 8 are a schematic plan view and a sectional view, respectively, of a solid-state imaging device according to another embodiment of the present invention. 1a, 1b..., 11a, 11b...photosensitive pixels.
2a, 2b..., 12a, 12b... readout gate area, 3a, 3b..., 13a, 13b... storage area of signal readout CCD, 4a, 4b...,
14a, 14b...Transfer area of signal readout CCD, 5, 15, 7a, 7b..., 17a,
17b...Control gate, 6...Drain region, 2
0... Semiconductor substrate, 21... Gate insulating film, 22
...Polycrystalline silicon electrode.

Claims (1)

[Scope of Claims] 1. A plurality of photosensitive pixels that generate and accumulate photoelectric conversion signals according to the amount of incident light on a semiconductor substrate, means for reading out signal charges accumulated in the plurality of photosensitive pixels, and a plurality of photosensitive pixels that generate and accumulate photoelectric conversion signals according to the amount of incident light; A transfer electrode formed on the charge reading means, a drain region of a conductivity type opposite to that of the substrate provided on the surface region of the semiconductor substrate along the arrangement direction of the plurality of photosensitive pixels, and the drain region and the drain region. a control gate region between the signal charge readout means, and a common electrode between the signal charge readout gate region between the photosensitive pixel and the signal charge readout means, the transfer electrode, and the control gate region. and after reading the signal charge of the photosensitive pixel to the signal charge reading means, the signal charge exceeding the amount of charge handled by the reading means is discharged to the drain region via the control gate region. solid-state imaging device. 2. Claim 1, characterized in that the height of the potential barrier in the control gate region is lower than the height of the potential barrier in the signal charge readout gate region.
The solid-state imaging device described in .