JPH0358453A - Resin sealed type semiconductor integrated circuit device - Google Patents
Resin sealed type semiconductor integrated circuit deviceInfo
- Publication number
- JPH0358453A JPH0358453A JP1195013A JP19501389A JPH0358453A JP H0358453 A JPH0358453 A JP H0358453A JP 1195013 A JP1195013 A JP 1195013A JP 19501389 A JP19501389 A JP 19501389A JP H0358453 A JPH0358453 A JP H0358453A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- integrated circuit
- semiconductor integrated
- circuit device
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は樹脂封止型半導体集積回路装置に関し５特にト
ランスファモールト或形にて樹脂封止した樹脂封止型半
導体集積図路装置に関する．ｒ従来の技術〕
従来、この種の半導体集積回路装置における樹脂封止は
、トランスファモールド或形にて１回で樹脂封止し、パ
ッケージの外形を形或している。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor integrated circuit device, and particularly to a resin-sealed semiconductor integrated circuit device that is resin-sealed using a transfer mold. [Prior Art] Conventionally, resin sealing in this type of semiconductor integrated circuit device is carried out in one step using transfer molding to form the outer shape of the package.
また、液状の樹脂を半導体チップ全面にボッティングし
、樹脂を硬化させたのちトランスファモールド成形にて
樹脂封止し２、パッケージ外形を形成している．
〔発明が解決しようとする課題〕
上述した従来の樹脂封止構造においては、集積回路の多
機能化が進み半導体チップのサイズが大型化すること、
及び、組立設備の合理化により、封止樹脂に対する特性
要求の例としてレーザー捺印による発色性のよい封止樹
脂や商品イメージを反映したカラー樹脂や耐湿性向上を
図った封止樹脂や低応力化を図った封止樹脂などあげら
れるが、全ての特性を一つの封止樹脂でかなえることは
不可能であり，１回のトランスファモールド成形では、
これら全てを満足できないという欠点がある．
本発明の目的は、発色性やカラー化や耐湿性や低応力化
などの封止樹脂の特性を同時に満足できる樹脂封止型半
導体集積回路装置を提供することにある．
〔課題を解決するための手段〕
本発明は、樹脂封止型半導体集積回路装置において、少
くとも２種類の封止樹脂を用いて、少゛くとも２層のト
ランスファ樹脂封止構造となっている。In addition, liquid resin is potted onto the entire surface of the semiconductor chip, the resin is hardened, and then the resin is sealed using transfer molding 2 to form the package outline. [Problems to be Solved by the Invention] In the conventional resin encapsulation structure described above, the size of semiconductor chips is increasing as integrated circuits become more multifunctional.
In addition, by rationalizing assembly equipment, we have created molding resins with good color development by laser marking, colored resins that reflect the product image, molded resins with improved moisture resistance, and low stress, as examples of characteristic requirements for molded resins. However, it is impossible to achieve all the characteristics with one sealing resin, and with one transfer molding,
The drawback is that it cannot satisfy all of these requirements. An object of the present invention is to provide a resin-sealed semiconductor integrated circuit device that can simultaneously satisfy the characteristics of a sealing resin, such as color development, colorization, moisture resistance, and low stress. [Means for Solving the Problems] The present invention provides a resin-sealed semiconductor integrated circuit device that uses at least two types of sealing resins to have at least a two-layer transfer resin sealing structure. There is.
以下、図面を参照して本発明の実施例を詳細に説明する
．
第１図（ａ）．（ｂ）は本発明の一実施例の斜視図及び
Ａ−Ａ’線断面図である。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Figure 1(a). (b) is a perspective view and a sectional view taken along the line AA' of an embodiment of the present invention.
第１図（ａ）．（ｂ）に示すように、まず、リード・フ
レーム１のアイランドに、半導体チップ２を搭載し、半
導体チップ２の電極端子とリード・フレーム１のリード
をボンディングワイヤ３にて接続する。Figure 1(a). As shown in FIG. 1B, first, the semiconductor chip 2 is mounted on the island of the lead frame 1, and the electrode terminals of the semiconductor chip 2 and the leads of the lead frame 1 are connected with bonding wires 3.
次に、半導体チップ２を搭載したリード・フレーム１を
トランスファモールド或形にて、芯となる高密着性封止
樹脂６を被覆し、樹脂封止する．次に、同じ方法にて、
高密着性封止樹脂６を中間層となる低応力封止樹脂５に
て被覆する．更に、同じ方法にて、中間層となる低応力
封止樹脂５を表面層となるレーザー捺印発色性封止樹脂
４にて被覆する。Next, the lead frame 1 on which the semiconductor chip 2 is mounted is covered with a highly adhesive sealing resin 6 serving as a core using a transfer molding method, and is sealed with the resin. Next, in the same way,
The highly adhesive sealing resin 6 is covered with a low stress sealing resin 5 serving as an intermediate layer. Furthermore, by the same method, the low stress sealing resin 5 which will be the intermediate layer is covered with the laser-markable color-forming sealing resin 4 which will be the surface layer.
Ｍｆ＆に、レーザ捺印によるマーキング、リードの成形
等を行い、本実施例の積層構造の樹脂封止型半導体集積
回路装置が得られる．
〔発明の効果〕
以上説明したように本発明は、従来、トランスファモー
ルド戒形を１回で行なった構造を２層以上に積層した構
造としたので、特性の異なる封止樹脂を用いることによ
り、樹脂封止型半導体集積回路装置の信頼性向上とカラ
ー樹脂を使用することにより商品イメージの向上と、捺
印文字を鮮明にできる効果がある．Marking by laser stamping, molding of leads, etc. are performed on Mf&, and the resin-sealed semiconductor integrated circuit device with the laminated structure of this example is obtained. [Effects of the Invention] As explained above, the present invention changes the conventional structure in which transfer molding is performed in one time to a structure in which two or more layers are laminated, so by using sealing resins with different characteristics, Improving the reliability of resin-sealed semiconductor integrated circuit devices and using colored resin have the effect of improving the product image and making the printed text clearer.
第１図（ａ），（ｂ）は本発明の一実施例の斜視図及び
Ａ−Ａ’線断面図である．
１・・・リード・フレーム、２・・・半導体チップ、３
・・・ボンディングワイヤ、４・・・レーザー捺印発色
性封止樹脂、
５・・・低応力封止樹脂、
６・・・高密着性封
止樹脂。FIGS. 1(a) and 1(b) are a perspective view and a sectional view taken along the line AA' of an embodiment of the present invention. 1... Lead frame, 2... Semiconductor chip, 3
. . . Bonding wire, 4. Laser-marked color-forming sealing resin, 5. Low-stress sealing resin, 6. High-adhesion sealing resin.
Claims (1)
類の封止樹脂を用いて、少くとも２層のトランスファ樹
脂封止構造としたことを特徴とする樹脂封止型半導体集
積回路装置。A resin-sealed semiconductor integrated circuit device, characterized in that the resin-sealed semiconductor integrated circuit device uses at least two types of sealing resins to have at least a two-layer transfer resin sealing structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1195013A JPH0358453A (en) | 1989-07-26 | 1989-07-26 | Resin sealed type semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1195013A JPH0358453A (en) | 1989-07-26 | 1989-07-26 | Resin sealed type semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0358453A true JPH0358453A (en) | 1991-03-13 |
Family
ID=16334083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1195013A Pending JPH0358453A (en) | 1989-07-26 | 1989-07-26 | Resin sealed type semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0358453A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5886400A (en) * | 1995-08-31 | 1999-03-23 | Motorola, Inc. | Semiconductor device having an insulating layer and method for making |
| US6818968B1 (en) * | 2000-10-12 | 2004-11-16 | Altera Corporation | Integrated circuit package and process for forming the same |
| JP2008227348A (en) * | 2007-03-15 | 2008-09-25 | Sanyo Electric Co Ltd | Semiconductor device and manufacturing method thereof |
-
1989
- 1989-07-26 JP JP1195013A patent/JPH0358453A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5886400A (en) * | 1995-08-31 | 1999-03-23 | Motorola, Inc. | Semiconductor device having an insulating layer and method for making |
| US6818968B1 (en) * | 2000-10-12 | 2004-11-16 | Altera Corporation | Integrated circuit package and process for forming the same |
| JP2008227348A (en) * | 2007-03-15 | 2008-09-25 | Sanyo Electric Co Ltd | Semiconductor device and manufacturing method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4974057A (en) | Semiconductor device package with circuit board and resin | |
| JP2553924B2 (en) | Packaged electronic device having peripheral carrier structure | |
| US6420790B1 (en) | Semiconductor device | |
| JP3494901B2 (en) | Semiconductor integrated circuit device | |
| US6680220B2 (en) | Method of embedding an identifying mark on the resin surface of an encapsulated semiconductor package | |
| US20050003583A1 (en) | Micro lead frame package and method to manufacture the micro lead frame package | |
| US7151013B2 (en) | Semiconductor package having exposed heat dissipating surface and method of fabrication | |
| JPH0358453A (en) | Resin sealed type semiconductor integrated circuit device | |
| JPH04255264A (en) | Hybrid integrated circuit | |
| JPH0888292A (en) | Single-sided resin-sealed semiconductor package, single-sided resin-sealed semiconductor device, and manufacturing method thereof | |
| JPS58182854A (en) | Resin-sealed semiconductor device and manufacture thereof | |
| KR940010298A (en) | Semiconductor package and manufacturing method thereof | |
| JPH02275655A (en) | Hybrid integrated circuit | |
| JPH07101729B2 (en) | Multi-chip semiconductor device and manufacturing method thereof | |
| KR950002001A (en) | Semiconductor package | |
| JPH0521653A (en) | Resin sealed type semiconductor device | |
| KR940008328B1 (en) | Film-type semiconductor package (F-PAC: Film-Type Package) and its manufacturing method | |
| JPH0982877A (en) | Resin-sealed semiconductor device and lead frame member used therefor | |
| JPS60198835A (en) | Semiconductor memory device | |
| KR940008056A (en) | Semiconductor device and manufacturing method thereof | |
| JPH03259555A (en) | Lead frame | |
| JPH02125653A (en) | Hybrid integrated circuit device | |
| JPS60206153A (en) | Semiconductor device | |
| JPS5881952U (en) | Hybrid IC package structure | |
| JPS59134851A (en) | Semiconductor device |