JPH036002A - Manufacture of electronic component - Google Patents

Manufacture of electronic component

Info

Publication number
JPH036002A
JPH036002A JP1141444A JP14144489A JPH036002A JP H036002 A JPH036002 A JP H036002A JP 1141444 A JP1141444 A JP 1141444A JP 14144489 A JP14144489 A JP 14144489A JP H036002 A JPH036002 A JP H036002A
Authority
JP
Japan
Prior art keywords
electronic component
resin
component elements
electronic
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1141444A
Other languages
Japanese (ja)
Inventor
Takamichi Kitajima
北嶋 宝道
Yoshiharu Kuroda
黒田 義晴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP1141444A priority Critical patent/JPH036002A/en
Publication of JPH036002A publication Critical patent/JPH036002A/en
Pending legal-status Critical Current

Links

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

PURPOSE:To manufacture electronic components at low cost, in large quantities and stably by a method wherein a dip treatment is executed in a state that electronic- component elements are arranged in line, a resin outer-package part is formed collectively and, after that, the resin outer-package part is cut at gap parts and is separated into discrete electronic components provided with single resin outer-package parts. CONSTITUTION:A plurality of electronic-component elements 3 are connected to terminals 5 via lead terminals 4 by keeping a gap interval (l). When the electronic- component elements 3 are piezoelectric resonators, oscillation parts 3a are coated with a wax 6. Then, a gap interval between the terminals 5 is set to (m); the plurality of electronic-component elements 3 are arranged in line and are dip-treated in a resin tank. Then, e.g. central parts of discrete resin outer-package parts 2' of the gap intervals (l), (m) as indicated by broken lines (y) are cut by using a cutter 7 or the like whose plurality of blades 7a have been supported by a cutter-blade support axis 7b; discrete electronic components 1 provided with single resin outer-package parts 2 which have been cut and molded are completed. Thereby, the electronic components provided with the resin outer-package parts whose outer dimensional accuracy is high can be produced at low cost, in large quantities and stably.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子部品の製造方法の改良に係り、詳しくは高
い外形寸法精度の樹脂外装部を有する電子部品を安(面
にかつ大量に安定して生産し得るようにした電子部品の
製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a method for manufacturing electronic components, and more particularly, to a method for manufacturing electronic components having a resin exterior portion with high external dimensional accuracy in a stable manner (in terms of surface and mass). The present invention relates to a method for manufacturing electronic components that can be produced by

〔従来技術〕[Prior art]

第6図は、従来の製造方法に基づいて製造された完成状
態の電子部品51を示しており、電子部品素子52は高
い寸法精度で所定外形寸法に成形された樹脂外装部53
により被われている。
FIG. 6 shows an electronic component 51 in a completed state manufactured based on a conventional manufacturing method, in which an electronic component element 52 has a resin exterior portion 53 molded to a predetermined external dimension with high dimensional accuracy.
covered by.

なお、この図のfatはこの電子部品51の縦断面模式
図、(blは同電子部品51の正面図である。
Note that fat in this figure is a schematic vertical cross-sectional view of the electronic component 51, and (bl is a front view of the electronic component 51).

図の01+に示す空間53.は、たとえば電子部品素子
52が圧電共振子である場合等に設けられる。
Space 53 shown at 01+ in the figure. is provided, for example, when the electronic component element 52 is a piezoelectric resonator.

この空間53、により圧電共振子の振動部52&は、樹
脂外装部53と非接触状態を保つことができ、振動障害
とならない。
This space 53 allows the vibrating part 52& of the piezoelectric resonator to maintain a non-contact state with the resin exterior part 53, and does not cause vibration disturbance.

リード端子54は、この電子部品素子52に接続されて
おり、同電子部品素子52への電力供給等を行なう。
The lead terminal 54 is connected to the electronic component element 52 and supplies power to the electronic component element 52.

次に、この電子部品51を従来の製造方法に基づいて製
造する場合の工程を第4図、第5図を用いて順に説明す
る。
Next, steps for manufacturing this electronic component 51 based on a conventional manufacturing method will be explained in order using FIGS. 4 and 5.

第4図はディップ処理する前の工程の一状態を示してお
り、この図のfatは、電子部品素子52がリード端子
54を介して端子55に間隔りだけ離れて複数個接続さ
れているところを模式的に示している。また、この図の
fb)はこの状態を上から見たところを模式的に示して
おり、電子部品素子52が例えば圧電共振子である場合
には、その振動部52aの部分にワックス56が塗布さ
れる。この図のように例えば端子55を間隔Mだけあけ
て配列した状態で、電子部品素子52の部分を図示され
ない樹脂槽でディップ処理すると、上述した間隔り、M
があることにより各々の電子部品素子52の周囲に各電
子部品素子52毎に独立して暑射脂が付着する。
FIG. 4 shows one state of the process before dipping treatment, and fat in this figure is where a plurality of electronic component elements 52 are connected to terminals 55 via lead terminals 54 at intervals. is schematically shown. Further, fb) in this figure schematically shows this state viewed from above, and when the electronic component element 52 is, for example, a piezoelectric resonator, the wax 56 is applied to the vibrating part 52a. be done. For example, when the terminals 55 are arranged at intervals M as shown in this figure, and the electronic component elements 52 are dipped in a resin bath (not shown), the above-mentioned intervals M
As a result, heat radiation adheres to the periphery of each electronic component element 52 independently for each electronic component element 52.

そして、その状態のまま焼付処理し、付着した樹脂を硬
化させる。
Then, baking is performed in that state to harden the adhered resin.

第51fflfa1.(blはそれぞれ以上の処理工程
が完了したときの一状態を示す縦断面模式図3および正
面模式図であり、電子部品素子52は硬化状態の樹脂外
装部53′に被われている。なお、この時ワックス56
 (第4図山))が塗布されていた部分は空間538と
なる。
51st fflfa1. (bl is a vertical cross-sectional schematic diagram 3 and a front schematic diagram respectively showing one state when the above processing steps are completed, and the electronic component element 52 is covered with a resin exterior part 53' in a hardened state. At this time wax 56
(Fig. 4 mountain)) is applied as a space 538.

この樹脂外装部53′の一点鎖線Xで示す天面の一部お
よび破線Yで示す外側面の一部はカットあるいは削り取
られて成形され所定外形寸法精度が出され、端子55が
切断されて第6図に示す所定外形寸法に成形された樹脂
外装部53を有する電子部品51が完成する。
A part of the top surface of this resin exterior part 53' indicated by a dashed line The electronic component 51 having the resin exterior portion 53 molded to the predetermined external dimensions shown in FIG. 6 is completed.

特に、SMP対応樹脂タイプの場合、上記外形寸法精度
がとりわけ要求される。
In particular, in the case of an SMP compatible resin type, the above-mentioned external dimensional accuracy is particularly required.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の電子部品の製造方法では、高い寸法精度
が要求される所定外形寸法の樹脂外装部53を成形する
とき、樹脂外装部53′の天面および外αす面の5面を
加工する必要があり、成形工程が複雑であった。
In the conventional electronic component manufacturing method described above, when molding the resin sheathing part 53 with a predetermined external dimension that requires high dimensional accuracy, five surfaces of the resin sheathing part 53', including the top surface and the outer surface, are processed. The molding process was complicated.

したがって、量産性に乏しく大幅なコスト高の要因とな
っていた。
Therefore, it is not suitable for mass production and is a factor in significantly increasing costs.

従って、本発明は高い外形寸法精度の樹脂外装部を有す
る電子部品を安価にかつ大量に安定して生産し得るよう
にした電子部品の製造方法を提供することを目的として
なされたものである。
Therefore, it is an object of the present invention to provide a method for manufacturing electronic components that enables the stable production of electronic components having resin exterior parts with high external dimensional accuracy at low cost and in large quantities.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成するために、本発明は、複数個の電子部
品素子をデイ7ブ外装処理する電子部品の製造方法にお
いて、上記電子部品素子を複数個デイツブするとき該電
子部品素子間の全ての隙間に樹脂が入り込んで上記複数
個の電子部品素子全体が樹脂に被われて一体となるよう
な隙間間隔となるように上記電子部品素子を整列配列し
た状態でディップ処理して樹脂外装部を一体的に形成し
、そのi&該樹脂外装部を上記隙間の部分でカットし、
単独の樹脂外装部を備えた各電子部品に分離するように
したことを特徴とする電子部品の製造方法として構成さ
れている。
In order to achieve the above object, the present invention provides a method for manufacturing an electronic component in which a plurality of electronic component elements are subjected to a seven-layer coating process, in which all the parts between the electronic component elements are The electronic component elements are aligned and arranged so that the resin enters the gap and the plurality of electronic component elements are all covered with the resin and are integrated, and the resin exterior portion is integrated by dipping. and cut the i & the resin exterior part at the gap part,
The present invention is configured as a method of manufacturing an electronic component, characterized in that the electronic component is separated into each electronic component having a single resin exterior part.

〔実施例〕〔Example〕

以下、添付図面を参照して、本発明を具体化した実施例
につき説明し、本発明の理解に供する。
Hereinafter, embodiments embodying the present invention will be described with reference to the accompanying drawings to provide an understanding of the present invention.

尚、以下の実施例は、本発明を具体化した一例であって
、本発明の技術的範囲を限定する性格のものではない。
It should be noted that the following examples are examples embodying the present invention, and are not intended to limit the technical scope of the present invention.

第1図fal、 Q)lは本発明の一実施例に係る電子
部品の製造方法におけるディップ処理の工程前の一状態
を示す模式図、第2図+a+、 Cblは同電子部品の
製造方法におけるカット処理の工程前の一状態を示す模
式図、第3図は同電子部品の製造方法における同電子部
品の完成状態を示す斜視図である。
Fig. 1 fal, Q)l is a schematic diagram showing a state before the step of dipping in the method for manufacturing an electronic component according to an embodiment of the present invention, and Fig. 2 +a+, Cbl is a schematic diagram showing a state before the step of dipping in the method for manufacturing an electronic component according to an embodiment of the present invention. FIG. 3 is a schematic diagram showing a state before the cutting process, and FIG. 3 is a perspective view showing a completed state of the electronic component in the method of manufacturing the electronic component.

第3図に示した電子部品1を製造する場合の工程の一例
を第1図、第2図を用いて順に説明する。
An example of the process for manufacturing the electronic component 1 shown in FIG. 3 will be explained in order using FIGS. 1 and 2.

第1図はディップ処理する前の工程の状態を示しており
、この図のfalは電子部品素子3がリード端子4を介
して端子5に隙間間隔lだけ離れて複数価接続されてい
るところを模式的に示している。
FIG. 1 shows the state of the process before the dip treatment, and fal in this figure indicates that the electronic component element 3 is multi-valently connected to the terminal 5 via the lead terminal 4 at a gap distance l. Shown schematically.

また、この図の中)はこの状態を上から見たところを模
式的に示しており、電子部品素子3が例えば圧電共振子
である場合には、その振動部3.の部分にワックス6が
塗布される。
In addition, in this figure), this state is schematically shown as viewed from above, and when the electronic component element 3 is, for example, a piezoelectric resonator, its vibrating portion 3. Wax 6 is applied to the area.

この図のように、例えば端子5間の隙間間隔をmだけあ
けて整列配列してから、この複数個の電子部品素子30
部分を図示されない樹脂槽でディップ処理する。上述し
た隙間間隔β1mは、上記ディップ処理したときこの電
子部品素子3間の全ての隙間に樹脂が入り込んでこの複
数個の電子部品素子3全体が樹脂の表面張力により一体
となって被われる程度に設定する。
As shown in this figure, for example, after arranging the terminals 5 with a gap of m, the plurality of electronic component elements 30
The portion is dipped in a resin bath (not shown). The above-mentioned gap interval β1m is set to such an extent that when the dip treatment is performed, the resin enters all the gaps between the electronic component elements 3 and the entire plurality of electronic component elements 3 are covered as one by the surface tension of the resin. Set.

たとえば、隙間間隔iは3mm、隙間間隔mは2゜51
mのように設定する。
For example, the gap distance i is 3 mm, and the gap distance m is 2°51
Set it like m.

ここで、従来の第4図と比較すると間隔り、 Mが狭め
られ、隙間間隔1.mとされる点のみが異なる。
Here, when compared with the conventional figure 4, the gap M is narrowed, and the gap spacing is 1. The only difference is that it is assumed to be m.

そして、上述したようなディップ処理し、その後焼付処
理して樹脂を硬化させる。
Then, a dip treatment as described above is performed, and then a baking treatment is performed to harden the resin.

第2図(a)、 Cblはそれぞれ以上の処理工程が完
了したときの一状態を示す縦断面模式図、および平面模
式図であり、電子部品素子3の周囲に上述のディップ処
理工程で樹脂外装部2′が一体的に形成され、その後の
焼付処理工程で同+n脂外装部2′が硬化した状態とな
ったところを示している。なお、この時ワックス6(第
1図山))が塗布されていた部分が空間となるのは従来
と同様である。
FIG. 2(a) and Cbl are a schematic vertical cross-sectional view and a schematic plan view showing one state when the above processing steps are completed, respectively, and the resin exterior is coated around the electronic component element 3 by the above-mentioned dip processing step. The part 2' is integrally formed, and the same+N resin exterior part 2' is shown to be in a hardened state in the subsequent baking process. It should be noted that, at this time, the area where the wax 6 (mountain in Figure 1) was applied becomes a space, as in the conventional case.

この香討脂外装部2′の一点鎖線Xで示す天面の一部は
カットあるいは削り取られる。また更に、例えば第2図
(blに示すような複数個の刃71が力・7ター刃支持
軸7bにより支えられてなるカッター7等により、破線
yで示すように隙間間隔1mのそれぞれの樹脂外装部2
′のたとえば中心部分をカットし、第3図に示すような
単独のカット成形された樹脂外装部2を備えた各電子部
品1が完成する。
A part of the top surface of the incense resin exterior part 2' indicated by the dashed line X is cut or scraped off. Furthermore, for example, a cutter 7 or the like in which a plurality of blades 71 as shown in FIG. Exterior part 2
For example, the center portion of the electronic component 1 is cut, and each electronic component 1 having a single cut-molded resin exterior portion 2 as shown in FIG. 3 is completed.

したがって、−度に大量の電子部品1を得ることができ
るので、同電子部品1を従来に比べ安価に生産できる。
Therefore, since a large amount of electronic components 1 can be obtained at a time, the electronic components 1 can be produced at a lower cost than in the past.

また、樹脂外装部2の外形寸法の精度は、カッター刃7
1の間隔をほぼ同一となるように精度管理するだけで安
定する。
In addition, the accuracy of the outer dimensions of the resin sheathing part 2 is as follows:
Stability can be achieved simply by controlling the accuracy so that the intervals between 1's are almost the same.

たとえば±0.1 amの精度とすることは容易である
For example, it is easy to achieve an accuracy of ±0.1 am.

また、カントする時の樹脂外装部2′に与える外力分布
も良好となり「ヒビ割れ」も発生しなくなる。したがっ
て歩留まりも向上する。
Furthermore, the external force applied to the resin sheath 2' when canting is well distributed, and "cracks" do not occur. Therefore, the yield is also improved.

〔発明の効果〕〔Effect of the invention〕

本発明により、複数個の電子部品素子をディップ外装処
理する電子部品の製造方法において、上記電子部品素子
を複数個ディップするとき該電子部品素子間の全ての隙
間に樹脂が入り込んで上記複数個の電子部品素子全体が
樹脂に被われて一体となるような隙間間隔となるように
上記電子部品素子を整列配列した状態でディップ処理し
て樹脂外装部を一体的に形成し、そのt&該樹脂外装部
を上記隙間の部分でカットし、単独の樹脂外装部を備え
た各電子部品に分離するようにしたことを特徴とする電
子部品の製造方法が提供される。
According to the present invention, in the electronic component manufacturing method in which a plurality of electronic component elements are subjected to dip exterior processing, when the plurality of electronic component elements are dipped, the resin enters all the gaps between the electronic component elements and the plurality of electronic component elements are immersed. The above-mentioned electronic component elements are aligned and arranged with gaps such that the entire electronic component element is covered with resin and integrated, and a resin exterior portion is integrally formed by dipping treatment, and the resin exterior portion is formed integrally with the resin exterior. There is provided a method of manufacturing an electronic component, characterized in that the electronic component is cut at the gap and separated into electronic components each having a single resin exterior part.

したがって、高い外形寸法精度の樹脂外装部を有する電
子部品を安価にかつ大量に安定して生産することができ
る。
Therefore, electronic components having resin exterior parts with high external dimensional accuracy can be stably produced at low cost and in large quantities.

また、この電子部品形状は面が平らであるので、フラッ
トタイプ電子部品として用いることもできる。
Further, since this electronic component shape has a flat surface, it can also be used as a flat type electronic component.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(al、 (1))は本発明の一実施例に係る電
子部品の製造方法におけるディップ処理の工程前の一状
態を示す模式図、第2図(al、 (b)は同電子部品
の製造方法におけるカット処理の工程前の一状態を示す
模式図、第3図は同電子部品の製造方法における同電子
部品の完成状態を示す斜視図、第4図(al、 (bl
は従来の電子部品の製造方法におけるディップ処理の工
程前の一状態を示す模式図、第5図fan、 Cblは
従来の電子部品の製造方法におけるカント処理の工程前
の一状態を示す模式図、第6図(al(b)は従来の電
子部品の製造方法に基づいて製造された完成状態の電子
部品の模式図である。 〔符号の説明〕 1・・・電子部品 2.2′・・・樹脂外装部 3・・・電子部品素子 l1m・・・隙間間隔
FIG. 1 (al, (1)) is a schematic diagram showing a state before the dip treatment step in the method of manufacturing an electronic component according to an embodiment of the present invention, and FIG. FIG. 3 is a schematic diagram showing a state before the cutting process in the method for manufacturing a component; FIG. 3 is a perspective view showing a completed state of the electronic component in the method for manufacturing the electronic component; FIG.
5 is a schematic diagram showing a state before the step of dipping treatment in a conventional method for manufacturing electronic components, FIG. FIG. 6 (al(b)) is a schematic diagram of a completed electronic component manufactured based on a conventional electronic component manufacturing method. [Explanation of symbols] 1...Electronic component 2.2'...・Resin exterior part 3...Electronic component element l1m...Gap interval

Claims (1)

【特許請求の範囲】[Claims] 1. 複数個の電子部品素子をディップ外装処理する電
子部品の製造方法において、 上記電子部品素子を複数個ディップするとき該電子部品
素子間の全ての隙間に樹脂が入り込んで上記複数個の電
子部品素子全体が樹脂に被われて一体となるような隙間
間隔となるように上記電子部品素子を整列配列した状態
でディップ処理して樹脂外装部を一体的に形成し、その
後該樹脂外装部を上記隙間の部分でカットし、単独の樹
脂外装部を備えた各電子部品に分離するようにしたこと
を特徴とする電子部品の製造方法。
1. In an electronic component manufacturing method in which a plurality of electronic component elements are subjected to dip exterior processing, when the plurality of electronic component elements are dipped, resin enters all the gaps between the electronic component elements and the entire plurality of electronic component elements are coated. The above-mentioned electronic component elements are aligned and arranged so that the gaps are such that they are covered with the resin and are integrated, and then dip treatment is performed to integrally form the resin exterior part. A method of manufacturing an electronic component, characterized in that the electronic component is cut into parts and separated into each electronic component having a single resin exterior part.
JP1141444A 1989-06-02 1989-06-02 Manufacture of electronic component Pending JPH036002A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1141444A JPH036002A (en) 1989-06-02 1989-06-02 Manufacture of electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1141444A JPH036002A (en) 1989-06-02 1989-06-02 Manufacture of electronic component

Publications (1)

Publication Number Publication Date
JPH036002A true JPH036002A (en) 1991-01-11

Family

ID=15292079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1141444A Pending JPH036002A (en) 1989-06-02 1989-06-02 Manufacture of electronic component

Country Status (1)

Country Link
JP (1) JPH036002A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0615339U (en) * 1992-07-24 1994-02-25 日本特殊陶業株式会社 Ladder type electric filter
JPH0697754A (en) * 1992-09-16 1994-04-08 Murata Mfg Co Ltd Manufacture of chip type piezoelectric resonator
JPH06152292A (en) * 1992-11-13 1994-05-31 Murata Mfg Co Ltd Production of piezo-electric resonator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0615339U (en) * 1992-07-24 1994-02-25 日本特殊陶業株式会社 Ladder type electric filter
JPH0697754A (en) * 1992-09-16 1994-04-08 Murata Mfg Co Ltd Manufacture of chip type piezoelectric resonator
JPH06152292A (en) * 1992-11-13 1994-05-31 Murata Mfg Co Ltd Production of piezo-electric resonator

Similar Documents

Publication Publication Date Title
JPS58172008A (en) Structure and manufacture of piezoelectric oscillator
JPH036002A (en) Manufacture of electronic component
DE3239594A1 (en) PIEZOELECTRIC CRYSTAL ARRANGEMENT AND METHOD FOR MASS PRODUCTION THEREOF
JPH0122975B2 (en)
US8030827B2 (en) Crystal unit
JPH03121608A (en) Manufacture of piezoelectric component
JP2931592B2 (en) Energy trapping type piezoelectric vibrator and method of manufacturing the same
JPS63248209A (en) Manufacture of rectangular chip type electronic component
JPS61218213A (en) Electronic component and its manufacture
JPH02263499A (en) Assembly of high frequency apparatus frame
JPH0373603A (en) Manufacture of unified dielectric substance coaxial resonator
KR100332623B1 (en) surface vibrationmode piero-electric ceramic resonator andits manufacturing method
JPS6014226Y2 (en) Holding structure of circuit board for electric clock
JP3190508B2 (en) Method for forming voids in piezoelectric resonant component
JPH0152883B2 (en)
JPS6238348Y2 (en)
JPS63284919A (en) Piezoelectric oscillator and its manufacture
JPH0595243A (en) Production of electronic component
JPS6392101A (en) Method for forming electrodes of dielectric resonator
JPH0394506A (en) Manufacture of electronic component
DE1514422C3 (en) Process for the series production of semiconductor components
JPH05335862A (en) Manufacture of piezoelectric resonator
JPH02198210A (en) Manufacture of piezoelectric component
JPH01228311A (en) Production of piezoelectric resonator
JPH06334465A (en) Chip electronic component and its manufacture