JPH036015A - Semiconductor film - Google Patents

Semiconductor film

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Publication number
JPH036015A
JPH036015A JP14065489A JP14065489A JPH036015A JP H036015 A JPH036015 A JP H036015A JP 14065489 A JP14065489 A JP 14065489A JP 14065489 A JP14065489 A JP 14065489A JP H036015 A JPH036015 A JP H036015A
Authority
JP
Japan
Prior art keywords
thin film
semiconductor film
whose
particle size
irregularity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14065489A
Other languages
Japanese (ja)
Inventor
Masumitsu Ino
益充 猪野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP14065489A priority Critical patent/JPH036015A/en
Publication of JPH036015A publication Critical patent/JPH036015A/en
Pending legal-status Critical Current

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To reduce an irregularity in a characteristic at each product by a method wherein a crystal particle size is controlled within a specific range and a hydrogen treatment is executed so as to reduce an irregularity in the particle size and to set a hydrogen content to a specific range. CONSTITUTION:An insulating substrate 1 is formed in a flat-board shape having a comparatively large size; a thin film 2 composed of silicon is applied to and formed on its upper surface. The thin film 2 is formed by applying a glow discharge method, a CVD method, an electron-beam vapor deposition or the Iike; the insulating substrate 1 where this thin film 2 has been applied and formed is placed on a support body 3. During this process, the substrate is placed in such a way that the thin film 2 is situated at the lower side and that the thin film 2 comes into contact with the susceptor 3. This semiconductor film is composed of polycrystalline silicon whose hydrogen content is 10<18> to 10<21>atoms/cm<3>, whose crystallization rate is 70 to 100% and whose crystal particle size is 50 to 70Angstrom . Thereby, it is possible to obtain the semiconductor film whose irregularity as a product is small.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体膜に関する。さらに詳しくは薄膜半導
体の半導体層として有用な半導体膜に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor film. More specifically, the present invention relates to a semiconductor film useful as a semiconductor layer of a thin film semiconductor.

この半導体は、光センサ、IC1各種デイスプレィに応
用される。
This semiconductor is applied to optical sensors and various types of IC1 displays.

〔従来技術〕[Prior art]

従来、半導体膜におけるSiの特性を充分に引き出すた
めには、単結晶状態あるいは多結晶状態のSiを形成す
ることや、結晶内外の欠陥密度を少くすることが必要と
されている。その対応策として非晶質Si、多結晶Si
のレーザ加熱による再結晶化があるが、この方法は、レ
ーザのアニールスポット径が200〜300μm程度の
大きさで走査しているため、必然的にアニル時間が長く
なってしまう。例えば、4インチウェファ−の場合だと
約1時間を要する。このことは生産性の向上をいちじる
しく阻害する。
Conventionally, in order to fully bring out the characteristics of Si in a semiconductor film, it has been necessary to form Si in a single-crystalline or polycrystalline state and to reduce the defect density inside and outside the crystal. As a countermeasure, amorphous Si, polycrystalline Si
However, in this method, the laser annealing spot diameter is scanned with a diameter of about 200 to 300 μm, so the annealing time inevitably becomes longer. For example, in the case of a 4-inch wafer, it takes about 1 hour. This seriously impedes productivity improvement.

また、前記再結晶化にともない粒界が発生するが、この
粒界は、とくにMOS  Trのチャンネル部における
電流即動能力を減少させ、結果として製品特性のバラツ
キを大きくすることになる。
Further, grain boundaries are generated as a result of the recrystallization, and these grain boundaries reduce the current instantaneous ability, particularly in the channel portion of the MOS Tr, and as a result, increase variations in product characteristics.

〔目  的〕〔the purpose〕

本発明の目的は、TrとくにMOSTrのチャンネル部
における粒界数を製品毎にできるだけ一定にすること、
ひいては該チャンネル部での電流開動能力をできるだけ
均一にする点にある。
The purpose of the present invention is to make the number of grain boundaries in the channel part of a Tr, especially a MOSTr, as constant as possible for each product;
Furthermore, the aim is to make the current opening ability in the channel part as uniform as possible.

〔構  成〕〔composition〕

本発明者は、前記目的を達成するため鋭意研究を正ねた
結果、ランプアニール加熱によると粒界数を比較的一定
にすることができ、これを利用して特定の条件を満足す
る半導体膜を形成すると、製品としてき力めてバラツキ
の少ない半導体膜を得ることができることを発見した。
As a result of intensive research to achieve the above object, the inventors of the present invention have found that lamp annealing can make the number of grain boundaries relatively constant, and that this can be used to create semiconductor films that satisfy specific conditions. It was discovered that by forming a semiconductor film, it is possible to obtain a semiconductor film with less variation as a product.

すなわち、本発明の半導体膜は、 (a)水素含有i1018〜1018atom/cm3
(b)結晶化率70〜100% (c)結晶粒径50〜70人 の多結晶シリコーンよりなることを特徴とするものであ
る。
That is, the semiconductor film of the present invention has (a) hydrogen-containing i1018-1018 atoms/cm3
(b) Crystallization rate of 70-100% (c) It is characterized by being made of polycrystalline silicone with a crystal grain size of 50-70%.

本発明において、半導体膜に水素を添加しない場合はS
i中のダングリングボンドがターミネートできず、キャ
リアのトラップ原因となる。
In the present invention, when hydrogen is not added to the semiconductor film, S
Dangling bonds in i cannot be terminated, causing carrier trapping.

結晶化率の限定はキャリア移動度を向上させるためのも
のであり、結晶粒径の限定は製品特性のバラツキ防止に
寄与するものである。
Limiting the crystallization rate is to improve carrier mobility, and limiting the crystal grain size contributes to preventing variations in product characteristics.

第1図ないし第3図を用いて本発明を具体的に説明する
。絶縁性基板1は比較的大きな寸法を有する平板状であ
ってその上表面上にシリコンからなる薄膜2を付着形成
しである。この場合、例えば、グロー放電法(pvc法
)、CVD法または電子ビーム蒸着等を適用して薄膜2
が形成されている。この薄膜2を被着形成した絶縁性基
板1を支持体3上に載置する。この場合に、薄膜2を下
側にして薄膜2が支持体3と接触する様に載置する。支
持体3としては単結晶シリコン(lil)ウェハを使用
する。そして、薄膜2の上方に位置させ、電源5に接続
したタングステンハロゲンランプ4によって全体を同時
的に光照射する。この場合、絶縁性基板としては例えば
透明石英等のランプ4からの照射光に対して透過性の物
質を使用する。
The present invention will be specifically explained using FIGS. 1 to 3. The insulating substrate 1 has a flat plate shape with relatively large dimensions, and has a thin film 2 made of silicon deposited on its upper surface. In this case, for example, a glow discharge method (PVC method), a CVD method, or an electron beam evaporation method is applied to form a thin film 2.
is formed. The insulating substrate 1 with the thin film 2 formed thereon is placed on the support 3. In this case, the thin film 2 is placed so as to be in contact with the support 3 with the thin film 2 facing downward. As support 3 a single crystal silicon (LIL) wafer is used. Then, the entire area is simultaneously irradiated with light using a tungsten halogen lamp 4 located above the thin film 2 and connected to a power source 5. In this case, the insulating substrate is made of a material that is transparent to the light emitted from the lamp 4, such as transparent quartz.

タングステンハロゲンランプ4からの照射光に対しては
単結晶シリコンは大きな光吸収特性を持っているため、
単結晶シリコンから形成される支持体3が最初に加熱さ
れ、その熱は、第2図に矢印Aで示した如く、熱伝導に
よって薄膜2へと伝達される。すると、支持体3と薄膜
2との界面から薄膜2の再結晶化が開始する。
Since single-crystal silicon has strong light absorption characteristics for the irradiated light from the tungsten halogen lamp 4,
The support 3 made of monocrystalline silicon is first heated, and the heat is transferred to the thin film 2 by thermal conduction, as indicated by arrow A in FIG. Then, recrystallization of the thin film 2 starts from the interface between the support 3 and the thin film 2.

この様に界面に単結晶シリコン2′が形成されると、こ
の単結晶シリコン2′自身が照射光を吸収して自己加熱
が起こり、薄膜2は均一に加熱される。
When the single crystal silicon 2' is formed at the interface in this manner, the single crystal silicon 2' itself absorbs the irradiated light and self-heats, so that the thin film 2 is uniformly heated.

その結果、粒径の均一化、粒径の制御が容易であるため
、本発明の半導体膜を容易に製造することができる。
As a result, the particle size can be made uniform and the particle size can be easily controlled, so that the semiconductor film of the present invention can be easily manufactured.

実施例 非晶質シリコンからなる薄膜2を、RFパワー(20W
)、ガス流量20 SCCM、5il14(100%)
、圧力0.1 Torr、基板温度220℃の条件下で
厚さ0゜05〜0.5μmに形成する。この場合の絶縁
性基板としては、厚さ0,05〜4 、0mmの透明石
英を使用する。支持体3としてのシリコンウェハは直径
6インチで結晶配向(111)P型であり、厚さ0.4
〜0.6mmとする。
Example A thin film 2 made of amorphous silicon was heated with RF power (20W).
), gas flow rate 20 SCCM, 5il14 (100%)
, a thickness of 0.05 to 0.5 μm under conditions of a pressure of 0.1 Torr and a substrate temperature of 220° C. In this case, transparent quartz having a thickness of 0.05 to 4.0 mm is used as the insulating substrate. The silicon wafer as support 3 has a diameter of 6 inches, crystal orientation (111) P type, and a thickness of 0.4
~0.6mm.

使用したランプアニール装置は、タングステンハロゲン
ランプをもち、加熱特性は、第4図のとおりであり、加
熱温度は750〜900℃、加熱時間は30〜1000
秒である。
The lamp annealing device used had a tungsten halogen lamp, and the heating characteristics were as shown in Figure 4, with a heating temperature of 750 to 900°C and a heating time of 30 to 1000°C.
Seconds.

アニールはN2.Ar、Ne等の不活性ガス中で行う。Annealing is N2. It is carried out in an inert gas such as Ar or Ne.

水素化は、H2雰囲気下、RFパワー (18KW)、
処理時間60分であった。
Hydrogenation was performed under H2 atmosphere with RF power (18KW),
The processing time was 60 minutes.

第5図上側の線はラマン分光のピーク値を示す特性カー
ブであり、縦軸aがこれに対応しており、この縦軸aは
ラマン分光による波形のピーク位N (am−1)を示
す。第5図下側の線は結晶粒径を示す特性カーブであり
、縦軸すがこれに対応しており、この縦軸すはTEM 
(透過型電子顕微鏡)かられり出した結晶粒径(入)を
示す。
The upper line in Figure 5 is a characteristic curve showing the peak value of Raman spectroscopy, and the vertical axis a corresponds to this, and this vertical axis a shows the peak position N (am-1) of the waveform by Raman spectroscopy. . The lower line in Figure 5 is a characteristic curve showing the crystal grain size, and the vertical axis corresponds to this.
(Transmission electron microscope) Shows the crystal grain size (in) that protrudes.

第5図により明らかなとおり、多結晶Si膜の結晶粒が
アニール時間とともに(アニール温度800℃)成長し
てゆき、120秒でほぼ目的の粒径60人の結晶に成長
していることがわかる。
As is clear from Figure 5, the crystal grains of the polycrystalline Si film grow as the annealing time increases (annealing temperature: 800°C), and in 120 seconds they have grown to approximately the desired grain size of 60mm crystals. .

アニール温度が900℃のときは30秒でほぼ目的を達
成できる。
When the annealing temperature is 900°C, almost the objective can be achieved in 30 seconds.

〔効  果〕〔effect〕

本発明は、結晶粒径が50〜70人と制御されており、
粒径のバラツキが小さく、又、特定範囲の水素含有量に
なるように水素処理がほどこされているため、スピン密
度が補償されている。
In the present invention, the crystal grain size is controlled to 50 to 70 people,
The spin density is compensated because the particle size variation is small and the hydrogen treatment is performed so that the hydrogen content falls within a specific range.

これにより本発明の半導体膜は、通常の薄膜半導体(T
PT)として使用したとき、製品毎の特性のバラツキが
極めて小さい(第6図)。これに対して、従来型のもの
は粒径が2000人〜3μ人とびもきかあるため、どう
しても製品毎の特性のバラツキが大きい(第7図)。
As a result, the semiconductor film of the present invention can be used as a normal thin film semiconductor (T
When used as PT), the variation in characteristics from product to product is extremely small (Fig. 6). On the other hand, since the particle size of the conventional type varies from 2000 to 3 μm, the characteristics inevitably vary greatly from product to product (Fig. 7).

また、この半導体膜をMO5Trの半導体層として使用
したときは100〜1 、0OOQuxの光照射時にお
いて1 xlO−G〜1xlO−’(00m) −1の
比抵抗を示すので、光センサ用として有用である。
In addition, when this semiconductor film is used as a semiconductor layer of MO5Tr, it exhibits a specific resistance of 100 to 1, and 1xlO-G to 1xlO-'(00m)-1 when irradiated with light of 0OOQux, making it useful as an optical sensor. It is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半導体膜の製造に使用するランプアニ
ール装置、第2図はその断面図、第3図(a)〜(c、
)はその再結晶化過程を示す断面図である。第4図は同
装置の加熱特性を示す。第5図はN2下、800℃アニ
ールにおけるラマン分光、TEM特性のアニール時間依
存性を調べたものである。第6図は本発明によるTPT
の特性のバラツキを、第7図は従来型TPTの特性のバ
ラツキを示す。 1・・・絶縁性基板   2・・・薄  股2′・・・
単結晶シリコン 3・・支持体4°゛°タングステンハ
ロゲンランプ 5・・・電源 第1図 Td:アニールS区l ↑dニアニール8寺間 Rh’J!3’!’ 第2図 アニール時聞矛7
FIG. 1 shows a lamp annealing apparatus used for manufacturing the semiconductor film of the present invention, FIG. 2 is a cross-sectional view thereof, and FIGS. 3(a) to (c).
) is a cross-sectional view showing the recrystallization process. FIG. 4 shows the heating characteristics of the device. FIG. 5 shows an investigation of the annealing time dependence of Raman spectroscopy and TEM characteristics during annealing at 800° C. under N2. FIG. 6 shows a TPT according to the present invention.
Figure 7 shows the variations in the characteristics of the conventional TPT. 1... Insulating substrate 2... Thin crotch 2'...
Single crystal silicon 3...Support 4°゛°tungsten halogen lamp 5...Power source Figure 1 Td: Anneal S section ↑d Near anneal 8 Terama Rh'J! 3'! ' Fig. 2 Anneal Time Bullet 7

Claims (1)

【特許請求の範囲】 1、(a)水素含有量10^1^8〜10^2^1at
om/cm^3、(b)結晶化率70〜100%、 (c)結晶粒径50〜70Å の多結晶シリコンよりなることを特徴とする半導体膜。
[Claims] 1. (a) Hydrogen content 10^1^8 to 10^2^1at
om/cm^3, (b) crystallization rate of 70 to 100%, and (c) crystal grain size of 50 to 70 Å.
JP14065489A 1989-06-02 1989-06-02 Semiconductor film Pending JPH036015A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14065489A JPH036015A (en) 1989-06-02 1989-06-02 Semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14065489A JPH036015A (en) 1989-06-02 1989-06-02 Semiconductor film

Publications (1)

Publication Number Publication Date
JPH036015A true JPH036015A (en) 1991-01-11

Family

ID=15273672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14065489A Pending JPH036015A (en) 1989-06-02 1989-06-02 Semiconductor film

Country Status (1)

Country Link
JP (1) JPH036015A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62220498A (en) * 1986-03-11 1987-09-28 株式会社タツノ・メカトロニクス Refueling device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62220498A (en) * 1986-03-11 1987-09-28 株式会社タツノ・メカトロニクス Refueling device

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