JPH0362324B2 - - Google Patents

Info

Publication number
JPH0362324B2
JPH0362324B2 JP61012423A JP1242386A JPH0362324B2 JP H0362324 B2 JPH0362324 B2 JP H0362324B2 JP 61012423 A JP61012423 A JP 61012423A JP 1242386 A JP1242386 A JP 1242386A JP H0362324 B2 JPH0362324 B2 JP H0362324B2
Authority
JP
Japan
Prior art keywords
current
winding
transistor
voltage
transformers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61012423A
Other languages
Japanese (ja)
Other versions
JPS61173669A (en
Inventor
Ryohei Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61012423A priority Critical patent/JPS61173669A/en
Publication of JPS61173669A publication Critical patent/JPS61173669A/en
Publication of JPH0362324B2 publication Critical patent/JPH0362324B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Transformers For Measuring Instruments (AREA)
  • Dc-Dc Converters (AREA)
  • Electronic Switches (AREA)

Description

【発明の詳細な説明】 この発明は直流電流を検出する方法を用いてト
ランジスタを駆動する半導体スイツチ装置に関す
るものである。従来より直流電流を検出する方法
にはDC−CTを用いるのが一般的であるが、これ
には検出用のAC電源が必要である。かつまた2
磁心を用いてそれらに巻回された2次巻線を直列
に接続する方式にあつては一方磁心の飽和の度に
スリツトリツプルを発生するものである、しか
し、この発明の半導体スイツチ装置においては単
一直流電源にて検出を可能とし、かつ出力リツプ
ルの少ない直流電流検出方式を採用してトランジ
スタを駆動するようにしているので、コレクタ電
流の大小に応じてベース電流が増減する様に制御
出来、効率の良いスイツチを実現することが出来
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor switch device that drives a transistor using a method of detecting direct current. Conventionally, DC-CT has been commonly used as a method for detecting direct current, but this requires an AC power source for detection. Katsumata 2
In a system in which a magnetic core is used and the secondary windings wound around the magnetic core are connected in series, a slit ripple is generated each time the magnetic core is saturated.However, in the semiconductor switch device of the present invention, a Since the transistor is driven using a DC current detection method that enables detection with a single DC power supply and has low output ripple, it is possible to control the base current to increase or decrease according to the magnitude of the collector current. It is possible to realize an efficient switch.

第1図はこの発明の半導体スイツチ装置の基礎
となる直流電流検出装置の一例であり、第2図は
第1図回路の動作を説明するために時間の経過と
共に、各部電流、電圧について第1図々示極性に
従つて示したものである。第1図においてはSI
被検出電流源、CT1,CT2は変流器であつて、
それぞれ磁心CO1,CO2、1次巻線N11,N
12、2次巻線N21,N22、3次巻線N3
1,N32、4次巻線N41,N42を有する。
各巻線について黒丸印は電圧の誘導極性が同極性
に現れる方向を示す。Q1,Q2はトランジス
タ、D1,D2はダイオード、RD1,RD2,R0
抵抗器、VCは制御用直流電源である。さて今、t0
なる時刻に電流源SIより出力電流iSが供給されて
おり、この時刻にT1なる端子へQ1トランジス
タをトリガするための信号パルスを与えたものと
する。トランジスタQ1がスイツチオンすると、
3次巻線N31には図示極性電圧がVCをもとに
して印加され、その結果、4次巻線N41には図
示極性電圧が誘導されて、本電圧は正帰還的にト
ランジスタQ1をスイツチオンさせる。その結
果、変流器CT1の磁心CO1の磁束φ1がリセツト
される方向に磁振される。CT1の1次巻線N1
1には電流源SIよりiSなる電流が供給されている
ため、N11巻線(巻数n1とし、N12巻線巻
数も等しいとする)とiSとの積、つまりiS×n1ア
ンペアターン積は3次巻線においてもほゞ同じ値
が得られ、N31巻線(巻数n3とし、N32巻
線巻数も同様とする)を流れる電流i31中のiSに対
応する値をi′31×n3≒iS×n1なる関係が成立する。
N41巻線がトランジスタQ1を駆動するため
に、そのベースに供給する電流i41はN31巻線
にとつて負荷電流となり、本電流分をi′41とした
とき、前記i31はこのi′41とi′31との和の電流とな
る。かくしてトランジスタQ1が導通した結果、
そのエミツタ電流はi31+i41なる。そして本電流
は1次電流iSに対応する値となる。
FIG. 1 shows an example of a DC current detection device that is the basis of the semiconductor switch device of the present invention, and FIG. The figures are shown according to the indicated polarity. In Figure 1, S I is a current source to be detected, CT1 and CT2 are current transformers,
Magnetic cores CO1 and CO2, primary windings N11 and N, respectively
12, Secondary winding N21, N22, Tertiary winding N3
1, N32, and quaternary windings N41, N42.
For each winding, the black circle mark indicates the direction in which the induced polarity of the voltage appears to be the same polarity. Q1 and Q2 are transistors, D1 and D2 are diodes, R D1 , R D2 and R 0 are resistors, and V C is a control DC power supply. Well now, t 0
Assume that an output current i S is supplied from the current source S I at a time , and a signal pulse for triggering the Q1 transistor is applied to a terminal T 1 at this time. When transistor Q1 switches on,
An indicated polarity voltage is applied to the tertiary winding N31 based on V C , and as a result, an indicated polarity voltage is induced in the fourth winding N41, and this voltage switches on the transistor Q1 in a positive feedback manner. let As a result, the magnetic flux φ1 of the magnetic core CO1 of the current transformer CT1 is magnetically oscillated in the reset direction. Primary winding N1 of CT1
1 is supplied with a current of i S from the current source S I , so the product of the N11 winding (the number of turns is n1 and the number of turns of the N12 winding is also equal) and i S , that is, i S × n1 ampere-turns. The product has almost the same value in the tertiary winding, and the value corresponding to i S in the current i 31 flowing through the N31 winding (the number of turns is n3, and the same is true for the N32 winding) is i′ 31 The relationship ×n3≒i S ×n1 holds true.
Since the N41 winding drives the transistor Q1, the current i 41 supplied to its base becomes a load current for the N31 winding, and when this current is defined as i' 41 , the above i 31 becomes this i' 41 The current is the sum of and i′ 31 . Thus, as a result of transistor Q1 becoming conductive,
Its emitter current is i 31 + i 41 . Then, the main current has a value corresponding to the primary current i S.

他方、N21巻線では(巻数=n2としN22
巻線巻数も等しいとする)図示極性電圧が誘導し
ており、本電圧のためのダイオードD2、トラン
ジスタQ2はしや断される。つまり、N21巻線
には、まだ、電流が流れない。変流器CT2におい
て、トランジスタQ2がしや断される結果、N2
2巻線にi22なる電流が流れ、本電流は1次巻線
N12を流れる電流iSとの間で、iS×n1≒i22×n2
なる等アンペアターン則の成立する値となる。前
記トランジスタQ1のエミツタ電流が、このi22
なる電流と一致することが回路上必要である。つ
まりi22=i31+i41となり、逆にi22によつて規定さ
れるトランジスタQ1のエミツタ電流が定められ
ることとなる。トランジスタQ1のエミツタ電流
が、このi22よりも少いとき(N31巻線巻数が
多いときなど)には、その不足分はダイオードD
1より供給される。N41巻線を介してトランジ
スタQ1を駆動するとき、該トランジスタQ1の
エミツタ電圧V1はN41巻線電圧からトランジ
スタQ1のベースエミツタ間電圧を差し引いた値
となり、通常ダイオードD1をしや断する電圧と
なるので、ダイオードD1は導通せず、i22電流
がトランジスタQ1のエミツタ電流に等しくな
る。したがつて、i′31電流が少いときはi41電流が
増加し、そのi41の増加に従属してi31も増加する
ものであり、場合によつては、トランジスタQ1
のベース電流が、コレクタ電流よりも多くなるこ
とがある。図中、点線に示したベース抵抗RB1
そう入したときにはベース電流値が所定の範囲に
限定され、その結果、i31電流も限定されるが、
そのときはダイオードD1が通流してi22電流よ
りもトランジスタQ1のエミツタ電流の少い分を
補償する。このダイオードD1が導通していると
きには、変流器CT2の2次巻線N22を流れる
電流i22は抵抗器RD2,R0を経て流れ、変流器CT
2の各巻線には図示極性電圧が誘導する。N42
巻線の電圧はトランジスタQ2をしや断し、変流
器CT2ではN22巻線のみ電流が流れ、磁心CO
2の磁束はセツトされる。抵抗器RD2の電圧降下
にはi22が流れるので、その値、VRD2は1次電流iS
にほゞ比例する値となる。
On the other hand, for N21 winding (number of turns = n2, N22
(assuming that the number of winding turns is the same) A voltage of the indicated polarity is induced, and the diode D2 and transistor Q2 for this voltage are immediately cut off. In other words, no current flows through the N21 winding yet. In current transformer CT 2 , transistor Q2 is momentarily cut off, resulting in N2
A current i 22 flows through the second winding, and between this current and the current i S flowing through the primary winding N12, i S ×n1≒i 22 ×n2
This is a value that satisfies the equal ampere-turn law. The emitter current of the transistor Q1 is this i 22
It is necessary for the circuit to match the current. That is, i 22 =i 31 +i 41 , and conversely, the emitter current of transistor Q1 is determined by i 22 . When the emitter current of transistor Q1 is less than this i22 (such as when the number of turns of N31 winding is large), the shortfall is made up by diode D.
1. When driving the transistor Q1 through the N41 winding, the emitter voltage V1 of the transistor Q1 is the value obtained by subtracting the base-emitter voltage of the transistor Q1 from the N41 winding voltage, which is the voltage that normally cuts off the diode D1. Therefore, diode D1 does not conduct and the i22 current becomes equal to the emitter current of transistor Q1. Therefore, when the i' 31 current is small, the i 41 current increases, and as i 41 increases, i 31 also increases, and in some cases, the transistor Q1
The base current may be greater than the collector current. In the figure, when the base resistor R B1 shown by the dotted line is inserted, the base current value is limited to a predetermined range, and as a result, the i 31 current is also limited.
At that time, diode D1 conducts to compensate for the emitter current of transistor Q1 which is less than the i22 current. When this diode D1 is conductive, the current i 22 flowing through the secondary winding N22 of the current transformer CT2 flows through the resistors R D2 and R 0 , and the current i 22 flows through the secondary winding N22 of the current transformer CT2.
A voltage of the indicated polarity is induced in each winding of 2. N42
The voltage in the winding cuts off the transistor Q2, and in the current transformer CT2, current flows only in the N22 winding, and the magnetic core CO
The magnetic flux of 2 is set. Since i 22 flows through the voltage drop across resistor R D2 , its value, V RD2 , is the primary current i S
The value is approximately proportional to .

さて、時刻t1に至り変流器CT1の磁心がリセ
ツトを完了すると、磁心の飽和の結果、トランス
作用が失われ、N41巻線電圧が消失し、もつて
トランジスタQ1はしや断する。すると、1次電
流iSに対応する変流器CT1の2次電流がN21
巻線を流れる。それはD2−N21−RD1−R0
D1なる経路をとり、iS×n1≒i21×n2であり、
RD1の電圧降下VRD1はiSにほゞ比例する値となる。
他方、変流器CT2については依然N22巻線を
i22電流が流れて、D1−N22−RD2−R0−D1
となる経路をとり、RD2の電圧降下VRD2は矢張り
iSにほゞ比例する値となる。
Now, at time t1 , when the magnetic core of current transformer CT1 completes its reset, as a result of the saturation of the magnetic core, the transformer action is lost, the N41 winding voltage disappears, and transistor Q1 suddenly disconnects. Then, the secondary current of current transformer CT1 corresponding to the primary current i S becomes N21
flowing through the windings. It is D2-N21-R D1 -R 0 -
Take the path D1, i S ×n 1 ≒i 21 ×n 2 ,
The voltage drop V RD1 of R D1 has a value approximately proportional to i S.
On the other hand, for current transformer CT2, the N22 winding is still used.
i 22 current flows, D1-N22-R D2 -R 0 -D1
The voltage drop V RD2 of R D2 is as follows.
i The value is approximately proportional to S.

時刻t2に至つて、今度はトランジスタQ2にト
リガ信号パルスを与えると、トランジスタQ2が
N42巻線の作用により、正帰還的にスイツチオ
ンし、N42,N32を流れる電流の和が変流器
CT1のN21巻線を流れる電流に一致し、N2
2を流れる電流i22は失われる。かくして変流器
CT2がリセツトされる。この間変流器CT1はセ
ツトモードにあり、この期間中の動作は前記説明
のt0〜t1期間における変流器CT1とCT2、トラ
ンジスタQ1、とQ2を反転したものと同じであ
るので詳細は省略する。
At time t2 , when a trigger signal pulse is applied to transistor Q2, transistor Q2 is switched on in a positive feedback manner due to the action of the N42 winding, and the sum of the currents flowing through N42 and N32 flows through the current transformer.
Matches the current flowing through the N21 winding of CT1, N2
The current i 22 flowing through 2 is lost. Thus the current transformer
CT2 is reset. During this period, the current transformer CT1 is in the set mode, and the operation during this period is the same as the inversion of the current transformers CT1 and CT2 and the transistors Q1 and Q2 during the period t 0 to t 1 in the above explanation, so the details will be explained below. Omitted.

時刻t3に至り、変流器CT2がリセツトを完了
すると、再び変流器CT1,CT2共にセツトモー
ドとなる前記t1〜t2間と同じ動作になる。
When the current transformer CT2 completes the reset at time t3 , the current transformers CT1 and CT2 go into the set mode again, and the operation is the same as that between t1 and t2 .

時刻t4に至り、再びトランジスタQ1にトリガ
パルスを与えると本説明のt0時刻に一致し、もつ
て以下、同様の動作を繰返すものである。
When the trigger pulse is applied to the transistor Q1 again at time t4 , it coincides with time t0 of this description, and the same operation is repeated thereafter.

トランジスタQ1,Q2を交互にオンするにあ
たり、負荷電流iSが存在しないとき、磁心CO1,
CO2が不飽和状態にあれば、それらのエミツタ
負荷N22,N21巻線のインビーダンスは十分
高く、トランジスタQ1,Q2はスイツチオンし
てもほとんど電流は流れず、かつベース回路にも
特に限流用抵抗器をRB1,RB2必要としない。磁
心CO1,CO2が飽和しているときは電圧帰還作
用がないので、トランジスタQ1,Q2はスイツ
チオンを続けることがない。
When turning on the transistors Q1 and Q2 alternately, when there is no load current i S , the magnetic cores CO1,
If CO2 is in an unsaturated state, the impedance of the emitter loads N22 and N21 windings is sufficiently high, almost no current flows in transistors Q1 and Q2 even when they are switched on, and there is also a current limiting resistor in the base circuit. No need for R B1 and R B2 . When the magnetic cores CO1 and CO2 are saturated, there is no voltage feedback effect, so the transistors Q1 and Q2 do not continue to switch on.

以上の動作を第2図に時間の経過と共に示した
が、図中aは電流源から流れる電流iSを、bは
CT1,CT2の変流器の磁心CO1,CO2の磁束
φ1,φ2の動きを、cはN21巻線電圧を、また
e,dは抵抗器RD1,RD2の電圧降下VRD1,VRD2
示す。
The above operation is shown in Figure 2 over time, where a represents the current i S flowing from the current source, and b represents the current i S flowing from the current source.
The movements of the magnetic fluxes φ 1 and φ 2 of the magnetic cores CO1 and CO2 of the current transformers CT1 and CT2, c is the N21 winding voltage, and e and d are the voltage drops V RD1 and V of the resistors R D1 and R D2 . Indicates RD2 .

電圧VRD1とVRD2との論理和(オア)出力は電流
iSに比例するものであり、一方の出力の失われる
ときには他方の出力があるから、オアで出力をと
り出すと、ほとんどリツプルのない出力を得るこ
とが出来る。それは抵抗器R0をシヨートし、T3
T4端子より出力を取り出す方向にダイオードを
介して抵抗器を接続することで得られ、その抵抗
器の出力は前記オア出力となる。
OR output of voltage V RD1 and V RD2 is current
It is proportional to i S , and when one output is lost, there is another output, so if you take out the output with OR, you can get an output with almost no ripple. It shoots resistor R 0 and T 3 ,
This is obtained by connecting a resistor via a diode in the direction in which the output is taken out from the T4 terminal, and the output of the resistor becomes the OR output.

以上の説明より明らかな様に第1図回路によれ
ば、変流器を2個用い交互にスイツチ手段を介し
て直流電源にてリセツトする結果、単一直流電源
にてほとんどリツプルのない電流検出出力を得る
ことが出来る。
As is clear from the above explanation, according to the circuit shown in Figure 1, as a result of using two current transformers and resetting them alternately with the DC power supply via the switching means, current detection with almost no ripple can be achieved using a single DC power supply. You can get the output.

第3図はこの発明の一実施例である半導体スイ
ツチ装置を示すものであり、前記第1図に示した
変流器を基礎にトランジスタを駆動する回路を構
成したものである。第1図回路における抵抗器
R0を流れる電流は、RD1,RD2を流れる電流の和
電流であるから、トランジスタQ1,Q2の交互
オンにより変流器作用を行つている間とぎれるこ
とがなく、1次2次巻線の巻線比に逆比例した、
1次電流iSに比例する電流が少くとも常時えられ
るので、抵抗器R0の位置にトランジスタのベー
ス回路を接続し、1次巻線N11,N12にその
トランジスタのコレクタ電流が通流する様な構成
とすれば効率の良いスイツチを実現することが出
来る。それが第3図であるが、第1図の基本か
ら、やや異なる点は、コレクタ電流を検知してメ
イントランジスタMTRの駆動を制御するゲート
コントロール装置GCUから補助トランジスタQ
1,Q2を交互オンするベース信号が一つである
点である。第1図回路においても同様であつた
が、トランジスタQ1,Q2に同時にパルスを与
えたとしても必ずいずれか一方のCTのみがリセ
ツトモードに入り、他方はセツトモードに入る。
それは先にリセツトモードに入つたCTの2次巻
線が他方のCTをリセツトモードに入れるための
補助トランジスタを逆バイアスしてしや断するた
めである。また、双方共にリセツト側に飽和して
いればトランジスタQ1,Q2は共にオンせず双
方共セツトモードで動作する。逆に、双方共にセ
ツト側に飽和していれば、一方のみのリセツトモ
ードでMTRは駆動される。CTを比較的小型の
磁心で構成し、トランジスタQ1,Q2へのトリ
ガパルス間隔を短くすると、本第3図回路は小型
にし得、MTRのベース電流はiSの大小に応じて
自動的に増減するので無駄に過大なベース電流を
流すことはなく、効率の良いトランジスタスイツ
チとすることが出来る。
FIG. 3 shows a semiconductor switch device according to an embodiment of the present invention, in which a circuit for driving a transistor is constructed based on the current transformer shown in FIG. 1. Figure 1: Resistor in circuit
Since the current flowing through R 0 is the sum of the currents flowing through R D1 and R D2 , there is no interruption while performing a current transformer action by alternately turning on transistors Q1 and Q2, and the current flows through the primary and secondary windings. is inversely proportional to the turns ratio of
Since a current proportional to the primary current i S can be obtained at least all the time, connect the base circuit of the transistor to the position of the resistor R 0 so that the collector current of the transistor flows through the primary windings N11 and N12. With this configuration, an efficient switch can be realized. This is shown in Fig. 3, but it differs from the basics of Fig. 1 in that the gate control device GCU, which detects the collector current and controls the drive of the main transistor MTR, is connected to the auxiliary transistor Q.
There is only one base signal that alternately turns on Q1 and Q2. The same applies to the circuit of FIG. 1, but even if pulses are applied to transistors Q1 and Q2 at the same time, only one of the CTs will always enter the reset mode and the other will enter the set mode.
This is because the secondary winding of the CT that entered the reset mode first reverse biases the auxiliary transistor for putting the other CT into the reset mode, thereby cutting it off. Furthermore, if both transistors are saturated on the reset side, both transistors Q1 and Q2 are not turned on and both operate in the set mode. Conversely, if both are saturated on the set side, the MTR is driven in only one reset mode. By configuring the CT with a relatively small magnetic core and shortening the interval between trigger pulses to transistors Q1 and Q2, the circuit shown in Figure 3 can be made smaller, and the base current of the MTR will automatically increase or decrease depending on the magnitude of i S. Therefore, an excessive base current does not flow unnecessarily, and an efficient transistor switch can be achieved.

なおN31,N32巻線の巻数とN21,N2
2巻線の巻数とは大差なく構成し、制御電源VC
の電圧を低くするのが実用範囲を拡大する上で望
ましい。MTRをしや断するにはトランジスタQ
1,Q2へのトリガ信号を与えるのをやめると、
変流器CT1,CT2がやがてセツトモードで飽和
し、MTRベース電流が失われて自然消弧する
が、もしも瞬時にしや断することを意図するとき
は、図中、トランジスタQX1,QX2をオンして
MTRのベース電流を側路すれば良い。この様に
GCUをもとにして第3図回路は任意の時間に
MTRをオン、オフすることが出来る。
In addition, the number of turns of N31 and N32 windings and N21 and N2
The configuration is similar to the number of turns of two windings, and the control power supply V C
It is desirable to lower the voltage in order to expand the practical range. Transistor Q to cut off MTR
1. If you stop giving the trigger signal to Q2,
The current transformers CT1 and CT2 will eventually become saturated in the set mode, and the MTR base current will be lost and the current will go out naturally. However, if you intend to turn off the current instantly, the transistors Q X1 and Q X2 in the diagram should be turn it on
All you have to do is bypass the MTR base current. like this
Based on the GCU, the circuit in Figure 3 can be created at any time.
You can turn MTR on and off.

以上の説明から明らかなように、この発明の半
導体スイツチ装置によれば、メイントランジスタ
MTRにおいては、コレクタ電流の大小に応じて
ベース電流が増減するので、ダーリントン接続が
必要ではなく、効率の良い駆動を行なえるという
効果を有するものである。
As is clear from the above explanation, according to the semiconductor switch device of the present invention, the main transistor
In the MTR, since the base current increases or decreases depending on the magnitude of the collector current, Darlington connections are not necessary, and the MTR has the effect of enabling efficient driving.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の半導体スイツチ装置を説明
するための直流変流器の一例を示す構成図、第2
図は第1図回路の動作を説明する図、第3図はこ
の発明の半導体スイツチ装置の一実施例を示す構
成図である。図中、CT1,CT2は変流器、Q
1,Q2,MTRはトランジスタ、D1,D2は
ダイオード、VCは制御電源である。なお図中、
同一符号は同一部分を示す。
FIG. 1 is a configuration diagram showing an example of a DC current transformer for explaining the semiconductor switch device of the present invention, and FIG.
1 is a diagram for explaining the operation of the circuit shown in FIG. 1, and FIG. 3 is a block diagram showing an embodiment of the semiconductor switch device of the present invention. In the figure, CT1 and CT2 are current transformers, Q
1, Q2, and MTR are transistors, D1, D2 are diodes, and V C is a control power supply. In addition, in the figure,
The same reference numerals indicate the same parts.

Claims (1)

【特許請求の範囲】[Claims] 1 可飽和磁心に第1、第2、第3各巻線を巻回
して成る複数の変成器、これら複数の変成器の各
第2巻線の一端を、互いに他方の変成器の第3巻
線の一端とそれぞれ接続する複数の半導体スイツ
チ、前記複数の変成器の前記各第3巻線の他端に
一端が接続された直流電源、この直流電源の他端
と、前記複数の変成器の前記各第2巻線の他端と
の間にベース、エミツタ間が接続されると共に、
前記複数の変成器の各第1巻線が負荷と共に直列
接続されてコレクタに接続されて成るトランジス
タ、前記複数の半導体スイツチをオンするゲート
コントロール装置より成る半導体スイツチ装置。
1 A plurality of transformers each having first, second, and third windings wound around a saturable magnetic core, one end of each second winding of these plurality of transformers being connected to the third winding of the other transformer. a plurality of semiconductor switches connected to one end of each of the third windings of the plurality of transformers; a DC power supply having one end connected to the other end of each of the third windings of the plurality of transformers; The base and emitter are connected between the other end of each second winding, and
A semiconductor switch device comprising a transistor in which each first winding of the plurality of transformers is connected in series with a load and connected to a collector, and a gate control device for turning on the plurality of semiconductor switches.
JP61012423A 1986-01-23 1986-01-23 Semiconductor switch device Granted JPS61173669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61012423A JPS61173669A (en) 1986-01-23 1986-01-23 Semiconductor switch device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61012423A JPS61173669A (en) 1986-01-23 1986-01-23 Semiconductor switch device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP9543577A Division JPS5429020A (en) 1977-08-08 1977-08-08 Dc current transformer and semiconductor switch device

Publications (2)

Publication Number Publication Date
JPS61173669A JPS61173669A (en) 1986-08-05
JPH0362324B2 true JPH0362324B2 (en) 1991-09-25

Family

ID=11804860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61012423A Granted JPS61173669A (en) 1986-01-23 1986-01-23 Semiconductor switch device

Country Status (1)

Country Link
JP (1) JPS61173669A (en)

Also Published As

Publication number Publication date
JPS61173669A (en) 1986-08-05

Similar Documents

Publication Publication Date Title
US4177509A (en) Self-excited inverter with suppressed current spikes
JPS6133245B2 (en)
US4105957A (en) Full wave bridge power inverter
JPS61173669A (en) Semiconductor switch device
JPH11136939A (en) Switching power supply
US3793580A (en) D. c. static switch circuit with a main switch device and a power sharing circuit portion
JPS6367434B2 (en)
US4066956A (en) Semiconductor switch device having means for supplying control current to a control electrode
JPH0549247A (en) Switching power supply unit
JPH07264029A (en) Bidirectional connection transistor drive circuit
JPH0534229Y2 (en)
JPH0715351Y2 (en) Switching power supply
JP2609654B2 (en) Flexible disk device
JPS58390Y2 (en) Self-excited DC↓-DC converter
JPH0237273Y2 (en)
JP2563188B2 (en) Self-exciting converter with overcurrent protection
JPH055699Y2 (en)
JP3585016B2 (en) Constant current power supply
JPH0116351Y2 (en)
GB2132436A (en) Darlington transistor switch
JP3261646B2 (en) Self-excited switching power supply
JPH043590Y2 (en)
JPS5826268B2 (en) Transistor switching control device
JP2704061B2 (en) Power supply switching circuit
JPH0213552B2 (en)