JPH0362990A - Soldering of semiconductor chip carrier - Google Patents
Soldering of semiconductor chip carrierInfo
- Publication number
- JPH0362990A JPH0362990A JP1198834A JP19883489A JPH0362990A JP H0362990 A JPH0362990 A JP H0362990A JP 1198834 A JP1198834 A JP 1198834A JP 19883489 A JP19883489 A JP 19883489A JP H0362990 A JPH0362990 A JP H0362990A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- soldering
- terminal pin
- printed wiring
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3447—Lead-in-hole components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野]
この発明は、半導体素子搭載用の半導体チップキャリア
の半田付は方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for soldering a semiconductor chip carrier for mounting a semiconductor element.
(従来の技術〕
近年、半導体チップの高機能、高集積化にともなうI1
0数の増加に対応する半導体チップキャリアとして、プ
リント配線板のスルホールに端子ピンを挿入したピング
リッドアレイ(以下、PGAと記述する)が開発、利用
されてきている。このPGAの構造と使われ方から
(1)主材料であるプリント配線板のスルホール内に形
成されたスルホールメツキとスルホールに差し込み半田
付けされる端子ピンとの導通性と接合強度の良好なこと
、
(2)PGAの端子ピンをマザーボードのスルホールに
挿入し半田付けする実装において、これらの間の導通性
と接合強度の良好なことが必須である。(Prior art) In recent years, as semiconductor chips have become more sophisticated and highly integrated, I1
A pin grid array (hereinafter referred to as PGA), in which terminal pins are inserted into through holes of a printed wiring board, has been developed and used as a semiconductor chip carrier to cope with the increase in the number of zeros. From the structure and usage of this PGA, (1) good conductivity and bonding strength between the through-hole plating formed in the through-hole of the printed wiring board, which is the main material, and the terminal pin inserted into the through-hole and soldered; 2) In mounting the PGA terminal pins by inserting them into through-holes on the motherboard and soldering them, it is essential that the conductivity and bonding strength between them be good.
そこで、(1)の導通性と接合強度を良くするためには
半導体チップキャリアのプリント配線板のスルホールへ
半田充填を十分に行う必要があり、(2)の導通性と接
合強度を良くするためには端子ピンに半田を十分付着さ
せておく必要がある。Therefore, in order to improve the conductivity and bonding strength in (1), it is necessary to fill the through holes of the printed wiring board of the semiconductor chip carrier with sufficient solder, and in order to improve the conductivity and bonding strength in (2), It is necessary to apply sufficient solder to the terminal pins.
ところで従来は、プリント配線板のスルホールに差し込
まれた埋込部を有する端子ピンの露出部を半田浴に浸し
、半田液の表面張力を利用してスルホールと埋込部との
隙間に半田液を上昇させることによる方法が一般的であ
った。この場合、表面張力は半田浴温と正の比例関係に
あるためにスルホールへの半田充填を十分に行うために
高温に保持された半田液に浸して為されてきたが、高温
の半田液では端子ピンの露出部に付着した半田量が少な
く、マザーボードのスルホールに挿入し半田付けする実
装において導通性と接合強度に問題があった。Conventionally, the exposed part of a terminal pin with an embedded part inserted into a through-hole of a printed wiring board is immersed in a solder bath, and the surface tension of the solder liquid is used to apply solder liquid into the gap between the through-hole and the embedded part. A common method was to raise the In this case, the surface tension is in a positive proportion to the solder bath temperature, so in order to sufficiently fill the through-hole with solder, it has been done by immersing it in a solder solution kept at a high temperature. There was a small amount of solder attached to the exposed parts of the terminal pins, and there were problems with conductivity and bonding strength when mounting them by inserting them into through-holes on the motherboard and soldering them.
半導体チップキャリアとなるプリント配線板のスルホー
ル内に十分な半田量で半田付けされた端子ピンの露出部
の半田の付着量を増大した半導体チップキャリアの半田
付は方法を提供することにある。It is an object of the present invention to provide a method for soldering a semiconductor chip carrier in which the amount of solder attached to the exposed portions of terminal pins soldered with a sufficient amount of solder in the through-holes of a printed wiring board serving as the semiconductor chip carrier is increased.
本発明は、前記課題を解決するためにプリント配線板に
端子ピンの埋込部を半田付けにより取り付け、この端子
ピンの露出部に半田膜を形成するに当たり、プリント配
線板のスルホールに差し込んだ端子ピンを半田浴に浸し
てこの端子ピンをプリント配線板に取り付ける場合、半
田浴温を使用半田の溶融温度+30℃以上で行い、次に
端子ピンの露出部に半田膜を形成する場合、半田浴温を
使用半田の溶融温度+30″C以下で行うことを特徴と
する半導体チップキャリアの半田付は方法を提供するも
のである。In order to solve the above-mentioned problems, the present invention provides a method for attaching embedded portions of terminal pins to a printed wiring board by soldering, and forming a solder film on the exposed portions of the terminal pins by inserting the terminals into through-holes of the printed wiring board. When attaching the terminal pin to a printed wiring board by dipping the pin in a solder bath, the temperature of the solder bath should be at least 30°C above the melting temperature of the solder used, and then when forming a solder film on the exposed part of the terminal pin, the solder bath should be The present invention provides a method for soldering semiconductor chip carriers, characterized in that the soldering is carried out at a temperature below the melting temperature of the solder used +30"C.
以下にこの発明の詳細な説明する。This invention will be explained in detail below.
まず、この発明の対象に係るプリント配線板について図
面を用いて説明する。半導体チップlを搭載した半導体
チップキャリア2は、例えばガラス布基材エポキシ樹脂
銅張り積層板、ガラス布基材ポリイミド樹脂銅張り積層
板、ガラス布基材フッ素樹脂銅張り積層板、ガラス布基
材PP○樹脂銅張り積層板又はこれらの変性樹脂銅張り
積層板、または、耐熱性に優れた有81繊維布基材の銅
張り積層板などのプリント配線板3に電気回路4を有し
、この電気回路4と半導体チップ1とを金属線5を介し
て接続し、さらにエポキシ樹脂、イミド樹脂、シリコン
樹脂の如き樹脂の硬化したキャップ12で上記半導体チ
ア1を封止して使用される。First, a printed wiring board according to the present invention will be described with reference to the drawings. The semiconductor chip carrier 2 on which the semiconductor chip l is mounted is, for example, a glass cloth base epoxy resin copper clad laminate, a glass cloth base polyimide resin copper clad laminate, a glass cloth base fluororesin copper clad laminate, a glass cloth base material An electrical circuit 4 is provided on a printed wiring board 3 such as a PP○ resin copper-clad laminate, a modified resin copper-clad laminate thereof, or a copper-clad laminate with a fiber cloth base material having excellent heat resistance. The electric circuit 4 and the semiconductor chip 1 are connected via a metal wire 5, and the semiconductor chip 1 is further sealed with a cap 12 made of hardened resin such as epoxy resin, imide resin, or silicone resin.
このようにして使用される プリント配線vi3には、
上記電気回路4と導通ずるメツキを内面に形成されたス
ルホール6を有し、このスルホール6に端子ピン7の埋
込部8を半田を介して接続され、さらに露出部9はマザ
ーホード10のスルホール11に半田を介して接続導通
して使用される。The printed wiring vi3 used in this way includes:
It has a through hole 6 formed on the inner surface with a plating that is electrically connected to the electric circuit 4, and the embedded part 8 of the terminal pin 7 is connected to this through hole 6 via solder. It is used by connecting through solder.
このように導通性と接合強度が問題となる端子ピン7を
半導体チップキャリア2のプリント配線板3に半田付け
で取り付けるに当たり、プリント配線板3のスルホール
6に差し込んだ端子ピン7を半田浴に浸してこの端子ピ
ン7をプリント配線F1.3に取り付ける場合、半田浴
温を使用半田の溶融温度+30℃以上で行う、なぜなら
、半田浴温を使用半田の溶融温度+30 ’C以上で行
わないと半田液の表面張力が小さいために半田液が端子
ピン7の埋込部8の頂面に至まで上昇せず従って導通性
と接合強度に欠けるからである。具体的な1例を挙げる
と、半田液?!240〜270℃,浸漬時間2〜5秒、
引上げ速度 30〜7 Q m / sacの条件で行
うと、この場合の半田付けは、初期の目的を達成する。When attaching the terminal pins 7, for which conductivity and bonding strength are issues, to the printed wiring board 3 of the semiconductor chip carrier 2 by soldering, the terminal pins 7 inserted into the through holes 6 of the printed wiring board 3 are immersed in a solder bath. When attaching the terminal pin 7 of the lever to the printed wiring F1.3, the solder bath temperature must be at least 30'C above the melting temperature of the solder used.This is because the solder bath temperature must be at least 30'C above the melting temperature of the solder used. This is because the solder liquid does not rise to the top surface of the embedded portion 8 of the terminal pin 7 because the surface tension of the liquid is low, and therefore conductivity and bonding strength are lacking. To give one specific example, is it solder liquid? ! 240-270℃, immersion time 2-5 seconds,
When carried out at a pulling rate of 30-7 Q m/sac, the soldering in this case achieves its initial purpose.
次に端子ピン7の露出部9に半田膜を形成する場合、半
田浴温を使用半田の溶融温度+30℃以下で行う。なぜ
なら、半田浴温か使用半田の溶融温度+30″Cを越え
ると、付着する半田量の増大をはかることが出来ず、マ
ザーボードと半田付けする実装において導通性と接合強
度に改善がないからである。この場合、半田浴に浸して
おく時間を1秒以下に制限すると、前記した1回目の半
田付けで固化した半田が再溶融し導通不良と接合強度の
低下を招かない、さらには2回目の半田付けする半田浴
から端子ピン7が取り付けられた半導体チップキャリア
を引き上げる際には、10m/Sec以上の速度で行う
と付着した半田膜が均一性に冨む点で有効である。端子
ピンの露出部の半田膜の膜厚が厚いと、半田濡れ性が改
善されるので、マザーボードのスルホールに端子ピンを
挿入し半田付けする実装において導通性と接合強度の改
善にも有効である。Next, when forming a solder film on the exposed portion 9 of the terminal pin 7, the solder bath temperature is set to be lower than the melting temperature of the solder used by +30°C. This is because if the solder bath temperature exceeds the melting temperature of the solder used +30''C, the amount of solder attached cannot be increased, and there is no improvement in conductivity and bonding strength when soldering to the motherboard. In this case, if the time of immersion in the solder bath is limited to 1 second or less, the solder solidified in the first soldering described above will not re-melt and cause poor continuity and a decrease in joint strength. When pulling up the semiconductor chip carrier to which the terminal pins 7 are attached from the solder bath to be attached, it is effective to do so at a speed of 10 m/Sec or more in that the adhered solder film becomes more uniform.Exposing the terminal pins. A thicker solder film improves solder wettability, which is also effective in improving conductivity and bonding strength in mounting where terminal pins are inserted into through-holes on the motherboard and soldered.
なお、使用する半田はS n / P bが63/37
や90/10の比率の半田など常用の半田が通用できる
。In addition, the solder used has S n / P b of 63/37.
Ordinary solder such as 90/10 ratio solder can be used.
(実施例〕
実施例 1
板厚1.6−のガラス布基材エポキシ樹脂両筒銅張り積
層板から作られたPGA用のプリント配線板のメツキさ
れたスルホールに、φ0.5mm、長さ5.5 aos
のリン青銅母材の端子ピンを差し込み120ピンのPG
Aの初期組立品を作った0次の半田付けには溶融温度1
83℃のS n / P bが63/37の半田を用い
た。1回目の半田付けは半田浴温250゛C1浸漬時間
2秒、引上げ速度60mtm/seeで行なった後、2
回目の半田付けは半田浴温20o’c、浸漬時間0.5
秒、引上げ速度Looms/secで行ない120ピン
PGAを作った。この120ピンPGAの端子ピンに付
着した半田の厚みを蛍光X線で測定し、その平均値を第
1表に示した。また、スルホール内の半田の充填率は、
端子ピンが突出していない方のスルホール部が半田で満
たされているものはスルホール内の半田の充填は良いも
のと見なし、端子ピンが突出していない120個のスル
ホール部について顕微鏡で検査し、前記半田の充填の良
いものが120個中いくつあるかを半田の充填率とし、
第1表に結果を示した。(Example) Example 1 A plated through hole with a diameter of 0.5 mm and a length of 5 .5 aos
Insert the terminal pin of the phosphor bronze base material into the 120-pin PG
The zero-order soldering that made the initial assembly of A had a melting temperature of 1.
Solder with S n /P b of 63/37 at 83° C. was used. The first soldering was carried out at a soldering bath temperature of 250°C, a dipping time of 2 seconds, and a pulling speed of 60 mtm/see.
For the second soldering, the solder bath temperature is 20o'c, and the immersion time is 0.5
A 120-pin PGA was fabricated at a pulling speed of Looms/sec. The thickness of the solder attached to the terminal pins of this 120-pin PGA was measured using fluorescent X-rays, and the average values are shown in Table 1. In addition, the filling rate of solder in the through-hole is
If the through-hole part from which the terminal pin does not protrude is filled with solder, it is considered that the through-hole is filled with solder. 120 through-hole parts from which the terminal pin does not protrude are examined with a microscope, and the solder The number of solder fillers out of 120 that have good filling is the solder filling rate.
The results are shown in Table 1.
実施例 2
実施例1と同じ材料を用い、1回目の半田付けを同条件
で行った後、2回目の半田付けは半田浴温190 ’C
1浸漬時間1秒、引上げ速度100m/seeで行い、
実施例1と同様に評価し第1表にその結果を示した。Example 2 Using the same materials as in Example 1, the first soldering was performed under the same conditions, and the second soldering was performed at a solder bath temperature of 190'C.
1 immersion time is 1 second, pulling speed is 100 m/see,
Evaluations were made in the same manner as in Example 1, and the results are shown in Table 1.
比較例 1
実施例1と同じ材料を用い、1回目の半田付けを同条件
で行った後、2回目の半田付けは半田液温240℃,浸
漬時間1秒、引上げ速度100u/seeで行い、実施
例1と同様に評価し第1表にその結果を示した。Comparative Example 1 Using the same materials as in Example 1, after the first soldering was performed under the same conditions, the second soldering was performed at a solder liquid temperature of 240°C, a dipping time of 1 second, and a pulling rate of 100 u/see. Evaluations were made in the same manner as in Example 1, and the results are shown in Table 1.
比較例 2
実施例1と同し材料を用い、1回目の半田付けを同条件
で行った後、2回目の半田付けは半田液温240℃1浸
漬時間1.5秒、引上げ速度100mm/secで行い
、実施例1と同様に評価し第1表にその結果を示した。Comparative Example 2 Using the same materials as in Example 1, the first soldering was performed under the same conditions, and then the second soldering was performed at a solder solution temperature of 240°C, 1 immersion time of 1.5 seconds, and a pulling speed of 100 mm/sec. The evaluation was carried out in the same manner as in Example 1, and the results are shown in Table 1.
第1表
実施例 3
実施例1の半田付は条件のうち、引上げ速度を第2表の
様に変えて行い、端子ピンに付着した半田の厚みを蛍光
X線で測定し、その平均値を第2表に示した。Table 1 Example 3 Soldering in Example 1 was carried out under different conditions, including the pulling speed as shown in Table 2. The thickness of the solder attached to the terminal pins was measured using fluorescent X-rays, and the average value was calculated. It is shown in Table 2.
実施例 4
実施例1の2回目の半田付は条件のうち、引上げ速度を
第2表の様に変えて行い、端子ピンに付着した半田の厚
みを蛍光X線で測定し、その平均値を第2表に示した。Example 4 The second soldering in Example 1 was performed under different conditions, such as the pulling speed as shown in Table 2. The thickness of the solder attached to the terminal pin was measured using fluorescent X-rays, and the average value was calculated. It is shown in Table 2.
比較例 3〜5
実施例1の2回目の半田付は条件のうち、引上げ速度を
第2表の様に変えておこない、端子ピンに付着した半田
の厚みを蛍光X線で測定し、その平均値を第2表に示し
た。Comparative Examples 3 to 5 The second soldering in Example 1 was performed under different pulling speeds as shown in Table 2, and the thickness of the solder adhering to the terminal pins was measured using fluorescent X-rays, and the average The values are shown in Table 2.
第2表
第1表から、(a)の半田浴温を使用半田の溶融温度+
30゛C以下と(b)の浸漬時間を1秒以下で2回目の
半田付けをおこなうと、端子ピンに付着する半田の厚み
を3μ−以上、スルホール内の、半田の充填度合いを9
0%以上にできることが確認できた。また第2表から、
(c)の引上げ速度を70a/sec以上で2回目の半
田付けをおこなうと、端子ピンに付着する半田の厚みを
3μm以上できることが確認できた。Table 2 From Table 1, use the solder bath temperature in (a) Solder melting temperature +
If the second soldering is carried out at 30°C or less and the immersion time in (b) is 1 second or less, the thickness of the solder adhering to the terminal pin will be 3μ or more, and the degree of solder filling in the through hole will be 9.
It was confirmed that the reduction could be made to 0% or higher. Also, from Table 2,
It was confirmed that when the second soldering was performed at a pulling speed of 70 a/sec or more in (c), the thickness of the solder adhering to the terminal pins could be increased to 3 μm or more.
(発明の効果〕
本発明によって、プリント配L% +fflのスルホー
ル内に半田を十分充填させ、かつ端子ピンの露出部にも
十分に半田を付着させることができ、その結果かかる端
子ピンを有する半導体チップキャリアをマザーボードの
スルホールに挿入し、半田付けする実装において良好な
導通性と接合強度がそれぞれ得られる効果を有するので
ある。(Effects of the Invention) According to the present invention, it is possible to sufficiently fill the through holes of the printed wiring L% +ffl with solder, and also to sufficiently adhere the solder to the exposed portions of the terminal pins, and as a result, the semiconductor having such terminal pins can be This has the effect of providing good conductivity and bonding strength when the chip carrier is inserted into the through-hole of the motherboard and soldered.
第1図はこの発明に係る半導体チップキャリアの使用状
態の1例を示す断面図である。
1・・・半導体チップ
2・・・半導体チップキャリア
3・・・プリント配線板
4・・・電気回路
・・・金属線
・・・スルホール
・・・端子ピン
・・・埋込部
・・・露出部
・・・マザーボー
・・・スルホ −Jし
・・・キャップ
ドFIG. 1 is a cross-sectional view showing one example of the usage state of the semiconductor chip carrier according to the present invention. 1... Semiconductor chip 2... Semiconductor chip carrier 3... Printed wiring board 4... Electric circuit... Metal wire... Through hole... Terminal pin... Embedded part... Exposed Part... Motherboard... Sulfo -J... Capped
Claims (1)
より取り付け、この端子ピンの露出部に半田膜を形成す
るに当たり、プリント配線板のスルホールに差し込んだ
端子ピンを半田浴に浸してこの端子ピンをプリント配線
板に取り付ける場合、半田浴温を使用半田の溶融温度+
30℃以上で行い、次に端子ピンの露出部に半田膜を形
成する場合、半田浴温を使用半田の溶融温度+30℃以
下で行うことを特徴とする半導体チップキャリアの半田
付け方法。(1) Attach the embedded part of the terminal pin to the printed wiring board by soldering and form a solder film on the exposed part of the terminal pin by immersing the terminal pin inserted into the through hole in the printed wiring board in a solder bath. When attaching terminal pins to a printed wiring board, use the solder bath temperature.Solder melting temperature +
A method for soldering a semiconductor chip carrier, characterized in that soldering is carried out at a temperature of 30° C. or above, and then, when a solder film is formed on the exposed portion of a terminal pin, the soldering bath temperature is carried out at a melting temperature of the used solder plus 30° C. or below.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1198834A JP2623845B2 (en) | 1989-07-31 | 1989-07-31 | Soldering method for semiconductor chip carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1198834A JP2623845B2 (en) | 1989-07-31 | 1989-07-31 | Soldering method for semiconductor chip carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0362990A true JPH0362990A (en) | 1991-03-19 |
| JP2623845B2 JP2623845B2 (en) | 1997-06-25 |
Family
ID=16397692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1198834A Expired - Lifetime JP2623845B2 (en) | 1989-07-31 | 1989-07-31 | Soldering method for semiconductor chip carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2623845B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102438402A (en) * | 2010-09-22 | 2012-05-02 | 日立汽车系统株式会社 | Electronic apparatus |
-
1989
- 1989-07-31 JP JP1198834A patent/JP2623845B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102438402A (en) * | 2010-09-22 | 2012-05-02 | 日立汽车系统株式会社 | Electronic apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2623845B2 (en) | 1997-06-25 |
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