JPH0363229U - - Google Patents
Info
- Publication number
- JPH0363229U JPH0363229U JP12279489U JP12279489U JPH0363229U JP H0363229 U JPH0363229 U JP H0363229U JP 12279489 U JP12279489 U JP 12279489U JP 12279489 U JP12279489 U JP 12279489U JP H0363229 U JPH0363229 U JP H0363229U
- Authority
- JP
- Japan
- Prior art keywords
- power
- flip
- circuit
- power supply
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000630 rising effect Effects 0.000 claims 1
- 230000001960 triggered effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Power Sources (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
は上記実施例における各部波形タイムチヤート、
第３図は従来のオートパワーオフ回路の回路図で
ある。
１……電源、２……電源ライン、３……スイツ
チング素子、４……電源スイツチ、７……電子回
路、８……ランチアツプ保護回路、１０……ＩＣ
チツプ、１１，１２……フリツプフロツプ。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is a waveform time chart of each part in the above embodiment,
FIG. 3 is a circuit diagram of a conventional auto power-off circuit. 1...Power source, 2...Power line, 3...Switching element, 4...Power switch, 7...Electronic circuit, 8...Launch-up protection circuit, 10...IC
Chip, 11, 12...flip flop.
Claims (1)
電源ラインに介装された電力用スイツチング素子
を制御するオートパワーオフ回路であつて、上記
電源ラインから駆動電力を受ける第１および第２
のフリツプフロツプを有するＩＣチツプを備え、
上記第１のフリツプフロツプは電源スイツチのス
イツチ出力の立上りでトリガされて上記第２のフ
リツプフロツプをトリガし、上記電子回路は上記
スイツチ出力をラツチアツプ保護回路を通して入
力され上記スイツチ出力の消滅タイミングから所
定の保護時間だけ遅れて上記第１および第２のフ
リツプフロツプにリセツトパルスを与え、上記第
２のフリツプフロツプの出力により上記スイツチ
ング素子をオン／オフすることを特徴とするオー
トパワーオフ回路。 An auto power-off circuit that controls a power switching element interposed in a power supply line between a power supply and an electronic circuit supplied with power from the power supply, the circuit comprising first and second switching elements that receive drive power from the power supply line.
Equipped with an IC chip having flip-flops,
The first flip-flop is triggered by the rising edge of the switch output of the power switch to trigger the second flip-flop, and the electronic circuit receives the switch output through a latch-up protection circuit to provide a predetermined protection from the timing of the switch output disappearing. An auto power-off circuit characterized in that a reset pulse is applied to the first and second flip-flops after a time delay, and the switching element is turned on/off by the output of the second flip-flop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12279489U JPH0363229U (en) | 1989-10-19 | 1989-10-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12279489U JPH0363229U (en) | 1989-10-19 | 1989-10-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0363229U true JPH0363229U (en) | 1991-06-20 |
Family
ID=31670789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12279489U Pending JPH0363229U (en) | 1989-10-19 | 1989-10-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0363229U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007000655A (en) * | 1995-08-04 | 2007-01-11 | Hill Rom Co Inc | Mattress for hospital bed |
-
1989
- 1989-10-19 JP JP12279489U patent/JPH0363229U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007000655A (en) * | 1995-08-04 | 2007-01-11 | Hill Rom Co Inc | Mattress for hospital bed |
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