JPH0363802A - Backup method for control circuit and sequencer mechanism capable of performing mutual backup - Google Patents

Abstract

PURPOSE:To continue the control of a device by writing a prescribed state signal corresponding to the operating state of a pair of sequencers in a storage means with the sequencer on one side of the pair of sequencers, and transiting and making await the state of the sequencer itself on the other side similarly as the operating state of the sequencer on one side with the sequencer on the other side based on the state signal. CONSTITUTION:Shared memories 6a, 6b are provided at the sequencers 1a, 1b, and corresponding prescribed state signals are written on the shared memories 6a, 6b at the operating states of corresponding sequencers 1a, 1b, respectively, and also, the state signals written by the sequencers 1a, 1b on the other sides can be read out. When its own fault is detected with the self-diagnostic function of the sequencer 1a, a change-over switch 8 is switched by operating an abnormality monitoring device 14, and an input/output line 9 commonly used with the input/output line 7a of the sequencer 1a is connected. The sequencer 1b can transit its own state similarly as the operating state of the sequencer 1a as for the prescribed state signal. Thereby, at least the continuity of a significant signal can be held in switching, thereby, operation of the device can be continued.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a sequencer control circuit backup method and a sequencer mechanism capable of mutual backup.

(Conventional technology) In a control circuit using a sequencer, input/output devices such as switches and solenoid valves are connected to the sequencer body through an input/output line via an input/output interface. The logic 11 is continuously controlled by the sequencer itself by sending and receiving signals.

(Problem to be Solved by the Invention) In the conventional TSM circuit described above, when the sequencer fails, the logic l1m becomes disabled, and the operation of the device including the above-mentioned input/output devices stops, resulting in safety. In addition to the above problems, there is also the problem that it is basically impossible to restart the operation of this device until the sequencer is restored.

The present invention aims to solve this problem.

(Means for solving Iffl) In order to solve the above-mentioned problems, the sequencer 1 of the present invention
The backup method for the ilI 111 circuit consists of configuring a pair of sequencers to enable selective operation by switching input/output lines, and providing each sequencer with a status signal storage means that allows the other sequencer to successively output the other sequencer. The sequencer inputs a predetermined state signal corresponding to its operating state into the state signal storage means, and the other sequencer reads out the state signal written in the state signal storage means as needed, and reads the state signal based on the operation signal. The sequencer itself changes its state in the same manner as the operating state of the one sequencer and is placed on standby.

Furthermore, the present invention provides a mechanism for applying the above-mentioned method, in which a pair of sequencers is configured to be capable of selective operation by switching input/output lines, and each sequencer is provided with a status signal storage means that allows the other sequencer to successively output the sequencer. A sequencer mechanism capable of mutual backup was constructed.

The state signal storage means described above stores all the states L! in the operating state. 1M@ may be written and read, or only an important part of this status signal may be written and read.

(Function) When one sequencer is operating, that is, when this one sequencer is controlling the input/output equipment through the input/output line, the predetermined status a signal corresponding to the operating status is stored in the status signal memory. This state signal is read by the other sequencer at any time, and based on the read W3 signal, the state of the sequencer itself changes in the same manner as the operating state of the other sequencer. The state signals to be written and read may be all of the state signals corresponding to the operating state, or may be only an important part of them.

If one of the sequencers in operation fails, this is detected by an appropriate failure detection means and the input/output line is switched, so that the other sequencer obtains 1lllllllL of input/output equipment through the input/output line. . In this case, since the other sequencer changes its internal state in the same way as the operating state of one sequencer, at least regarding the important state A signal during standby, the other sequencer changes its internal state in the same way as the operating state of the other sequencer, so this important state R signal is not changed at the time of switching. Continuity can be maintained, and therefore, the device including the input/output device as a component can continue to operate without stopping.

In this way, one sequencer that has failed can be repaired while the other sequencer continues to operate the device. Then, when the one sequencer is restored, the one sequencer has the status 1! written in the status signal storage means of the other operating sequencer.
The signal is read out at any time to cause its internal state to change in the same manner as the other sequencer, and to wait for a failure to occur in the other sequencer.

(Example) Embodiments of the invention will be described with reference to the drawings.

The figure shows an embodiment of a sequencer control circuit to which the present invention is applied, and reference numerals 1a and 1b indicate a pair of sequencers. These sequencers 1a.

1b, like a conventional sequencer, includes control circuits 2a, 2b using a CPU or the like, internal calculation memories 3a, 3b,
Input memories 4a, 4b, output memories 5a, 5b, etc. are provided, and in order to apply the present invention, shared memories 6a, 6b as the state signal storage means are provided. The shared memories 6a and 6b each have a corresponding sequencer 1a.

In the operating state of sequencer 1b, a corresponding predetermined status signal is written, and the status signals written by the other sequencers 1b and 1a can be read. In this way, the shared memory 6a.

The status f'T to be written to and read from 6b can be all status signals in the operating state, but for example, input signals such as stop factors related to interlock at 5A, device interlock, etc. In relation to this, the memory capacity is limited to only important signals that require continuity, such as internal status signals used for calculations of emergency stop circuits, etc., and operations of solenoid valves and electric motors @ outputs that drive equipment. can be reduced. The input/output mail E! J4a, 4b: 5a, 5
b is connected to input/output lines 7a and 7b via appropriate boats, etc.
The configuration is such that input/output signals are exchanged via the .

These input/output lines 7a, 7b are connected to a common input/output line 9 via a changeover switch 8, and this input/output line 9
is configured to be connected to input/output devices 13 such as a switch 11 and a solenoid valve 12 via an input/output interface 10. Further, the changeover switch 8 is connected to each of the sequencers 1a and 1.
The configuration is such that the switching operation is performed by an abnormality monitoring device 14 operated by an abnormality detection signal etc. in the self-diagnosis function etc. of b.

In the above configuration, when the common input/output line 9 and the input/output line 7a are connected via the changeover switch 8 as shown in the figure, the sequencer 1a on the left side of the figure connects to the input/output line 9.
, 7a, and input signals from input devices such as the switch 11 are input to the input memory 4a.
, and output signals to output devices such as the ff1ll valve 12 are output to the output memory 5a. The control circuit 2a performs predetermined calculations using the internal calculation memory 3a as necessary based on the input signal, internal clock signal, etc., and performs logic control such as issuing the above-mentioned output signal. In addition to the above operations, the sequencer 1a stores predetermined input signals, output signals, and internal state signals in the shared memory 6a.
Transfer to and write. The method of transferring these signals to the shared memory 6a may be any suitable method such as a configuration using a CPU or DMA transfer.

In parallel with the above operations, the sequencer 1b on the right side of the figure
The status signals written in the shared memory 6a are read at any time, and based on the read status signals, the status of each memory etc. of the sequencer 1a changes in the same manner as the operating status of the sequencer 1a. The state signal written in the shared memory 6a can be transferred to the sequencer 1b by intervening an appropriate communication means or by transferring it between the CPUs of the control circuit 2b. For example, the predetermined writing is completed in the sequencer 1a. After that, a write completion signal is sent from the sequencer 1a side to the sequencer 1b side, and the sequencer 1b is configured to perform predetermined reading and subsequent processing based on the write completion signal, thereby transferring the status signal. can be carried out without any delay.

When the sequencer 1a's self-diagnosis function detects its own failure and issues an abnormality signal, the abnormality monitoring device 14 operates to switch the selector switch 8, and The input/output line 9 becomes connected. As mentioned above, since Je-Kun 4J 1b changes its own state in the same way as the operating state of sequencer 1a with respect to a predetermined state signal, it maintains continuity in switching at least regarding the important signals mentioned above. Therefore, the operation of the device including the input/output device 13 as a component can be continued without stopping.

In this way, the faulty sequencer 1a can be repaired while the sequencer 1b continues to operate the device, and when the sequencer 1a is restored, this sequencer 1a can be repaired.
a serves as a backup for the sequencer 1b, and mutual backup is performed.

(Effects of the Invention) As described above, the present invention configures a pair of sequencers so that they can be selectively operated by switching input/output lines, and each sequencer is provided with a status signal storage means readable by the other sequencer, so that they can communicate with each other. A sequencer mechanism that can be backed up is configured, and one sequencer in an operating state writes a predetermined state signal corresponding to its operating state in the state signal storage means, and the other sequencer writes in the state signal storage means. Reads the entered state W3 signal at any time, and determines the state of itself based on the operation signal.
Since the dynamic state of one of the sequencers changes in the same way as the one of the sequencers mentioned above and is put on standby, even if one of the sequencers in operation fails, the failure detection means detects this and switches the input/output line, thereby preventing at least important The continuity of the status signals can be maintained and control of the device can be continued, which has the effect of greatly improving the safety and reliability of the device.

[Brief explanation of drawings]

The figure is an explanatory diagram schematically representing an embodiment of the present invention. Sign @1a, 'Ib...Sequencer, 2a, 2b-IJ
Control circuit, 3a, 3b...Memory for internal calculation, 4a. 4b...Input memory, 5a, 5b...Output memory, 6a, 6b...Shared memory (state signal storage means)
, 7a, 7b... Input/output line, 8... Selector switch, 9... Common input/output line, 10... Input/output interface, 11... Switch, 12... Solenoid valve, 1
3... Input/output equipment, 14... Abnormality monitoring device.

Claims (3)

[Claims] (1) A pair of sequencers is configured to be selectively operable by switching input/output lines, and each sequencer is provided with a status signal storage means that can be read by the other sequencer, so that one sequencer in an operating state can control its operation. In addition to writing a predetermined state signal corresponding to the state into the state signal storage means, the other sequencer reads out the state signal written in the state signal storage means at any time, and determines its own state based on the operation signal. , a method for backing up a sequencer control circuit, characterized in that the operating state of one of the sequencers is made to change and stand by in the same manner as the operating state of the one sequencer. (2) A sequencer capable of mutual backup, characterized in that a pair of sequencers is configured to be selectively operable by switching input/output lines, and each sequencer is provided with a status signal storage means that can be read by the other sequencer. mechanism (3) A method for backing up a sequencer control circuit, characterized in that only an important part of all the status signals corresponding to the operating status is written into the status signal storage means described in item 1, and then read out.