JPH0363904U - - Google Patents
Info
- Publication number
- JPH0363904U JPH0363904U JP12593089U JP12593089U JPH0363904U JP H0363904 U JPH0363904 U JP H0363904U JP 12593089 U JP12593089 U JP 12593089U JP 12593089 U JP12593089 U JP 12593089U JP H0363904 U JPH0363904 U JP H0363904U
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- view
- flat surfaces
- perspective
- variable resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 17
- 239000000463 material Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Adjustable Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
第１図は本考案の実施例を示す絶縁基板の斜視
図、第２図は第１図の絶縁基板に対して上面電極
膜、下面電極膜、円弧状抵抗膜及び側面電極膜を
塗着形成したときの斜視図、第３図は第１図の絶
縁基板に電極膜及び円弧状抵抗膜を塗着形成した
ときの斜視図、第４図は絶縁基板における素材板
の平面図、第５図は開放型チツプ可変抵抗器の縦
断正面図、第６図は第５図の平面図、第７図は開
放型チツプ可変抵抗器における絶縁基板の斜視図
、第８図は第７図の絶縁基板に上面電極膜及び下
面電極膜を塗着形成したときの斜視図、第９図は
第７図の絶縁基板に側面電極膜を塗着形成したと
きの斜視図、第１０図は密閉型チツプ可変抵抗器
の縦断正面図、第１１図は第１０図の−
視断面図、第１２図は密閉型チツプ可変抵抗器に
おける絶縁基板の斜視図、第１３図は第１２図の
絶縁基板に電極膜及び円弧状抵抗膜を塗着形成し
たときの斜視図、第１４図は第１２図の絶縁基板
に端子金具を被嵌係着したときの斜視図である。
Ａ……開放型チツプ可変抵抗器、Ａ５，Ａ６…
…開放型チツプ可変抵抗器における電極端子部、
Ｂ……密閉型チツプ可変抵抗器、Ｂ５，Ｂ６……
密閉型チツプ可変抵抗器における電極端子部、１
……絶縁基板、１ａ，１ｂ……絶縁基板の左右両
側面、１ｃ……絶縁基板の一側面、２，３……平
坦面、４……凹み部、５，６……突起部、１０…
…素材板、１１……縦筋目線、１２……横筋目線
。
Fig. 1 is a perspective view of an insulating substrate showing an embodiment of the present invention, and Fig. 2 is a top electrode film, a bottom electrode film, an arcuate resistance film, and a side electrode film formed by coating on the insulating substrate shown in Fig. 1. 3 is a perspective view of the insulating substrate shown in FIG. 1 with an electrode film and an arc-shaped resistive film coated and formed, FIG. 4 is a plan view of the material plate of the insulating substrate, and FIG. 5 6 is a plan view of FIG. 5, FIG. 7 is a perspective view of the insulating substrate in the open-chip variable resistor, and FIG. 8 is the insulating substrate of FIG. 7. FIG. 9 is a perspective view of the insulating substrate of FIG. 7 with a side electrode film coated and formed. FIG. 10 is a closed type variable chip. A vertical cross-sectional front view of the resistor, Figure 11 is the − of Figure 10.
12 is a perspective view of an insulating substrate in a sealed chip variable resistor; FIG. 13 is a perspective view when an electrode film and an arcuate resistance film are coated and formed on the insulating substrate of FIG. 12; FIG. 14 is a perspective view of the insulating substrate shown in FIG. 12 when the terminal fitting is fitted and secured thereto. A...Open chip variable resistor, A5, A6...
...electrode terminal part in open-chip variable resistor,
B... Sealed chip variable resistor, B5, B6...
Electrode terminal part in sealed chip variable resistor, 1
...Insulating substrate, 1a, 1b...Both left and right sides of the insulating substrate, 1c...One side of the insulating substrate, 2, 3...Flat surface, 4...Concave portion, 5, 6...Protrusion, 10...
...Material board, 11...Vertical line perspective, 12...Horizontal line perspective.
Claims (1)
て、該絶縁基板における一側面と左右両側面との
隅角部に、左右一対の平坦面を、当該両平坦面が
前記左右両側面の略平行に延びるように形成する
一方、前記絶縁基板の一側面に、当該一側面のう
ち前記両平坦面に隣接する部位に各々突起部を隆
起するようにした凹み部を設けたことを特徴とす
るチツプ可変抵抗器における絶縁基板の構造。 In an insulating substrate formed into a rectangular shape in plan view, a pair of left and right flat surfaces are provided at the corners of one side surface and both left and right side surfaces of the insulating substrate so that the two flat surfaces extend approximately parallel to the left and right side surfaces. and a chip variable resistor characterized in that one side of the insulating substrate is provided with recesses each having a raised protrusion at a portion of the one side adjacent to both the flat surfaces. structure of an insulating substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989125930U JPH0621206Y2 (en) | 1989-10-26 | 1989-10-26 | Structure of Insulating Substrate in Chip Variable Resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989125930U JPH0621206Y2 (en) | 1989-10-26 | 1989-10-26 | Structure of Insulating Substrate in Chip Variable Resistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0363904U true JPH0363904U (en) | 1991-06-21 |
| JPH0621206Y2 JPH0621206Y2 (en) | 1994-06-01 |
Family
ID=31673775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989125930U Expired - Lifetime JPH0621206Y2 (en) | 1989-10-26 | 1989-10-26 | Structure of Insulating Substrate in Chip Variable Resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0621206Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63173303A (en) * | 1987-01-12 | 1988-07-16 | 株式会社村田製作所 | Variable resistor |
-
1989
- 1989-10-26 JP JP1989125930U patent/JPH0621206Y2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63173303A (en) * | 1987-01-12 | 1988-07-16 | 株式会社村田製作所 | Variable resistor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0621206Y2 (en) | 1994-06-01 |