JPH036577U - - Google Patents
Info
- Publication number
- JPH036577U JPH036577U JP6755289U JP6755289U JPH036577U JP H036577 U JPH036577 U JP H036577U JP 6755289 U JP6755289 U JP 6755289U JP 6755289 U JP6755289 U JP 6755289U JP H036577 U JPH036577 U JP H036577U
- Authority
- JP
- Japan
- Prior art keywords
- measurement
- output
- measurement unit
- terminal
- shifted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims description 15
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
第１図はこの考案によるデバイスの並列測定接
続回路図である。
１…直流測定ユニツト、２…リレーマトリツク
ス、３…ＣＵＰ、４…共通ライン、５…ピンリレ
ー、６…デバイス、１１〜１８…直流測定ユニツ
ト、４１〜４８…共通ライン、６１〜６４…デバ
イス。
FIG. 1 is a circuit diagram of the parallel measurement connection of the device according to this invention. DESCRIPTION OF SYMBOLS 1...DC measurement unit, 2...Relay matrix, 3...CUP, 4...Common line, 5...Pin relay, 6...Device, 11-18...DC measurement unit, 41-48...Common line, 61-64...Device.
Claims (1)
ーマトリツクス２と、 リレーマトリツクス２のオンオフを制御するＣ
ＰＵ３と、 リレーマトリツクス２の出力に共通ライン４で
接続され、ＣＰＵ３でオンオフを制御される複数
のピンリレー５とを備え、 前記ピンリレー５の出力を複数のデバイス６に
接続し、ＣＰＵ３の制御で前記直流測定ユニツト
１の第１番目の直流測定ユニツト１１の出力を前
記デバイス６の第１番目のデバイス６１の第１番
目の端子６１−１に接続し、前記直流測定ユニツ
ト１の第２番目の直流測定ユニツト１２の出力を
前記デバイス６の第２番目のデバイス６２の第２
番目の端子６２−２に接続し、以下、異なる直流
測定ユニツト１の出力を異なるデバイス６の１つ
ずれた端子に接続して直流測定をし、 次に、前記直流測定ユニツト１の第２番目の直
流測定ユニツト１２の出力を前記デバイス６の第
１番目のデバイス６１の第２番目の端子６１−２
に接続し、前記直流測定ユニツト１の第３番目の
直流測定ユニツト１３の出力を前記デバイス６の
第２番目のデバイス６２の第３番目の端子６２−
３接続し、以下、１つだけずれた直流測定ユニツ
ト１の出力を１つだけずれたデバイス６の端子に
接続して直流測定をすることを特徴とするデバイ
スの並列測定接続回路。[Claims for Utility Model Registration] A plurality of DC measurement units 1, a relay matrix 2 that receives the outputs of the DC measurement units 1 as input, and a C that controls on/off of the relay matrix 2.
It is equipped with a PU 3 and a plurality of pin relays 5 which are connected to the output of the relay matrix 2 through a common line 4 and whose on/off is controlled by the CPU 3.The output of the pin relay 5 is connected to a plurality of devices 6 and which are controlled by the CPU 3. The output of the first DC measurement unit 11 of the DC measurement unit 1 is connected to the first terminal 61-1 of the first device 61 of the device 6; The output of the DC measuring unit 12 is transferred to the second device 62 of the device 6.
Then, the outputs of the different DC measurement units 1 are connected to terminals shifted by one of different devices 6 for DC measurement. The output of the DC measurement unit 12 is connected to the second terminal 61-2 of the first device 61 of the device 6.
and connect the output of the third DC measurement unit 13 of the DC measurement unit 1 to the third terminal 62- of the second device 62 of the device 6.
3. A parallel measurement connection circuit for devices, characterized in that the output of the DC measurement unit 1 shifted by one is connected to the terminal of the device 6 shifted by one to perform DC measurement.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6755289U JPH036577U (en) | 1989-06-09 | 1989-06-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6755289U JPH036577U (en) | 1989-06-09 | 1989-06-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH036577U true JPH036577U (en) | 1991-01-22 |
Family
ID=31601221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6755289U Pending JPH036577U (en) | 1989-06-09 | 1989-06-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH036577U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01119772A (en) * | 1987-11-02 | 1989-05-11 | Mitsubishi Electric Corp | Ic tester |
-
1989
- 1989-06-09 JP JP6755289U patent/JPH036577U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01119772A (en) * | 1987-11-02 | 1989-05-11 | Mitsubishi Electric Corp | Ic tester |