JPH0366582U - - Google Patents
Info
- Publication number
- JPH0366582U JPH0366582U JP12540489U JP12540489U JPH0366582U JP H0366582 U JPH0366582 U JP H0366582U JP 12540489 U JP12540489 U JP 12540489U JP 12540489 U JP12540489 U JP 12540489U JP H0366582 U JPH0366582 U JP H0366582U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power supply
- capacitors
- clock signal
- supply voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
図面は本考案の回路構成を示した電気回路図で
ある。
１……電源回路、２ａ，２ｂ……コンデンサ、
３……信号発生回路、７……切換え回路、９……
制御回路。
The drawing is an electrical circuit diagram showing the circuit configuration of the present invention. 1...Power supply circuit, 2a, 2b...Capacitor,
3...Signal generation circuit, 7...Switching circuit, 9...
control circuit.
Claims (1)
ンデンサと、 この各コンデンサにより降圧された電圧を電源
電圧としてクロツク信号を発生する信号発生回路
と、 上記電源回路の端子間における上記各コンデン
サの接続状態を、上記信号発生回路からのクロツ
ク信号の基づいて、直列と並列に交互に切り換え
る切換え回路と、 上記電源回路の投入から所定時間は、上記切換
え回路によつて上記各コンデンサを上記電源回路
の端子間に直列接続する制御回路と、 を具備することを特徴とする降圧回路。[Claims for Utility Model Registration] A power supply circuit that generates a power supply voltage, two capacitors to step down this power supply voltage to 1/2, and a clock signal that generates a clock signal using the voltage stepped down by each capacitor as the power supply voltage. a signal generation circuit; a switching circuit that alternately switches the connection state of each of the capacitors between terminals of the power supply circuit between series and parallel based on a clock signal from the signal generation circuit; A step-down circuit comprising: a control circuit that connects each of the capacitors in series between terminals of the power supply circuit by the switching circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12540489U JPH0619314Y2 (en) | 1989-10-26 | 1989-10-26 | Step-down circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12540489U JPH0619314Y2 (en) | 1989-10-26 | 1989-10-26 | Step-down circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0366582U true JPH0366582U (en) | 1991-06-27 |
| JPH0619314Y2 JPH0619314Y2 (en) | 1994-05-18 |
Family
ID=31673275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12540489U Expired - Lifetime JPH0619314Y2 (en) | 1989-10-26 | 1989-10-26 | Step-down circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0619314Y2 (en) |
-
1989
- 1989-10-26 JP JP12540489U patent/JPH0619314Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0619314Y2 (en) | 1994-05-18 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |