JPH036679U - - Google Patents

Info

Publication number
JPH036679U
JPH036679U JP6582989U JP6582989U JPH036679U JP H036679 U JPH036679 U JP H036679U JP 6582989 U JP6582989 U JP 6582989U JP 6582989 U JP6582989 U JP 6582989U JP H036679 U JPH036679 U JP H036679U
Authority
JP
Japan
Prior art keywords
current
deflection
value
circuit
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6582989U
Other languages
Japanese (ja)
Other versions
JPH079192Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6582989U priority Critical patent/JPH079192Y2/en
Publication of JPH036679U publication Critical patent/JPH036679U/ja
Application granted granted Critical
Publication of JPH079192Y2 publication Critical patent/JPH079192Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Details Of Television Scanning (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例で偏向回路に組合わ
せ構成した回路ブロツク図、第2図は偏向回路の
各部の電圧もしくは電流波形図、第3図は従来例
の回路ブロツク図である。 1……カレントミラー回路、2……定電流源、
3……放電回路、4……差動増幅器、5……偏向
出力回路、6……ポテンシヨメータ、7,8……
抵抗、9……コンデンサ、10……偏向ヨーク、
12……帰還抵抗、35……抵抗、36……ダイ
オード、40……ランプ波形増幅回路、41……
(ピーク値検出ホールド手段となる)ピークホー
ルド回路、42……(制御電流発生手段となる)
ピーク値判定回路。
FIG. 1 is a circuit block diagram of an embodiment of the present invention combined with a deflection circuit, FIG. 2 is a voltage or current waveform diagram of each part of the deflection circuit, and FIG. 3 is a circuit block diagram of a conventional example. 1... Current mirror circuit, 2... Constant current source,
3... Discharge circuit, 4... Differential amplifier, 5... Deflection output circuit, 6... Potentiometer, 7, 8...
Resistor, 9... Capacitor, 10... Deflection yoke,
12... Feedback resistor, 35... Resistor, 36... Diode, 40... Ramp waveform amplification circuit, 41...
Peak hold circuit (becomes a peak value detection and hold means), 42... (becomes a control current generation means)
Peak value judgment circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] カレントミラー回路により、発生された所定の
値の定電流をコンデンサに流し、垂直周波数の発
振パルスにより放電して、のこぎり波を作成し、
該のこぎり波によつて偏向ヨークに流れる偏向電
流を制御するデイスプレイ装置の垂直偏向電流振
幅制回路において、前記偏向電流のピーク値を検
出ホールドする手段と、該ピークホールド値を一
定値と比較し、該一定値を超えたときに、前記カ
レントミラー回路の前記定電流を減少させる制御
電流を発生する手段とを設けたことを特徴とする
垂直偏向電流振幅制限回路。
A constant current of a predetermined value generated by a current mirror circuit is passed through a capacitor, and is discharged by an oscillation pulse of a vertical frequency to create a sawtooth wave.
In a vertical deflection current amplitude control circuit of a display device that controls a deflection current flowing through the deflection yoke by the sawtooth wave, means for detecting and holding a peak value of the deflection current, and comparing the peak hold value with a constant value; A vertical deflection current amplitude limiting circuit comprising means for generating a control current that reduces the constant current of the current mirror circuit when the constant current exceeds the certain value.
JP6582989U 1989-06-07 1989-06-07 Vertical deflection current amplitude limiting circuit Expired - Lifetime JPH079192Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6582989U JPH079192Y2 (en) 1989-06-07 1989-06-07 Vertical deflection current amplitude limiting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6582989U JPH079192Y2 (en) 1989-06-07 1989-06-07 Vertical deflection current amplitude limiting circuit

Publications (2)

Publication Number Publication Date
JPH036679U true JPH036679U (en) 1991-01-23
JPH079192Y2 JPH079192Y2 (en) 1995-03-06

Family

ID=31598014

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6582989U Expired - Lifetime JPH079192Y2 (en) 1989-06-07 1989-06-07 Vertical deflection current amplitude limiting circuit

Country Status (1)

Country Link
JP (1) JPH079192Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001215102A (en) * 2000-02-03 2001-08-10 Mikuni Corp Position detection device
KR200476653Y1 (en) * 2014-04-09 2015-03-17 성 엽 이 Cheer T-Shirt

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001215102A (en) * 2000-02-03 2001-08-10 Mikuni Corp Position detection device
KR200476653Y1 (en) * 2014-04-09 2015-03-17 성 엽 이 Cheer T-Shirt

Also Published As

Publication number Publication date
JPH079192Y2 (en) 1995-03-06

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