JPH0366890B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field to Which the Invention Pertains] The present invention relates to a computer tomography apparatus used primarily as an electronic medical device. In particular, the present invention relates to an improvement in a computer tomography apparatus that reconstructs a radiation absorption coefficient distribution image for a cross-sectional portion of a subject using a back projection method.

[Description of prior art]

Computerized tomography equipment generates radiation and transmits it to a cross-sectional area of the subject.
It is configured to collect perspective image data obtained as a large number of sampling data in a large number of angular directions with respect to the cross-sectional portion. Fluoroscopic image data is collected by transmitting a parallel beam of radiation through a cross section of the object and scanning the parallel beam within the cross section, or by generating fan beam radiation and directing it to the subject. Some methods involve transmitting light through a cross-section of the specimen. Collecting fluoroscopic image data using parallel beams is inefficient, takes a long time to collect data, and the energy of the radiation source is inefficient. Are better. However, in order to reconstruct the radiation absorption coefficient distribution image using the back projection method from the perspective image data collected by the Fan beam, the calculation process is inevitably complicated, and therefore it takes a long time to obtain the reconstructed image. It takes longer. Furthermore, the equipment for this purpose is complicated and expensive, and requires a large amount of maintenance work.

In order to improve this, the inventor of the present application irradiated the subject with a fan beam to obtain fluoroscopic image data using the fan beam, converted this into data equivalent to fluoroscopic image data using a parallel beam through calculation, and inverted the data. He invented a method for performing projection processing and filed a patent application (Japanese Patent Application No. 44,802/1986).

In this way, it is possible to efficiently collect perspective image data using a fan beam, and quickly perform back projection processing using a parallel beam.The configuration is simple and economical, and maintainability is excellent. We realized the feasibility of a back projection device that can flexibly respond to changes in

[Purpose of the invention]

The present invention reduces the burden on computer software and hardware, can execute backprojection calculation processing at high speed, has a simple configuration, is excellent in economy, is excellent in maintenance, and is Back projection control device BPC for reconstruction, partial enlargement reconstruction, etc.
An object of the present invention is to provide a computer tomography device that can flexibly respond to changes in conditions.

[Features of the invention]

The present invention is an apparatus that collects data by irradiating radiation in a large number of polygonal directions, and reconstructs a distribution image of radiation absorption coefficients by back-projecting the obtained fluoroscopic image data. The device includes a first memory circuit that stores input parallel beam data, and a first memory circuit that uses the readout output of this first memory circuit as one input and its output as the other input. an adder circuit; a second memory circuit that takes the output of the first adder circuit as an input and supplies the readout output to the other input of the first adder circuit; A first register file whose output is led to the address input of the first storage circuit, the read output of this first register file is used as one input, and the addition output is the output of this first register file. a second register file whose initial value can be set externally and whose read output is supplied to the other input of the second adder circuit; A storage circuit, the first and second register files, and a control circuit that controls the first and second adder circuits are provided as specific hardware, and each of the circuits operates simultaneously in parallel. The present invention is characterized in that the extraction of stored addition data, the cumulative addition of a large number of data, and the storage in memory are performed efficiently and at high speed.

The reconstruction by back projection of the present invention is performed using data for parallel beams. When the data is obtained using a parallel beam, the perspective image data can be used as is. When the perspective image data is collected by a Fan beam, this data may be converted into parallel beam data by calculation and supplied to a means for reconstructing by a back projection method.

Reconstruction from a fan beam requires complicated arithmetic processing and requires a large number of backprojection processing points, so the time for reconstruction occupies a large portion of the backprojection processing time. However, by specially providing the above-mentioned small amount of hardware to efficiently and quickly perform the cumulative addition of a large amount of data and the extraction of stored data, the processing time for backprojection can be shortened, and the data The time from acquisition to reconstruction of the radiation absorption coefficient distribution image is practically real time.

[Explanation based on examples]

FIG. 1 is a block diagram of a computerized tomography apparatus according to an embodiment of the present invention. table gantry
The TG is equipped with an X-ray generator XG and an X-ray detector S, and is configured so that the subject PA (patient) can lie down. Fan beam X-rays are generated from the X-ray generator XG to the subject PA by a known method and transmitted through the subject PA, and then converted into electrical signals by the X-ray detector S. This electrical signal is amplified and integrated by the data acquisition device DAS, and converted into an analog-to-digital signal to obtain perspective image data of the digital signal. This transmission image data is stored in the data storage device DS1.
The image is temporarily stored in the memory, and preprocessed for cross-sectional image reconstruction by the preprocessing device PPC. The data obtained as a result of the preprocessing is temporarily stored in the data storage device DS2. The data stored in this data storage device DS2 is stored in the Fan beam parallel beam conversion device.
It is processed by the FPC and temporarily stored in the data storage device DS3.

For this data, Fourier transform device FFT
A Fourier transform process is performed between the two, and the result is temporarily stored in the data storage device DS4. The data stored in the data storage device DS4 is subjected to filter processing by the filter device FILT, further subjected to inverse Fourier transform processing by the inverse Fourier transform device IFFT, and temporarily stored in the data storage device DS5. This data is processed by the back projection control device BPC to become video data and is stored in the video data storage device IM. This video data is photographed by the image photographing device MFC and displayed on the image display device GDC.

The table/gantry TG above has a table/gantry.
Gantry control device TGC is connected, X-ray generation section control device XGC is connected to X-ray generation section XG,
Each is configured to control X-ray generation and irradiation.

These table gantry controllers TGC
and X-ray generator control device XGC, each data storage device DS1 to DS5, and video data storage device
IM, each processing unit, control unit and conversion unit are
It is configured to be controlled by a photography control device SCC.

In the computer tomography apparatus configured in this way, the subject PA is placed on the table/gantry TG, and fluoroscopic image data obtained as a plurality of N sampling data for each cross-sectional portion of the subject PA is collected in a large number of angular directions. After being stored in the data storage device DS1 and subjected to preprocessing,
The perspective image data collected by the fan beam is converted to parallel beam data by the fan beam parallel beam converter FPC. Regarding that data,
Fourier image data regarding the cross section is obtained by Fourier transform using a Fourier transform device FFT. This data is stored in the data storage device DS4, subjected to filter processing by the filter device FILT and inverse Fourier transform processing by the inverse Fourier transform device IFFT to become data corresponding to the radiation absorption coefficient, and then back-projected by the back projection control device BPC. Being done,
This results in image data that shows the distribution of radiation absorption coefficients in each part. This is displayed on the image display device GDC, and a photograph is taken using the image photographing device MFC.

Here, the feature of the present invention lies in the hardware of the back projection control device BPC.

Figure 2 shows a back projection control device of an embodiment of the present invention.
It is a block diagram of BPC. The data line DATA has
Enter the data required for backprojection. This data is sent to the first storage circuit via the input register HMI.
Stored in HM. The read output of the first memory circuit HM is applied to one input A1 of the first adder circuit FADD via an output register HMO.
The output of this adder circuit FADD is the input register MMI
The data is stored in the second memory circuit MM via. The readout output of this second memory circuit MM is an output register.
It is connected to the other input of the first adder circuit FADD via MMO and the switching circuit S2. In addition to the output of the output register MMO, the input of this switching circuit S2 is connected to the "0" data input and the output of the first adder circuit FADD. is configured to be applied to the other input of the . The output of the output register MMO is sent to the image output IMAG via the driver DRV. Second memory circuit MM
The address of is given by address register MA.

The address of the first memory circuit HM is given from the first register BA. This first register file BA is connected from the address input ADRS to the switching circuit S1.
The output of the first register file BA is connected to one input A of the second adder circuit ADD. The output of this second adder circuit ADD is
The first register file via switching circuit S1
Connected to BA input. The other input B of the second adder circuit ADD has a second register file.
IA output is connected. This second register
File IA is configured so that initial values can be set from address input ADRS.

Each of these circuits is controlled by a control circuit CTL including a microprocessor via control lines C11 to C42. The control circuit CTL is provided with signal lines L1 and L2 for transmitting and receiving signals with other circuit devices of the computer tomography apparatus.

Next, the algorithm of this example device will be briefly explained. Figure 5 is a diagram showing the cross section of the object PA on the xy plane for a parallel beam, and p(t,
θ) is the projection data (projection) of the radiation on the straight line L on the tY plane, f(x, y) is the point PT
Assuming that the radiation absorption coefficient at (x, y) and Δt is the length between adjacent parallel lines, the algorithm for the filtered back projection method is as follows.

The fast Fourier transform FFT algorithm is The filtering algorithm is Q(ωn, θi) = P(ωn, θi)・H(ωn)...(2) The inverse Fourier transform IFFT algorithm is: f(x,y)=CμΣq(ti,θi)...(4) However, ti=x・coθi+y・sinθi Cμ is a constant, and H(ω) is a filter function.

Here, the algorithm for deep backprojection of direct functions according to the present invention will be described in detail.

FIG. 3 is a diagram showing the reconstruction area and pixels (pixels of the reconstructed radiation absorption coefficient distribution image). For simplicity, consider a circle that encompasses the object,
Consider the xy coordinates with the center of this circle as the origin, and consider the case where reconstruction is performed sequentially from the leftmost pixel along the straight line y=yj. The symbols for this Figure 3 are defined as follows.

L ₀ : Parallel beam passing through the leftmost pixel on y=y _j Lc: Parallel beam passing through the center C of the reconstruction area Li: Parallel beam passing through the i-th pixel from the left end on y=y _j PIX: Pixel size (Length between adjacent pixels) t: Vertical distance between beam L ₀ and Li p: Distance between adjacent channels (channels are discretized, interpolated and expanded) At this time, parallel beam Assuming that makes an angle θ with the positive direction of the x-axis, L=i・PIX ...(5) t=i・PIX sinθ ...(6) DCH=t/p=i(PIX/p) sinθ =(CHI・
sinθ)i...(7) Here, CHI=PIX/p. Let the beam number (channel number corresponding to the detector) of the parallel beam L ₀ be CH ₀ (j, k).
However, j is the number corresponding to the straight line y _j , and k is the View
The number corresponding to However, the beam numbers of parallel beams shall increase from left to right in the beam traveling direction. At this time, the parallel beam
The beam number of Li is CHi (j, k) = CH ₀ (j, k) - (CHIsinθ)i
...(8) However, i=0, 1, 2, ...nj- ₁ . Therefore, the intensity of the back projection data of the i-th beam (channel corresponding to the detector) from the left end on the straight line y = y _j of k (View) is: q (i, j, k) = q (CHi (j, k)) ... (9) However, CHi ₊₁ (j, k) = CHi (j, k) - CHIsinθ _k ... (10). In actual backprojection, n (Views) are backprojected at once.

FIG. 4 shows the backprojection procedure of the apparatus according to the present invention based on this algorithm. This will be explained in conjunction with the apparatus shown in FIG.

The input data q (CHi (j, k)) that has undergone convolution processing is stored in the memory circuit HM. This is an addition circuit that performs cumulative addition from 0 to n for k.
This is executed by storing FADD and its result in the memory circuit MM. The number of data is, for example, the unit of 2048 data, which is the number of actual unidirectional measurement data (number of data for 1 view (1 project)) 512 plus the number of linear interpolation data of 1536, and this is multiplied by n (1 time). (number of views of back projection), that is, 2048×n data is used. The data stored in the memory circuit HM is not changed until all backprojections of n views are completed.

At this time, in order to properly extract the input data,
Register file BA, register file IA
The address of the memory circuit HM is automatically created by the adder circuit ADD. This address CHi
(j, k) is calculated by equation (8), CHIsinθ _k is initialized by n views in register IA, CH ₀ (j, k) is initialized by n views in register file BA, and The added data in (8) is stored in register file BA.

Then, the addition circuit FADD performs an addition operation using back projection. For the _A2 input of this adder circuit FADD, 0 is selected for the first addition at each point for the first n views, and the output of the adder circuit FADD is selected for the next addition. The memory circuit MM0 is selected for the first addition at each point regarding n views other than the first, and the output of the adder circuit FADD is selected for the next addition.

In this way, the arithmetic operation is repeatedly executed many times while sequentially incrementing i and j.

In other words, input data for n views, CH ₀ (j,
k) data, CHIsinθ _k data are initialized in the storage circuit HM, register file BA, and register file IA, respectively, and back projection is started. From then on, at the end of each line, CH ₀ (j, k)
The data is set in the register file BA, backprojection is performed for n views on the next line, and this process is repeated. This alone allows backprojection of n views to all points in the entire image matrix.

The overall backprojection speed is 1 cycle per point and view + very little overhead.
Also, access to the memory circuit MM is 2 times in n cycles.
The number of accesses (one read and one write) is required, and the operation is slow.

Each of the algorithms shown in the example above is just an example, and as long as back projection is performed on parallel beam data, it is necessary to repeat the calculation operation of cumulative addition many times, and other algorithms may be applied. The present invention can be practiced even if

Furthermore, the device of the present invention can be equipped with processing devices such as a dedicated high-speed processor (array processor, etc.), CPU, or microprocessor, or can be connected with a storage device such as a magnetic disk, floppy disk, or magnetic tape. It can also be configured by adding a display/operator such as an operator console. Alternatively, it is possible to configure the system by omitting unnecessary devices. Further, in the above embodiments, a plurality of data storage devices can be shared, a plurality of processing devices can be combined, or they can be separated.

Data lines and address lines can be shared, internal control lines can be separated, or they can be provided separately.

[Explanation of effects]

As described above, according to the present invention, calculation processing for reconstruction by back projection can be executed at high speed with the help of hardware. The amount of hardware added for the present invention is small, and it is more economical than providing multiple processors or increasing the speed of the processors.

In addition, the simple configuration makes it easy to maintain, and it can be used as is without changing the back projection of image reconstruction, such as partial enlargement, without changing parts of the device. , the device of the invention has wide flexibility.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.
Figure 2 shows a back projection control device of an embodiment of the present invention.
BPC block diagram. FIG. 3 is a diagram showing the reconstruction area and pixels. FIG. 4 is a flowchart showing the control procedure of the back projection control device BPC of the apparatus according to the embodiment of the present invention. FIG. 5 is a diagram showing the geometric relationship and coordinates of the reconstruction area and the parallel beam.

Claims (1)

[Scope of Claims] 1. Radiation is generated, the radiation is transmitted through a cross section of a subject, and fluoroscopic image data obtained as a large number of sampling data for each cross section is obtained in a large number of angular directions around the subject. a first means for obtaining back projection image data of a parallel beam by performing a part of a reconstruction operation for obtaining a distribution of radiation absorption coefficients with respect to the cross-sectional portion on the fluoroscopic image data; and a second means for reconstructing a radiation absorption coefficient distribution image regarding the cross-sectional portion by a back projection method from back projection image data obtained by the method, the second means comprising: a first memory circuit HM for storing back projection image data of the parallel beam obtained by the means;
and a first adder circuit FADD which takes the readout output of this first storage circuit as one input; and a first adder circuit FADD which takes the output of this first adder circuit as its input and whose readout output is the other input of this first adder circuit. a second memory circuit MM that supplies an initial value to the first memory circuit; a first register file BA whose initial value can be set externally and whose readout output is guided to the address input of the first memory circuit; - A second adder circuit that takes the readout output of the file as one input and provides the addition output to the input of this first register file.
ADD; a second register file IA whose initial value can be externally set and which provides a readout output to the other input of the second adder circuit; the first and second storage circuits; and a second register file, and a control circuit CTL that controls the first and second adder circuits, and is configured such that each of the circuits can operate in parallel at the same time. Computerized tomography equipment. 2. The computer tomography apparatus according to claim 1, wherein the first means is configured to generate parallel beam radiation and collect parallel beam perspective image data. 3. The first means is a patent claim that includes means for generating Fan beam radiation and means for converting into parallel beam data by calculation based on perspective image data obtained by Fan beam radiation. The computer tomography device according to scope 1. 4. Claim 1, wherein the first storage circuit is a high-speed random access memory, and the second storage circuit is a random access memory with a larger capacity and lower speed than the first storage circuit. computer tomography equipment. 5. The computer tomography apparatus according to claim 1, wherein the first storage circuit and the second storage circuit include input and output registers at their respective inputs and outputs, respectively. 6. The computer tomography apparatus according to claim 1, wherein the first addition circuit is a floating-point addition circuit.