JPH036704B2 - - Google Patents
Info
- Publication number
- JPH036704B2 JPH036704B2 JP55142879A JP14287980A JPH036704B2 JP H036704 B2 JPH036704 B2 JP H036704B2 JP 55142879 A JP55142879 A JP 55142879A JP 14287980 A JP14287980 A JP 14287980A JP H036704 B2 JPH036704 B2 JP H036704B2
- Authority
- JP
- Japan
- Prior art keywords
- time
- transmitter
- transmission power
- circuit
- guard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
- H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
- H04B7/2643—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile using time-division multiple access [TDMA]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Monitoring And Testing Of Transmission In General (AREA)
- Transmitters (AREA)
Description
【発明の詳細な説明】
本発明は故障に対する保護機能を備えた時分割
により駆動制御される送信機に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-sharing controlled transmitter with protection against failures.
時分割マルチアクセス（TDMA）通信方式に
おいては、周知のように１つの回線周波数が複数
の局において時分割により使用される。したがつ
て、各々の局は自局に割りあてられた時間のみ送
信機を起動し、電力を送出することができる。と
ころが、ここで問題になるのは、システムの運用
中に１局の送信機の制御に故障が生じて、常に送
信電力が送出されるようになると、他のすべての
局の送信信号に妨害を与え、システムダウンとな
る。従来このようなシステムダウンに対しては、
一旦、すべての局の送信電力の送出を止め、故障
となつた局をつきとめたうえで該当する局の送信
を停止状態におき、再びシステムを起動しなけれ
ばならないという欠点があつた。 In time division multiple access (TDMA) communication systems, one line frequency is used by multiple stations in a time-division manner, as is well known. Therefore, each station can activate its transmitter and transmit power only during the time allotted to it. However, the problem here is that if a failure occurs in the control of one station's transmitter during system operation and the transmitter is constantly transmitting power, it will interfere with the transmitted signals of all other stations. and the system goes down. Conventionally, when a system goes down like this,
The disadvantage of this method is that it is necessary to temporarily stop transmitting power from all stations, locate the malfunctioning station, stop the transmission of that station, and restart the system.
本発明の目的は、この種の故障発生によるも、
故障局のみ送信電力の送出を止めることによつ
て、システムダウンを防止することのできる時分
割により駆動制御される送信機を提供するにあ
る。 The purpose of the present invention is to prevent the occurrence of this type of failure from occurring.
An object of the present invention is to provide a transmitter whose drive is controlled by time division, which can prevent a system failure by stopping sending out transmission power only to a failed station.
ところで、一般にTDMAシステムにおいては、
各局が送信電力を送出する時間（以後タイムスロ
ツト）の間には必ず保護時間（以後ガードタイ
ム）と呼ばれる送信電力を送出しない時間をもつ
ている。従つて、もし送信機に故障が発生し、常
時送信電力を送出する状態になると、そのガード
タイムは消失することになる。本発明はこのよう
な現象に着目して考えられたものである。 By the way, generally in TDMA systems,
Between the times when each station sends out transmission power (hereinafter referred to as time slots), there is always a time called a guard time (hereinafter referred to as guard time) in which no transmission power is sent out. Therefore, if a failure occurs in the transmitter and the transmitter is in a state where it constantly sends out transmission power, the guard time will disappear. The present invention was conceived with attention paid to such a phenomenon.
そして、本発明によれば、時分割により駆動制
御される送信機において、該送信機の送信電力送
出の有無を検出する第１の検出手段と、該第１の
検出手段の出力をうけ、送信電力送出有りの状態
が予め定められた一定時間連続していることを検
出する第２の検出手段と、該第２の検出手段の検
出出力によつて、時分割制御とは別に、送信電力
の送出を断にすべく前記送信機を制御する手段と
を備えたことを特徴とする送信機が得られる。 According to the present invention, in a transmitter whose drive is controlled in a time-division manner, the transmitter includes a first detection means for detecting whether or not transmission power is being transmitted from the transmitter; A second detection means detects that the power transmission state continues for a predetermined period of time, and the detection output of the second detection means is used to control the transmission power separately from time-sharing control. There is obtained a transmitter characterized in that it comprises means for controlling the transmitter to turn off transmission.
次に、本発明による送信機について実施例を拳
げ、図面を参照して説明する。 Next, embodiments of a transmitter according to the present invention will be described with reference to the drawings.
第１図はTDMAの無線回線における送信出力
の有無をタイムチヤートにより示したもので、
“ON”は送信出力あり、“OFF”は送信出力なし
をそれぞれ示している。図ａは正常動作の場合で
あり、T1，T2，T3，…はタイムスロツト、G1，
G2，…はガードタイムを示している。図から判
るように、各タイムスロツト間には必ずガードタ
イムがあり、この間送信出力は断となつている。
図ｂは異常動作の場合であり、例えば、タイムス
ロツトT1を割当てられた局の送信機が常時送信
電力を送出しており、そのためにガードタイムが
存在しない状態を示している。 Figure 1 shows the presence or absence of transmission output on a TDMA wireless line using a time chart.
“ON” indicates that there is a transmission output, and “OFF” indicates that there is no transmission output. Figure a shows the case of normal operation, T 1 , T 2 , T 3 , ... are time slots, G 1 ,
G 2 ,... indicate guard time. As can be seen from the figure, there is always a guard time between each time slot, and the transmission output is cut off during this time.
FIG. b shows a case of abnormal operation, for example, a state in which the transmitter of the station assigned to time slot T1 is constantly transmitting power, and therefore there is no guard time.
第２図は本発明による実施例の構成を示すブロ
ツク図である。この例においては、強制的に送信
出力を断とする手段として送信機への電源供給を
遮断する方法を用いた。１は送信機、２は送信カ
ツプラ、３は送信電力検出回路、４はガードタイ
ムの有無を判断する回路、５は送信機電源供給回
路である。動作に際して、送信機１が電源供給回
路５からの電源供給により送信電力を送出する
と、その一部が送信カツプラ２を通して送信電力
検出回路３に入力される。第１図ａに示されるご
とく、送信電力送出時には、“ON”の状態、送
信電力がなければ“OFF”の状態で送信電力検
出回路３の出力線１３に信号が現われ、これがガ
ードタイムの有無を判断する回路４の入力とな
る。ガードタイムの有無を判断する回路４によつ
てガードタイムが無と判断されると、制御線１４
を通して送信機電源供給回路５を制御し、電源線
１１を介して送信機１へ与えられる電源の供給を
停止する。 FIG. 2 is a block diagram showing the configuration of an embodiment according to the present invention. In this example, a method of cutting off the power supply to the transmitter was used as a means of forcibly cutting off the transmission output. 1 is a transmitter, 2 is a transmission coupler, 3 is a transmission power detection circuit, 4 is a circuit for determining the presence or absence of a guard time, and 5 is a transmitter power supply circuit. During operation, when the transmitter 1 transmits transmission power by supplying power from the power supply circuit 5, a part of the transmission power is inputted to the transmission power detection circuit 3 through the transmission coupler 2. As shown in Figure 1a, a signal appears on the output line 13 of the transmission power detection circuit 3 in the "ON" state when the transmission power is sent out, and in the "OFF" state if there is no transmission power, which indicates whether or not there is a guard time. This becomes the input to the circuit 4 that determines. When the circuit 4 that determines whether or not there is a guard time determines that there is no guard time, the control line 14
The power supply circuit 5 controls the transmitter power supply circuit 5 through the power supply line 11 and stops supplying power to the transmitter 1 through the power supply line 11.
第３図は、第２図におけるガードタイムの有無
を判断する回路４の具体例をブロツク図により示
したものである。この図において、４−１は
AND回路、４−２はタイマ回路、４−３はフリ
ツプフロツプである。タイマ回路４−２はタイム
スロツトＴよりわずかに長い時間、端子Ｃへクロ
ツクが入力すると、出力端子Ｑからハイレベル
“１”をタイマ出力として導出する。送信電力が
出力されているときは信号機１３ａはハイレベル
“１”となる。信号線１５にはタイムスロツトＴ
およびガードタイムＧよりも充分に短いクロツク
信号が与えられ、信号線１３ｂには送信電力が送
出されていないとき、タイマ回路４−２をリセツ
トするためにハイレベル“１”が付勢される。こ
の回路の動作について、第４図ａおよびｂのそれ
ぞれ正常動作および異常動作を示すタイムチヤー
トを参照して以下に説明する。まず、図ａにおい
て、送信機が正常動作をしている場合、タイムス
ロツトの期間中、信号線１３ａはハイレベル
“１”となり、タイマ回路４−２のクロツク端子
Ｃには信号線１５からのクロツクが加えられてタ
イマが動作し始める。しかし、ガードタイムにな
り送信電力の送出が停止すると、信号線１３ｂが
ハイレベル“１”となつて、タイマ回路４−２に
リセツトがかかり、タイマ回路４−２のＱ出力が
“１”になる前に最初の状態に戻される。もし、
ここで、図ｂに見られるように、送信機が故障し
て常時送信電力を送出する状態になると、信号線
１３ａが“１”になつた時点よりタイマ回路４−
２のクロツク入力端子Ｃにはクロツクが入力し、
タイムスロツト長より僅かに長い時間経過すると
タイマ回路４−２のフルカウントによつてＱ出力
が“１”になる。これにより、後段のフリツプフ
ロツプ４−３がセツトされる。かくして、その出
力は制御線１４により第２図における送信機電源
供給回路５を制御し、送信機１の電源の供給を停
止する。 FIG. 3 is a block diagram showing a specific example of the circuit 4 shown in FIG. 2 for determining the presence or absence of a guard time. In this figure, 4-1 is
4-2 is an AND circuit, 4-2 is a timer circuit, and 4-3 is a flip-flop. When the clock is input to the terminal C for a time slightly longer than the time slot T, the timer circuit 4-2 outputs a high level "1" from the output terminal Q as a timer output. When the transmission power is being output, the signal 13a becomes high level "1". The signal line 15 has a time slot T.
When a clock signal sufficiently shorter than the guard time G is applied and no transmission power is sent to the signal line 13b, a high level "1" is applied to reset the timer circuit 4-2. The operation of this circuit will be described below with reference to time charts shown in FIGS. 4a and 4b showing normal and abnormal operation, respectively. First, in Figure a, when the transmitter is operating normally, the signal line 13a is at a high level "1" during the time slot period, and the clock terminal C of the timer circuit 4-2 receives the signal from the signal line 15. A clock is added and the timer starts running. However, when the guard time comes and the sending of the transmission power is stopped, the signal line 13b becomes high level "1", the timer circuit 4-2 is reset, and the Q output of the timer circuit 4-2 becomes "1". It will be returned to its initial state before it becomes. if,
Here, as shown in FIG. b, if the transmitter fails and becomes in a state where it constantly sends out transmission power, the timer circuit 4-
A clock is input to the clock input terminal C of 2,
When a time slightly longer than the time slot length has elapsed, the Q output becomes "1" due to the full count of the timer circuit 4-2. As a result, the flip-flop 4-3 at the subsequent stage is set. Thus, the output controls the transmitter power supply circuit 5 in FIG. 2 via the control line 14 to stop the power supply to the transmitter 1.
以上の説明により明かなように、本発明によれ
ば、送信機の運用時、常にガードタイムの有無を
判定し、もし一定時間内にガードタイムが生じな
いときは送信機の故障と判断し、送信機への電源
の供給を停止することによつて、故障送信機によ
る他局への干渉を除去し、システムダウンを防止
することができるから、システムの信頼性を向上
すべく得られる効果は大である。 As is clear from the above description, according to the present invention, the presence or absence of a guard time is always determined during operation of a transmitter, and if the guard time does not occur within a certain period of time, it is determined that the transmitter has failed. By stopping the power supply to the transmitter, it is possible to eliminate the interference caused by the failed transmitter to other stations and prevent the system from going down, which has the effect of improving system reliability. It's large.
第１図ａおよびｂは、無線回線におけるそれぞ
れ正常動作および異常動作の状態を示すタイムチ
ヤート、第２図は本発明による実施例の構成を示
すブロツク図、第３図は、第２図におけるガード
タイムの有無を判断する回路４の具体例を示すブ
ロツク図、第４図ａおよびｂは、第３図の回路に
おけるそれぞれ正常動作および異常動作を示すタ
イムチヤートである。
図において、１は送信機、２は送信カツプラ、
３は送信電力検出回路、４はガードタイムの有無
を判断する回路、５は送信機電源供給回路、４−
１はAND回路、４−２はタイマ回路、４−３は
フリツプフロツプである。
FIGS. 1a and 1b are time charts showing normal and abnormal operation states in a wireless line, FIG. 2 is a block diagram showing the configuration of an embodiment according to the present invention, and FIG. 3 is a guard diagram in FIG. 2. FIGS. 4a and 4b, a block diagram showing a specific example of the circuit 4 for determining the presence or absence of time, are time charts showing normal operation and abnormal operation, respectively, in the circuit of FIG. 3. In the figure, 1 is a transmitter, 2 is a transmitting coupler,
3 is a transmission power detection circuit; 4 is a circuit for determining the presence or absence of a guard time; 5 is a transmitter power supply circuit; 4-
1 is an AND circuit, 4-2 is a timer circuit, and 4-3 is a flip-flop.
Claims (1)
割当てられたタイムスロツトのみ送信電力を送出
するように制御される無線送信機において、各局
毎に前記送信機の送信電力送出の有無を検出する
第１の検出手段と、前記第１の検出手段の出力を
受け、送信電力送出有りの状態が前記タイムスロ
ツトよりわずかに長い一定時間以上連続している
かどうかを検出することによつて、前記ガードタ
イムの有無を判断する第２の検出手段と、前記第
２の検出手段が前記ガードタイム無しと判断した
とき、時分割制御とは別に、送信電力の送出を断
にすべく前記送信機を制御する手段とを備えたこ
とを特徴とする無線送信機。1. In a wireless transmitter that is controlled so as to transmit transmission power only during guard times during which no transmission power is transmitted and during time slots assigned to its own station, a and detecting the guard time by receiving the output of the first detecting means and detecting whether or not the transmission power sending state continues for a certain period of time or more, which is slightly longer than the time slot. a second detection means for determining the presence or absence of the guard time; and a means for controlling the transmitter to cut off transmission of transmission power, apart from time division control, when the second detection means determines that there is no guard time. A wireless transmitter comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55142879A JPS5767335A (en) | 1980-10-15 | 1980-10-15 | Transmeter driven and controlled in time division |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55142879A JPS5767335A (en) | 1980-10-15 | 1980-10-15 | Transmeter driven and controlled in time division |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5767335A JPS5767335A (en) | 1982-04-23 |
| JPH036704B2 true JPH036704B2 (en) | 1991-01-30 |
Family
ID=15325710
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55142879A Granted JPS5767335A (en) | 1980-10-15 | 1980-10-15 | Transmeter driven and controlled in time division |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5767335A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08204639A (en) * | 1995-01-25 | 1996-08-09 | Nec Corp | Burst optical output monitor |
-
1980
- 1980-10-15 JP JP55142879A patent/JPS5767335A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5767335A (en) | 1982-04-23 |
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