JPH036726U - - Google Patents
Info
- Publication number
- JPH036726U JPH036726U JP6550789U JP6550789U JPH036726U JP H036726 U JPH036726 U JP H036726U JP 6550789 U JP6550789 U JP 6550789U JP 6550789 U JP6550789 U JP 6550789U JP H036726 U JPH036726 U JP H036726U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- processing time
- control device
- shutdown
- supply control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Power Sources (AREA)
Description
第１図は本考案を実施したバツク・アツプ電源
制御装置のブロツク図、第２図及び第３図は本考
案装置の動作を表わすフローチヤート、第４図は
本考案のバツク・アツプ電源制御装置の他の実施
例、第５図は第４図に示した装置の動作を表わす
フローチヤートである。
１０……バツク・アツプ電源制御装置、１１…
…マイクロプロセツサ、１２……通信インターフ
エイス、１３……定周期割込発生器、１４……メ
モリ、２０……ホストＣＰＵ、３０……バツク・
アツプ電源装置。
FIG. 1 is a block diagram of a back-up power supply control device embodying the present invention, FIGS. 2 and 3 are flowcharts showing the operation of the device of the present invention, and FIG. 4 is a back-up power supply control device of the present invention. Another embodiment of the present invention, FIG. 5 is a flowchart showing the operation of the apparatus shown in FIG. 10...Backup power supply control device, 11...
... Microprocessor, 12 ... Communication interface, 13 ... Fixed period interrupt generator, 14 ... Memory, 20 ... Host CPU, 30 ... Back
Up power supply.
Claims (1)
源を制御するバツク・アツプ電源制御装置におい
て、計算機からシヤツト・ダウン処理時間が設定
される設定部と、バツク・アツプ可能時間と前記
シヤツト・ダウン処理時間との差に相当する時間
を計数するタイマ手段と、このタイム手段がタイ
ムアウトした際に前記シヤツト・ダウン処理を起
動する制御部とを設けたことを特徴とするバツク
・アツプ電源制御装置。 A backup power supply control device that controls a backup power supply installed in a computer system includes a setting section in which a shutdown processing time is set from the computer, and a setting section that sets the backup processing time and the shutdown processing time. 1. A back-up power supply control device comprising: timer means for counting the time corresponding to the difference; and a control section for starting the shutdown process when the timer times out.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6550789U JPH036726U (en) | 1989-06-05 | 1989-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6550789U JPH036726U (en) | 1989-06-05 | 1989-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH036726U true JPH036726U (en) | 1991-01-23 |
Family
ID=31597395
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6550789U Pending JPH036726U (en) | 1989-06-05 | 1989-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH036726U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101017955B1 (en) * | 2008-12-15 | 2011-03-02 | 김성숙 | Outlet cover |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62269253A (en) * | 1986-05-16 | 1987-11-21 | Fujitsu Ltd | Power failure processing system for semiconductor memory device |
-
1989
- 1989-06-05 JP JP6550789U patent/JPH036726U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62269253A (en) * | 1986-05-16 | 1987-11-21 | Fujitsu Ltd | Power failure processing system for semiconductor memory device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101017955B1 (en) * | 2008-12-15 | 2011-03-02 | 김성숙 | Outlet cover |
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