JPH036736U - - Google Patents
Info
- Publication number
- JPH036736U JPH036736U JP6600389U JP6600389U JPH036736U JP H036736 U JPH036736 U JP H036736U JP 6600389 U JP6600389 U JP 6600389U JP 6600389 U JP6600389 U JP 6600389U JP H036736 U JPH036736 U JP H036736U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- microprocessor
- signal interface
- parallel
- main body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図は、本考案の一実施例を示すブロツク図
である。第２図は、本考案の装置をドア管理シス
テムに応用した例を示すブロツク図である。
１……マイクロコンピユータ、２……メモリ、
周辺Ｉ／Ｏ部、３……シリアル・パラレル変換部
、４……端末信号インタフエース、５……データ
バス、６……信号バス、７……コネクター、８…
…ソフトウエア開発用端末、１１……磁気カード
、１２……磁気カードリーダ、３０……制御部、
４０……中央制御装置、５０……電気錠、２０…
…小型デバツグ装置。
FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a block diagram showing an example in which the device of the present invention is applied to a door management system. 1...Microcomputer, 2...Memory,
Peripheral I/O unit, 3... Serial/parallel converter, 4... Terminal signal interface, 5... Data bus, 6... Signal bus, 7... Connector, 8...
...software development terminal, 11...magnetic card, 12...magnetic card reader, 30...control unit,
40...Central control device, 50...Electric lock, 20...
...Small debugging device.
Claims (1)
フエースとを少くとも内蔵し、マイクロプロセツ
サーを用いた本体装置に前記パラレル・シリアル
変換手段を１対のコネクターで接続可能としかつ
前記端末信号インタフエースをソフトウエア開発
用端末に接続可能とし、前記本体装置におけるソ
フトウエア開発時に前記本体装置と前記端末との
間に接続することによつて自動的にデバツグモー
ドに移向できるようにしたことを特徴とする小型
デバツグ装置。 At least a parallel/serial converter and a terminal signal interface are built in, the parallel/serial converter is connectable to a main unit using a microprocessor through a pair of connectors, and the terminal signal interface is connected to a main unit using a microprocessor. The compact device is capable of being connected to a software development terminal, and is capable of automatically switching to a debug mode by connecting between the main body device and the terminal when developing software in the main body device. Debugging device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6600389U JPH036736U (en) | 1989-06-05 | 1989-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6600389U JPH036736U (en) | 1989-06-05 | 1989-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH036736U true JPH036736U (en) | 1991-01-23 |
Family
ID=31598344
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6600389U Pending JPH036736U (en) | 1989-06-05 | 1989-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH036736U (en) |
-
1989
- 1989-06-05 JP JP6600389U patent/JPH036736U/ja active Pending
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