JPH0367438U - - Google Patents

Info

Publication number
JPH0367438U
JPH0367438U JP12856089U JP12856089U JPH0367438U JP H0367438 U JPH0367438 U JP H0367438U JP 12856089 U JP12856089 U JP 12856089U JP 12856089 U JP12856089 U JP 12856089U JP H0367438 U JPH0367438 U JP H0367438U
Authority
JP
Japan
Prior art keywords
transistor
cavity
input
insulating substrate
package body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12856089U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12856089U priority Critical patent/JPH0367438U/ja
Publication of JPH0367438U publication Critical patent/JPH0367438U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例にかかるトランジスタ
の特性測定治具を示す斜視図であり、第2図は従
来例を示す斜視図である。 図における符号、1……特性測定用治具、2…
…絶縁基板、3……キヤビテイ、4〜6……スト
リツプライン、7……押さえレバー、T……トラ
ンジスタ、12……パツケージ本体、13……入
出力端子である。
FIG. 1 is a perspective view showing a transistor characteristic measuring jig according to an embodiment of the present invention, and FIG. 2 is a perspective view showing a conventional example. Symbols in the figure: 1... jig for measuring characteristics, 2...
...Insulating substrate, 3...Cavity, 4-6...Stripline, 7...Press lever, T...Transistor, 12...Package body, 13...Input/output terminal.

Claims (1)

【実用新案登録請求の範囲】 トランジスタのパツケージ本体を収納するキヤ
ビテイが形成され、かつ、このトランジスタの入
出力端子が接触するストリツプラインが表面上に
配設された絶縁基板と、 キヤビテイ内に収納されたトランジスタのパツ
ケージ本体もしくは入出力端子を押圧支持する押
さえレバーと を備えたことを特徴とするトランジスタの特性測
定用治具。
[Scope of Claim for Utility Model Registration] An insulating substrate in which a cavity is formed to accommodate the transistor package body, and a strip line with which input/output terminals of the transistor come in contact is arranged on the surface, and an insulating substrate that is housed in the cavity. 1. A jig for measuring characteristics of a transistor, comprising a holding lever that presses and supports the package body or input/output terminal of the transistor.
JP12856089U 1989-11-02 1989-11-02 Pending JPH0367438U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12856089U JPH0367438U (en) 1989-11-02 1989-11-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12856089U JPH0367438U (en) 1989-11-02 1989-11-02

Publications (1)

Publication Number Publication Date
JPH0367438U true JPH0367438U (en) 1991-07-01

Family

ID=31676260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12856089U Pending JPH0367438U (en) 1989-11-02 1989-11-02

Country Status (1)

Country Link
JP (1) JPH0367438U (en)

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