JPH0370433U - - Google Patents

Info

Publication number
JPH0370433U
JPH0370433U JP13241689U JP13241689U JPH0370433U JP H0370433 U JPH0370433 U JP H0370433U JP 13241689 U JP13241689 U JP 13241689U JP 13241689 U JP13241689 U JP 13241689U JP H0370433 U JPH0370433 U JP H0370433U
Authority
JP
Japan
Prior art keywords
signal
audio
frame synchronization
circuit
synchronization detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13241689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13241689U priority Critical patent/JPH0370433U/ja
Publication of JPH0370433U publication Critical patent/JPH0370433U/ja
Pending legal-status Critical Current

Links

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  • Circuits Of Receivers In General (AREA)
  • Television Receiver Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す衛星放送受信
機の要部ブロツク図、第2図はデコーダのフレー
ム同期信号の検出出力を示す説明図である。 1……入力端子、2……高周波増幅器、3……
混合器、4……第2中間周波増幅器、5,8,1
2……BPF回路、6,15……FM復調器、7
……映像信号処理回路、9……4相DPSK復調
回路、10……PCM復調回路、11……D/A
コンバータ、13……IFコンバータ、14……
IF・BPF切換回路、16……スクランブルデ
コーダ、17……マイコン、18……切換器、1
9……オーデイオ回路、20……表示装置。
FIG. 1 is a block diagram of a main part of a satellite broadcasting receiver showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing the detection output of a frame synchronization signal of a decoder. 1...Input terminal, 2...High frequency amplifier, 3...
Mixer, 4...Second intermediate frequency amplifier, 5, 8, 1
2... BPF circuit, 6, 15... FM demodulator, 7
...Video signal processing circuit, 9...4-phase DPSK demodulation circuit, 10...PCM demodulation circuit, 11...D/A
Converter, 13... IF converter, 14...
IF/BPF switching circuit, 16... Scramble decoder, 17... Microcomputer, 18... Switching device, 1
9...Audio circuit, 20...Display device.

Claims (1)

【実用新案登録請求の範囲】 (1) BS放送及びCS放送を受信可能とした受
信機において、音声デジタル信号の再生回路と音
声アナログ信号の再生回路を切換機の各々の入力
端子に接続して、前記音声デジタル信号の再生回
路よりフレーム同期検出信号を取り出す手段を設
けてマイコンに入力し、前記マイコンよりの出力
信号を前記切換器の制御端子に入力して、前記フ
レーム同期検出信号が検出されないときには前記
切換器を切り換えて前記切換器より前記音声アナ
ログ信号の再生回路の信号を出力せしめ、前記フ
レーム同期検出信号が検出されたときには前記切
換器を切り換えて前記切換器よりフレーム同期検
出信号が検出された回路の信号を出力せしめるこ
とを特徴とする衛星放送受信機。 (2) 前記音声デジタル信号の再生回路を複数個
設け、各々の再生回路で異なる音声再生方式の信
号を再生することを特徴とする請求項(1)記載の
衛星放送受信機。 (3) 表示手段を設けて前記マイコンと接続し、
マイコンに入力される前記音声デジタル信号の再
生回路よりのフレーム同期検出信号により再生し
ている音声の再生方式を表示手段に表示せしめる
ことを特徴とする請求項(1)及び(2)記載の衛星放
送受信機。
[Scope of Claim for Utility Model Registration] (1) In a receiver capable of receiving BS broadcasts and CS broadcasts, an audio digital signal reproducing circuit and an audio analog signal reproducing circuit are connected to respective input terminals of a switching device. , providing means for extracting the frame synchronization detection signal from the audio digital signal reproduction circuit and inputting it to a microcomputer, and inputting the output signal from the microcomputer to the control terminal of the switching device, so that the frame synchronization detection signal is not detected. Sometimes, the switch is switched so that the switch outputs a signal from the audio analog signal reproducing circuit, and when the frame synchronization detection signal is detected, the switch is switched and the switch detects the frame synchronization detection signal. A satellite broadcasting receiver characterized in that it outputs a signal from a circuit that is connected to a satellite. (2) The satellite broadcasting receiver according to claim (1), wherein a plurality of reproduction circuits for the audio digital signal are provided, and each reproduction circuit reproduces a signal of a different audio reproduction method. (3) providing a display means and connecting it to the microcomputer;
The satellite according to claims (1) and (2), characterized in that the reproduction method of the audio being reproduced is displayed on the display means based on a frame synchronization detection signal from the audio digital signal reproduction circuit input to the microcomputer. Broadcast receiver.
JP13241689U 1989-11-14 1989-11-14 Pending JPH0370433U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13241689U JPH0370433U (en) 1989-11-14 1989-11-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13241689U JPH0370433U (en) 1989-11-14 1989-11-14

Publications (1)

Publication Number Publication Date
JPH0370433U true JPH0370433U (en) 1991-07-15

Family

ID=31679874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13241689U Pending JPH0370433U (en) 1989-11-14 1989-11-14

Country Status (1)

Country Link
JP (1) JPH0370433U (en)

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