JPH0371992B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a print data reading circuit for a printer, such as a color inkjet printer, which is equipped with a plurality of print heads and is arranged facing a rotating drum.

This type of printer has print heads of four primary colors (yellow, magenta, cyan, and black) arranged at different positions in the drum's rotational direction around a rotating drum around which print paper is to be wound, and a carriage with which these print heads are mounted. The drum is movable in the axial direction of the rotating drum, and the drum rotation direction is the main scanning direction, and the direction of movement of the printing head is the sub-scanning direction, so that printing can be performed on the entire surface of the printing paper. The print data to be applied to each color print is read out from the buffer memory, but in order to align the position on the drum or paper with the print position, this reading needs to be synchronized with the rotation of the drum. Since the print heads of each color are located at different positions in the drum rotation direction or the main scanning direction, it is necessary to control the timing for this synchronization by shifting the timing for each head.

FIG. 1 shows a print data reading circuit in a conventional printer, and FIG. 2 shows a time chart for explaining its operation.

A rotary encoder 1 connected to a rotating drum (not shown) emits one reference point pulse ZP [Fig. 2 A] per rotation of the drum and one angle pulse AP per rotation of a predetermined angle of the drum, and these pulses The former is given to the counter 2 as a reset signal, and the latter is given as a counting object. The count contents of the counter 2 are given to the comparator circuit 3. The printer control circuit using a microprocessor etc. sends the drum address AD ₁ to the comparator circuit 3.
AD _{2 .} . . AD ₃ are sequentially input, and the comparator circuit 3 outputs a coincidence signal CP (FIG. 2B) which becomes high level at the timing when both inputs coincide. The drum address is a signal OE ₁ that enables a read request for print data to be given to each print head.
The rising and falling edges of OE ₂ , OE ₃ , and OE ₄ are determined in correspondence with the rotation angle position of the drum to be defined.
The coincidence signal CP is applied as a trigger input to the T terminals of JK flip-flops 11, 12, 13, and 14 associated with the first to fourth print heads (not shown), respectively.

The control circuit of the above printer sends a signal to enable the readout circuit for each print head.
EN ₁ , EN ₂ ...EN ₄ is J-K flip-flop 1
1, 12...14 respective two data input terminals J,
given to K. J-K flip-flop 11,
The Q outputs of 12...14 are signals OE ₁ , OE ₂ ,...OE ₄ that enable data read requests [see Figure 2
F] as D-flip-flops 21, 22...2
4 to each D input terminal. 1st to 4th
The angle pulses are connected to the trigger terminals T of the D-flip-flops 21 to 24, which correspond to the print heads of the
AP is given, and each time it is input D
- Data read request signals DRQ ₁ to DRQ ₄ are generated from the Q outputs of the flip-flops 21 to 24, and based on these signals, data necessary for printing by each print head can be read. When reading of print data for one line is completed, data read end signals DACK ₁ to _{DACK 4} are applied from the control circuit to the direct reset terminals of the D-flip-flops 21 to 24, thereby canceling the request. Become. In addition, a reset signal RST is applied from the control circuit to the direct reset terminal RD of the JK flip-flop.

As mentioned above, since the positions of the print heads in the drum rotation direction are different,
As shown in D, the read request enable signal OE ₁ ,
OE ₂ , OE ₃ , and OE ₄ require the respective rising and falling edges to be shifted by a time or rotation angle determined by the separation dimension of the print position, and for this purpose, the values of drum addresses AD ₁ to _{AD 3} are changed. is determined. Looking at OE ₁ now, drum address AD ₁
OE ₁ is caused to rise at the pulse CP ₁ of the match signal obtained in , and OE _{1 is} caused to fall at the pulse CP ₅ . Rise and pulse before ₁ is obtained
It is necessary to make the pulse fall before obtaining CP ₂ , rise before obtaining pulse CP ₅ , and fall before obtaining pulse CP ₆ . Therefore the enable signal
The problem was that the control of EN ₁ to _{EN 4} was complicated.

The present invention has been made in view of such circumstances, and enables the number of enable signals to be reduced to one.
It is an object of the present invention to provide a print data reading circuit that can reduce the burden on a control circuit.

The following 8 prints of the present invention (2 each of 4 primary colors)
A detailed explanation will be given based on the drawings showing an embodiment in the case of (1).

FIG. 3 shows a print data reading circuit according to the present invention, and FIG. 4 shows a time chart for explaining its operation.

A rotary encoder 1 connected to a rotating drum (not shown) emits one reference point pulse ZP (Fig. 4A) per rotation of the drum and one angle pulse AP per rotation of a predetermined angle of the drum. The former is given to the counter 2 as a reset signal, and the latter is given as a counting object. The count contents of the counter 2 are given to a comparator circuit 3, and compared with drum addresses AD ₁ , AD ₂ , ... AD ₈ that are sequentially input to the comparator circuit 3 from a control circuit (not shown), and when the two match, Then, the coincidence signal CP [FIG. 4 (b)] which becomes high level is output. As will be explained later, in this circuit, the fall of the read request enable signals OE ₁ , OE ₂ . . . OE ₈ is 1.
Line data read end signal TC and
DACK ₁ , DACK ₂ , _. . . DACK ₈ , and _the drum addresses AD _{1 ,} AD _{2 ,} .

J-K flip-flops 31, 32...38 should start printing at the earliest timing,
That is, the control circuit applies the start enable signal EN [Fig. 4D] to the J terminal of the J-K flip-flop 31, which corresponds to the print head for which the print data read request is to be enabled at the earliest timing, and its Q output. is applied to the J terminal of the JK flip-flop 32 corresponding to the print head where printing is to be started next. In the same manner, the Q outputs of the J-K flip-flops 32, 33, . .

A coincidence signal CP is applied to the trigger terminal T of each JK flip-flop 31, 32, . . . , and the K terminal is fixed at a low level. Also, each J-K flip-flop 31, 32...
The outputs of OR gates 41, 42, . . . , 48 are applied to the direct reset terminal RD of 38. One input of the OR gates 41, 42...48 is the end signal TC for reading data for one line [Figure 4 C]
This signal falls to a low level when one line of data has been read out for each print head.Although it is given from the control circuit, it is a common signal for each print head, so one line 8 pieces per hit will be low level.

The other inputs of OR gates 41, 42...48 are data read end signals for each print.
They are DACK ₁ , DACK ₂ ,...DACK ₈ .

The Q outputs of each J-K flip-flop 31, 32...38 are read request enable signals _OE1 [Fig. 4E], _OE2 [Fig. 4F]... _OE8 [Fig. 4G]. is D-flip-flop 51,5
2...58 D input terminals. An angle pulse AP is applied to these D-flip-flops 51, 52...58, and the Q outputs of the D-flip-flops 51, 52...58 are used as read request signals _DRQ1 , _DRQ2 ... _DRQ8 .

In the case of using the circuit of the present invention as described above, as shown in FIG. 4D, the start enable signal EN should be applied before the pulse CP ₁ of the coincidence signal CP obtained corresponding to the drum address AD ₁ is obtained. And it is sufficient. That is, this sets the JK flip-flop 31 and the Q output, that is, the read request enable signal _OE1 becomes high level. Then, at pulse CP ₂ of the next coincidence signal CP, J-
K flip-flop 32 is set and its Q output, ie, read request enable signal _OE2 , goes high. Thereafter, JK flip-flops 33 to 38 are set in the same manner, and read request enable signals OE ₃ to OE ₈ corresponding to each print head are set.
is output. As a result, the D input terminals _of the D-flip-flops ₅₁ , ₅₂ , . Then, the data read end signal TC falls to low level, and each OR gate 41, 42...48
Data read end signal DACK ₁ , DACK ₂ ,...
When DACK ₈ is applied, each read request enable signal OE ₁ , OE ₂ , . . . OE ₈ sequentially changes to low level. And then the reference point pulse ZP
etc., give a start enable signal EN,
Starts control for printing the next line.

Since the circuit of the present invention is configured and operates as described above, only one enable signal EN is required from the control circuit, and the burden on the control circuit is reduced.
When the number of printheads is large as in this embodiment, control of the enable signal becomes more complicated in the conventional circuit, but in the case of the circuit of the present invention, there is only one enable signal EN regardless of the number of printheads, The larger the number, the greater the effect.

Furthermore, when there are a large number of heads as in this embodiment, the end of printing of one line and the start of printing of the next line may overlap in time, which is extremely difficult to control with conventional circuits, but with the present invention circuit. In this case, it is not necessary to give an enable signal to each print head, and there is no difficulty in simply giving the start enable signal to the circuit corresponding to the print head that should start printing at the earliest timing. .

As described above, the print data reading circuit according to the present invention corresponds to each of a plurality of print heads, and a plurality of J-
A J-Flip-Flop equipped with a K flip-flop and corresponding to the print head associated with the first read request enable.
The start enable signal is to be given as a data input to the K flip-flop, and the data output of the J-K flip-flop corresponding to the print head associated with the preceding read request enable is given as a data input to the other J-K flip-flops. Since the control circuit configuration and software are simplified, it can also be easily applied to printers with a large number of heads. Furthermore, J-K
The flip-flop has the J terminal at low level and the Q
It goes without saying that the output may be used as the K input of the next-stage JK flip-flop, and the Q output may be used as the read request enable signal.

[Brief explanation of drawings]

FIG. 1 is a schematic circuit diagram showing a conventional readout circuit;
Figure 2 is a time chart for explaining its operation.
FIG. 3 is a schematic circuit diagram of the readout circuit of the present invention;
The figure is a time chart for explaining its operation. 1...Rotary encoder, 2...Counter,
3... Comparison circuit, 31, 32... 38... J-K flip-flop, 41, 42... 48... OR gate, 51, 52... 58... D-flip-flop.

Claims (1)

[Claims] 1. In a print data read circuit that sequentially enables a read request for print data to be applied to a plurality of print heads arranged oppositely on a rotating drum at different positions in the rotational direction, The J-K flip-flop is equipped with a plurality of J-K flip-flops that are triggered by a pulse signal that is generated at a timing related to the rotational position of the rotating drum, and that corresponds to the print head related to the first read request enable. The start enable signal is provided as a data input, and the data output of the JK flip-flop corresponding to the print head associated with the preceding read request enable is provided as the data input to the other JK flip-flops. A print data reading circuit featuring: