JPH0374360U - - Google Patents
Info
- Publication number
- JPH0374360U JPH0374360U JP13442289U JP13442289U JPH0374360U JP H0374360 U JPH0374360 U JP H0374360U JP 13442289 U JP13442289 U JP 13442289U JP 13442289 U JP13442289 U JP 13442289U JP H0374360 U JPH0374360 U JP H0374360U
- Authority
- JP
- Japan
- Prior art keywords
- encoder
- signal
- predetermined
- phase
- pulses
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は、本考案の実施例に係るエンコーダ信
号処理回路のブロツク図であり、第２図は上記回
路の主要タイミングチヤートであり、第３図はＦ
／Ｖ変換器の出力１例を示し、第４図は、従来の
速度検出装置のブロツク図である。
１……正逆転パターン検出・切換回路、２……
正転（逆転）指令信号、３……ラツチ回路、４…
…２相エンコーダ信号、５……出力パルス信号、
６……エンコーダパルス信号、７……Ｆ／Ｖ変換
器。
FIG. 1 is a block diagram of an encoder signal processing circuit according to an embodiment of the present invention, FIG. 2 is a main timing chart of the circuit, and FIG. 3 is a block diagram of an encoder signal processing circuit according to an embodiment of the present invention.
An example of the output of the /V converter is shown in FIG. 4, which is a block diagram of a conventional speed detection device. 1...Forward/reverse pattern detection/switching circuit, 2...
Forward rotation (reverse rotation) command signal, 3...Latch circuit, 4...
...2-phase encoder signal, 5...output pulse signal,
6... Encoder pulse signal, 7... F/V converter.
Claims (1)
用し、このエンコーダ信号から所定方向の回転の
指令信号の入力により反対方向パルスを削除する
ため、所定の２相関係においてのみ出力パルスを
発生させる回路を具備し、正確な速度モニタ信号
用パルス信号を得ることを特徴とするエンコーダ
信号処理回路。 A two-phase encoder is used as the speed detection encoder, and in order to eliminate pulses in the opposite direction by inputting a command signal for rotation in a predetermined direction from this encoder signal, it is equipped with a circuit that generates output pulses only in a predetermined two-phase relationship. An encoder signal processing circuit characterized in that it obtains an accurate pulse signal for a speed monitor signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13442289U JPH0374360U (en) | 1989-11-21 | 1989-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13442289U JPH0374360U (en) | 1989-11-21 | 1989-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0374360U true JPH0374360U (en) | 1991-07-25 |
Family
ID=31681762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13442289U Pending JPH0374360U (en) | 1989-11-21 | 1989-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0374360U (en) |
-
1989
- 1989-11-21 JP JP13442289U patent/JPH0374360U/ja active Pending
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