JPH037629U - - Google Patents

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Publication number
JPH037629U
JPH037629U JP6701589U JP6701589U JPH037629U JP H037629 U JPH037629 U JP H037629U JP 6701589 U JP6701589 U JP 6701589U JP 6701589 U JP6701589 U JP 6701589U JP H037629 U JPH037629 U JP H037629U
Authority
JP
Japan
Prior art keywords
memory
power
capacitor
circuit
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6701589U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6701589U priority Critical patent/JPH037629U/ja
Publication of JPH037629U publication Critical patent/JPH037629U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例によるメモリバツク
アツプ回路の回路構成図である。 １……記憶素子、ＢＡ……バツクアツプ用電池
、Ｃ１……バツクアツプ用コンデンサ、Ｔｒ１，
Ｔｒ２……トランジスタ（第１、第２スイツチン
グ素子）、Ｒ１，Ｒ２，Ｒ３，Ｒ４……抵抗。 FIG. 1 is a circuit diagram of a memory backup circuit according to an embodiment of the present invention. 1... Memory element, BA... Backup battery, C1... Backup capacitor, Tr1,
Tr2...transistor (first and second switching elements), R1, R2, R3, R4...resistance.

Claims (1)

【実用新案登録請求の範囲】 ランダムアクセスメモリ（ＲＡＭ）などの電源
供給を必要とする記憶素子と、この記憶素子に給
電するバツクアツプ用電池とを備えたメモリバツ
クアツプ回路において、 前記記憶素子の給電端子と電源の間に接続され
、電源ＯＮ時に導通し、上記記憶素子に給電する
第１のスイツチング素子と、充放電されるコンデ
ンサと、電源ＯＮ時に導通して上記コンデンサを
充電し、電源ＯＦＦ時に上記コンデンサを放電可
能とする第２のスイツチング素子とを有し、電源
ＯＦＦ時に、上記コンデンサの充電電圧が上記記
憶素子の給電端子に印加されるように回路接続し
たことを特徴とするメモリバツクアツプ回路。[Claims for Utility Model Registration] A memory backup circuit comprising a memory element such as a random access memory (RAM) that requires a power supply, and a backup battery that supplies power to the memory element, comprising: A first switching element is connected between the terminal and the power supply, conducts when the power is turned on, and supplies power to the storage element; and a capacitor that is charged and discharged; a second switching element that enables the capacitor to be discharged, and the memory back-up is connected in a circuit such that the charging voltage of the capacitor is applied to the power supply terminal of the memory element when the power is turned off. circuit.
JP6701589U 1989-06-07 1989-06-07 Pending JPH037629U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6701589U JPH037629U (en) 1989-06-07 1989-06-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6701589U JPH037629U (en) 1989-06-07 1989-06-07

Publications (1)

Publication Number Publication Date
JPH037629U true JPH037629U (en) 1991-01-24

Family

ID=31600218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6701589U Pending JPH037629U (en) 1989-06-07 1989-06-07

Country Status (1)

Country Link
JP (1) JPH037629U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06264969A (en) * 1993-02-05 1994-09-20 Carl Freudenberg:Fa Driving system of automobile

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06264969A (en) * 1993-02-05 1994-09-20 Carl Freudenberg:Fa Driving system of automobile

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