JPH0379738B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] An input/output control device and a test device for testing its input/output interface are connected using only the signal lines normally used between the input/output device and the CPU The test operating conditions are set by controlling the mode of the test equipment via the input/output control device.

[Industrial application field]

The present invention relates to a test method for an input/output control device in a computer system, and in particular, instead of connecting an actual input/output device, a test device that simulates the operation of the input/output device is connected.
This invention relates to a method for testing an input/output interface of an input/output control device.

[Conventional technology]

Generally, a computer system has a configuration that includes a necessary number of various input/output devices determined by user's requirements.

Input/output devices have various functions such as printers and floppy disk devices, and each type of device has different performance and control specifications.

The input/output control device of a computer system provides an appropriate input/output interface for these various input/output devices, and realizes the input/output interface function using firmware.

To test the input/output interface function of an input/output control device, it is best to actually connect the input/output device, send commands and data, and check the resulting response to determine whether it is normal or abnormal. It's basic.

However, with this method, if you have to test the input/output interface for each input/output device for a large number of input/output devices, you must actually prepare, connect, and operate the input/output devices. However, a large amount of work space, amount of work, and personnel were required.

For this reason, recently, test equipment with a function to simulate the interface function of various input/output devices and collect data is connected to the input/output control device instead of the actual input/output device. More and more efficient methods are being used.

By the way, when testing the input/output interface of an input/output control device using such test equipment, prior to the test, the test equipment is provided with the operating speed and signal definitions of the target input/output device, or dynamic When changing the response signal, operating conditions for testing such as signal change timing and number of transferred data must be set.

There are semi-fixed type test equipment that sets these operating conditions on hardware using switches and setting pins, and test equipment that has a built-in MPU and allows the setting of operating conditions to be changed by instructions from the CPU via software. However, there are some that can perform various tests continuously.

Figure 3 shows the configuration of a conventional test system using a test device with a built-in MPU.

In Figure 3, 10 is a system bus, 11 is a
CPU, 12 is an input/output control device, 13 is a test device,
14 is a parallel input/output interface signal line consisting of a control line and a data line.

The input/output control device 12 and the testing device 13 are connected via an input/output interface signal line 14, and the testing device 13 operates to perform the functions of the input/output device.

First, the CPU 11 via the system bus 10
A command determined for setting conditions is directly sent to the test device 13, and operating conditions for the input/output device necessary for the test are set.

Next, the CPU 11 sends input/output request commands such as READ/WRITE to the input/output control device 12 to instruct input/output control.

The input/output control device 12 performs control with the test device 13 as an input/output device. That is, through the input/output interface signal line 14, control signals and data are sent to the test device 13 in a predetermined procedure, and response signals and status signals output by the test device 13 acting as an input/output device are detected. Perform corresponding control.

When changing the test contents of the input/output interface, the CPU 11 again sends a condition setting command to the test device 13 via the system bus 10 to update the set operating conditions to the new contents.

[Problem that the invention seeks to solve]

The conventional method of testing input/output interfaces by connecting semi-fixed test equipment using switches and setting pins has the advantage of simplifying the configuration of the test equipment itself, but it requires changing the test condition settings. In this case, each setting change operation must be performed manually, which is inefficient, and in tests that change the response interface signal, there is no means to specify the timing of the signal change, so it is not possible to conduct a sufficient test. First, there was a problem in that it was not possible to completely eliminate bugs inherent in the firmware of the input/output control device.

In contrast, the conventional method using test equipment with a built-in MPU is extremely efficient and allows testing to be performed completely dynamically by instantly updating the condition settings online. It has the advantage of being able to easily specify signal change timing, but it also requires a means to connect the test equipment to the system bus, and requires special commands to set conditions on the test equipment. There was a problem.

[Means for solving problems]

The present invention enables a test device to be connected only to an input/output control device like a normal input/output device, and to set the operating conditions of the test device via the input/output control device without using special commands. To do this, we define an operating condition setting instruction signal by taking advantage of the fact that the control line of the input/output interface can have a combined signal state that does not occur in normal input/output control. This allows the test equipment to identify and switch to a mode for setting operating conditions.

FIG. 1 shows the basic configuration of the present invention.

In Figure 1, 10 is a system bus.

11 is a CPU.

12 is an input/output control device, and system bus 1
0 to the CPU 11, and generates, cancels, or inputs/outputs the specified operating condition setting instruction signal in response to a control line signal setting command or input/output request command that sets an arbitrary signal state on the control line. Execute control.

Reference numeral 13 denotes a test device, which performs a pseudo interface response operation of the input/output device based on set operating conditions.

14 is an input/output interface signal line. Normally, it is used as a means for coupling the input/output control device 12 and the input/output device, but when testing the input/output interface, the test device 13 is coupled instead of the input/output device.

Reference numeral 15 denotes a data line, which is a multi-bit parallel signal line forming a part of the input/output interface signal line 14.

Reference numeral 16 denotes a control line, which is a plurality of signal lines that constitute a part of the input/output interface signal line 14 together with the data line 15. An operating condition setting instruction signal to the test device 13 is transmitted using a specific signal state of the control line 16.

17 is an input/output control circuit that controls the signal state of the control line 16 to control the operation of the test device 13;
Data transfer is performed via the data line 15.

A decoder 18 identifies the operating condition setting instruction signal on the control line 16 and controls the setting of the instructed operating condition.

A control register 19 stores control information specifying conditions for operating the test device. There are a plurality of control registers 19, and when setting the control information, the control register is also specified by the operating condition setting instruction signal, and the decoder 18 selects one specified control register and outputs the data line 15. Write the data.

A test control circuit 20 responds to a control signal on the control line 16 and performs operation control based on control information set in the control register 19.

[Effect]

According to the configuration of the present invention shown in FIG. 1, when testing an input/output interface, first the CPU 11
The input/output interface signal line 14 is connected to the input/output control device 12 via the system bus 10.
A command is issued to set the control line 16 inside to a specific signal state.

The command for setting the signal state of the control line 16 is not a special command, but is one of the commands provided in a general system for normal input/output control. However, the specific signal state set on the control line 16 by this command is selected from a combination of signals that are not used in normal input/output control, and is defined for operating condition setting control. It is something.

The input/output control circuit 17 of the input/output control device 12 is
In response to this command, a signal state defined as an operating condition setting instruction signal is set on the control line 16. The state of this signal is made to differ depending on the address of the control register where the operating conditions are to be set.

When the above-mentioned specific signal state appears on the control line 16, the decoder 18 of the test device 13 can detect this, select the corresponding one of the control registers 19, and write control information indicating the operating conditions. In other words, the operating condition setting mode is set.

Next, the CPU 11 issues a WRITE command,
Control information specifying operating conditions is sent to the test device 13 as data. The input/output control circuit 17 of the input/output control device 12 puts this on the data line 15,
Send it to the test device 13.

The control information on this data line 15 is
3, the decoder 18 writes to the previously selected control register 19.

By repeating the above control operation, control register 1
After setting the necessary operating conditions for each of 9 in sequence,
Using the signal state setting command again, the signal state of the control line 16 is returned to the normal operating state. As a result, the test device 13 ends the operating condition setting state and enters a test operating state based on the operating conditions set in the control register 19.

In this manner, the CPU 11 sets or changes the operating conditions of the test device 13, and subsequently executes input/output operations for testing the input/output interface.

〔Example〕

FIG. 2 shows the configuration of one embodiment of the present invention.

In FIG. 2, each component indicated by 10 to 19 is the same as that shown in FIG. 1, so the explanation given above regarding these components is also directly applied to FIG. 2.

21 to 28 in FIG. 2 are elements added to concretely show details of the embodiment, 21 is a counter, 22 is an MPU, 23 is a control register, 24 is a ROM, 25 is a RAM, 26 is a maintenance port, 27 is an internal bus, and 28 is a maintenance interface signal line.

The control register 19 includes an operation mode setting register 19a and an interface signal setting register 19.
b, includes a signal change timing setting register 19c.

Information instructing the operation speed and signal inversion is set in the operation mode setting register 19a.

In the interface signal setting register 19b,
Information indicating a signal to be output on the input/output interface signal line 14 is set.

In the signal change timing setting register 19c,
Information instructing the timing of rising and falling when dynamically changing the signal is set.

Counter 21 is used to count the number of data transfers. When the count value of this counter 21 matches the number of data set in the signal change timing setting register 19c, the signal on the determined control line is inverted.

In the input/output control device 12, the MPU 22
In accordance with the firmware, it decodes commands given from the CPU and executes input/output control via the input/output control circuit 17 while monitoring response signals from the input/output devices.

The control register 23 is for storing various input/output request commands issued by the CPU 11. Firmware is stored in the ROM 24. The RAM 25 is used to store work data during input/output control.

The maintenance port 26 is used to input maintenance information from an input/output device via a maintenance interface signal line 28.

An internal bus 27 is used to connect these elements.

As described above, the CPU 11 issues a command to generate a predetermined signal state on the control line 16 in order to set the operating conditions for the test device 13.
This command can be submitted online.

When the MPU 22 of the input/output control device 12 identifies this command, it controls the input/output control circuit 17 to generate a defined signal state on the control line 16. At this time, information for selecting a designated one of the control registers 19, 19a to 19c of the test device 13 is also provided.

As a result, as explained in FIG.
The decoder 18 of No. 3 selects one of the control registers 19 and sets it to the write state.

In this state, the CPU 11 sends out control information specifying operating conditions using a WRITE command, and causes the control information to be written into one of the previously selected control registers 19. The above operation is repeated for each control register in which operating conditions are to be set. When the setting of all operating conditions is completed, the CPU 11 issues a command to generate an arbitrary signal state on the control line 16 to clear the operating condition setting instruction signal, and
to cancel the operating condition setting mode.

〔Effect of the invention〕

According to the present invention, there is no need for special commands to set operating conditions on the test equipment, and arbitrary operating conditions can be set on the test equipment at any time via the input/output control device using only normal input/output control commands. can.
Therefore, testing of the input/output interface can be performed in a detailed and efficient manner.

In addition, online testing is possible, reducing the number of personnel required for testing and the testing time.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of the present invention, FIG. 2 is a diagram showing the configuration of one embodiment of the present invention, and FIG. 3 is a diagram showing the configuration of a conventional test system. In Figure 1, 11: CPU, 12: Input/output control device, 13: Test device, 15: Data line, 16: Control line, 18: Decoder, 19: Control register, 2
0: Test control circuit.

Claims (1)

[Claims] 1. A test device 13 that pseudo-realizes the interface function of a predetermined input/output device based on preset operating conditions is connected to the input/output control device 12, and the test device 13 is connected to the input/output control device 12. In a system that performs input/output interface testing, an operating condition setting instruction signal is sent in a specific signal state that is not used in normal input/output control on the control line 16 that connects the input/output control device 12 and the test device 13. The test device 13 is provided with a decoder 18 that detects the operating condition setting instruction signal and controls the specified control register 19 to a write state.
The CPU 11 instructs the input/output control device 12 to generate the above operating condition setting instruction signal on the control line 16 using a first command, and then sends control information indicating the operating conditions of the tester using a second command. The input/output control is characterized in that the first command is used again to issue an instruction to transfer the operating condition setting instruction signal to the normal operating state after the instruction is written in the control register 19 of the test device 13. Input/output interface testing method for equipment.