JPH0380568A - Electrostatic induction semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To increase the backward breakdown strength between a gate and a cathode, and shorten the turn-off time, by forming an impurity diffusion region for increasing the breakdown strength, just outside the most outside gate region, so as to keep an interval. CONSTITUTION:In an electrostatic thyristor 1, the following are arranged: a cathode region (N<+> region) 3 and a gate region (P<+> region) 4 on the surface part of a semiconductor substrate 2, an anode region (P<+> region) 5 on the rear, and a high resistivity region (N<-> region) G, as a base region, between the cathode region 3 and the anode region 5. On the surface part of the semiconductor substrate 2, an impurity diffusion region (P<+> region) 7, for increasing the breakdown strength, formed so as to surround both of the regions 3, 4 at the position outside the cathode region 3 and the gate region 4 is arranged. The impurity diffusion region 7 is formed simultaneously with the gate region 4 by diffusing impurity. In the part not shown in figure, said region 7 is formed so as to be linked with gate region 4 in the semiconductor substrate 2. By this constitution, the potential of the impurity diffusion region 7 is surely made equal to that of the gate region, and breakdown characteristics are stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrostatic induction semiconductor device and a method for manufacturing the same.

[Conventional technology]

One type of electrostatic induction semiconductor device is an electrostatic induction cell. Figure 5 shows the basic configuration of an electrostatic induction thyristor.

The electrostatic induction thyristor S includes a cathode region (n+ region 22 and a gate region (P" region) 23 on the front surface of a semiconductor substrate 21, an anode region (P" region) 24 on the back surface, and a cathode region (P" region) 23 on the back surface. A high resistivity region (n- region) serving as a base region between the region 22 and the anode region 24
It is equipped with 25. 22' is a cathode electrode, 23' is a gate electrode, and 24' is an anode electrode.

This thyristor S is configured to conduct conduction and disconnection between the cathode and the anode by controlling the voltage applied to the gate electrode 23'.

Electrostatic induction silice has the advantages of high current density, low forward voltage drop (on resistance), and short turn-on time. However, when the MOS FET is turned off, the minority carriers flowing into the high resistivity region from the anode side cannot be instantly cut off, so the turn-off time is
It is long compared to etc.

Therefore, when shutting off, a reverse voltage is usually applied to the gate electrode and the cathode electrode to extract minority carriers remaining in the high resistivity region from the gate region, thereby shortening the turn-off time.

[Problem to be solved by the invention]

However, it cannot be said that a sufficiently short turn-off time has been achieved with conventional electrostatic induction thylisks. This is because a very high reverse voltage cannot be applied for the following reasons.

As shown in FIG. 6, the electrostatic induction thyristor S has the same conductivity type as the gate region 23 and the gate voltage of the same gate region 23 is applied to a position outside both the cathode and gate regions 22 and 23 in the semiconductor substrate 21. The impurity diffusion region (P” region) 30 for improving breakdown voltage, which is designed to be
It is provided on the surface part of 1. This region 30 is a so-called guard ring region (not shown) formed on the surface of the substrate 21 to prevent a depletion layer that spreads within the semiconductor substrate 2 during a cut-off operation.
The impurity region width l is the impurity region width l' of the gate region 22.
It is wider than. In the conventional thyristor S, the cathode region 22 is located adjacent to the impurity diffusion region 30 for improving breakdown voltage, and the inner portion of the region 30 also serves as a gate region.

On the other hand, since the impurity diffusion region 30 is formed relatively wide, a wide diffusion window is used when diffusing impurities. Therefore, the impurity is diffused in the horizontal direction for a long time, and the impurity diffusion region 30 for improving breakdown voltage is formed very close to the cathode region 22. Cathode area 2
A situation called ``distance between the two'' occurs. In this case, the gate
The reverse breakdown voltage characteristic between the cathodes becomes a low value determined by the short distance between the impurity diffusion region 30 and the cathode region 22, and the reverse voltage applied between the gate and the cathode cannot be made too high.

In addition, if the position of the diffusion window shifts, the reverse breakdown voltage characteristics deteriorate, but in the conventional case, the distance between the impurity diffusion region for improving breakdown voltage and the cathode region is short, and even a slight shift in the position of the diffusion window can cause the reverse breakdown voltage characteristics to fail. Therefore, it was difficult to manufacture.

In view of the above circumstances, an object of the present invention is to provide an electrostatic induction semiconductor device that has a high reverse breakdown voltage between the gate and cathode, can further shorten the turn-off time, and is easy to manufacture, and a method for manufacturing the same. do.

[Means to solve the problem]

In order to solve the above problem, in the electrostatic induction semiconductor device according to claim 1, an impurity diffusion region for improving breakdown voltage is formed at intervals immediately outside the outermost gate region, instead of a cathode region. In the electrostatic induction semiconductor device according to the second aspect, the impurity diffusion region for improving breakdown voltage is formed so as to overlap the outermost gate region with a slight shift outward.

Furthermore, in the method according to claim 3, when forming the gate region and the impurity diffusion region for improving withstand voltage in the semiconductor substrate when manufacturing the electrostatic induction semiconductor device according to claim 2, Using a semiconductor substrate provided with a mask in which a window for impurity diffusion in a region for improving breakdown voltage is opened adjacently to the outside of a window for diffusion of blunt particles, impurities are simultaneously supplied at these intervals to increase the breakdown voltage. The diffusion region is formed so that the improvement region overlaps the outermost gate region with a slight outward shift.

The electrostatic induction semiconductor device according to the first to third aspects of the invention may be, for example, an electrostatic induction transistor in addition to an electrostatic induction thyristor. In the case of a transistor, the cathode is commonly called the source and the anode is commonly called the drain, so in the case of a transistor, the cathode in the claims should be read as the source and the anode as the drain.

Furthermore, although there have conventionally been electrostatic induction semiconductor devices that have been subjected to proton beam irradiation in order to shorten the turn-on time, proton beam irradiation treatment may also be performed in the semiconductor device and the manufacturing method thereof of the present invention.

[For production]

In the electrostatic induction semiconductor device according to the first aspect, the gate region is located immediately inside the impurity diffusion region for improving breakdown voltage, instead of the cathode region as in the conventional case. No proximity to the cathode region occurs. Therefore, the reverse breakdown voltage between the gate and the cathode can be made sufficiently high.

In the electrostatic induction semiconductor device according to the second aspect, the impurity diffusion region for improving breakdown voltage is formed so as to overlap the outermost gate region with a slight deviation outward, and the region for improving breakdown voltage and the cathode region are adjacent to each other. This situation does not occur at all. Therefore, the reverse breakdown voltage between the gate and the cathode is sufficiently high.

The electrostatic induction semiconductor device according to the second aspect can be manufactured, for example, by the manufacturing method according to the third aspect. in particular,
As shown in FIG. 3, what used to be one wide diffusion window is now opened separately into two diffusion windows 13 and 14 in the mask. In order to use the inner diffusion window 14 as a window for impurity diffusion for the outermost gate region, it is made to have the same width as the diffusion windows for forming other gate regions. The outer diffusion window 13 is, of course, a window for diffusing impurities in the breakdown voltage improvement region, so it is much wider than the window 14. Therefore, since the window is narrow, the impurities diffused through the diffusion window 14 only reach this side in the lateral direction toward the cathode region than in the past. Of course, it goes without saying that the diffusion region formed by the diffusion window 14 can function as a normal gate, and it goes without saying that the region formed by the diffusion window 13 can sufficiently exhibit the effect of improving breakdown voltage.

In the electrostatic induction semiconductor device according to claim 1.2, there is no need to consider the distance between the impurity diffusion region for improving withstand voltage and the cathode region, so that it is easier to manufacture and has a higher yield than conventional devices.

The manufacturing method according to claim 3 can produce the excellent electrostatic induction according to claim 2 using the same steps as usual except for changing the pattern of the mask used when forming the gate region and the impurity diffusion region for improving breakdown voltage. A ring semiconductor device can be obtained.

〔Example〕

Next, embodiments of the electrostatic induction semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

First, an embodiment of the invention set forth in claim 1 will be explained. 1st
The figure shows a main part of an electrostatic induction thyristor which is an example of the invention according to claim 1.

The electrostatic induction thyristor 1 includes a cathode region (n+ region 3) and a gate region (P"" region) on the front surface of a semiconductor substrate 2, and an anode region (P" region) 5 on the back surface.
and a high resistivity region (n- region) 6 serving as a base region between the cathode region 3 and the anode region 5. The surface portion of the semiconductor substrate 2 is provided with an impurity diffusion region (P0 region) 7 for improving breakdown voltage, which is formed outside the cathode region 3 and the gate region 4 so as to surround the blue region 3.4. 3' is a cathode electrode, 4' is a gate electrode, 5' is an anode electrode, and 7' is a contact electrode for the impurity diffusion region 7 for improving breakdown voltage. The electrostatic induction thyristor 1 can conduct conduction and disconnection between the cathode and the anode by controlling the voltage applied to the gate electrode 4'.

The impurity diffusion region 7 is formed simultaneously with the gate region 4 by diffusing impurities, and is formed so as to be connected to the gate region 4 in the semiconductor substrate 2 in a portion not shown. Further, the contact electrode 7' is also made of, for example, the A1 layer, and is also connected to the gate electrode 4' at the surface of the semiconductor substrate Fi2 in a portion not shown, so that a gate voltage is applied to the impurity diffusion region 7. There is. With this configuration, the impurity diffusion region 7 is reliably at the same potential as the gate region 4, and the withstand voltage characteristics are stabilized. On the other hand, the gate voltage is also applied through the impurity diffusion region 7, which reduces the gate voltage rise. You can hasten it. Of course, it is not necessary that the impurity diffusion region 7 and the gate region 4 are connected in the semiconductor substrate 2, or that the contact electrode 7' is connected to the gate electrode 4' on the surface of the semiconductor substrate 2. 7
It is necessary that the gate voltage is applied to the contact electrode 7' in order to have the same potential as the gate region 4 so that the depletion layer can be effectively connected to the so-called guard ring region.

In this electrostatic induction thyristor l, as shown in Figure 1,
As described above, there is no cathode region but the gate region 4 immediately inside the impurity diffusion region 7 for improving breakdown voltage, and the reverse breakdown voltage between the gate and the cathode is sufficiently high.

Next, an embodiment of the invention according to claim 2 will be described. FIG. 2 shows an electrostatic induction silicate which is an example of the invention according to claim 2.

The electrostatic induction silicon risk 1' has a cathode region (n+ region 3 and a gate region (P'' region)) on the surface of the semiconductor substrate 2.
4 and an anode area (P'' area) on the back side.
5, and a high resistivity region (n- region) 6 serving as a base region between the cathode region 3 and the anode region 5. Then, on the surface of the semiconductor substrate 2, an impurity diffusion region ((P'
As described above, this region is composed of the outermost gate region and an impurity diffusion region for improving breakdown voltage that overlaps the same region outwardly. 3' is a cathode electrode, and 4 is a cathode electrode. ' is a gate electrode, 5' is an anode electrode,
17' is a contact electrode for the impurity diffusion region 17 (also serves as the electrode for the outermost gate region). By controlling the voltage applied to the gate electrode 4', the thyrisk 1' can conduct conduction/interruption between the cathode and the anode.

The impurity diffusion region 17 is formed simultaneously with all the gate regions 4, and is formed so as to be connected to the gate region 4 in the semiconductor substrate 2 in a portion not shown. Furthermore, the contact electrode 17' is also, for example, A
11i, which is also connected to the gate electrode 4' on the semiconductor substrate 2 in a portion not shown. As in the case of the previous embodiment, this results in stabilization of the breakdown voltage of the impurity diffusion region 17 and improvement in the rising speed of the gate voltage. Of course, the impurity diffusion region 17 and the gate region 4 may be connected within the semiconductor substrate 2, or the contact electrode 17 may be
Although it is not necessary that the contact electrode 17' be connected to another gate electrode 4' (other than the electrode in the outermost gate region) on the semiconductor substrate 2, it is necessary that a gate voltage be applied to the contact electrode 17'.

As described above, in the electrostatic induction thyristor l', since the distance between the impurity diffusion region for improving breakdown voltage and the cathode region is longer than that of the conventional one, the reverse breakdown voltage between the gate and the cathode is sufficiently high.

The electrostatic induction silicate of this example can be produced by an example of the manufacturing method described in claim 3.

For example, as shown in FIG. 3, a mask 15 is provided outside the window 14 for impurity diffusion for the outermost gate region and adjacent to the window 13 for impurity diffusion for the breakdown voltage improvement region. These side windows 13.1 are
Impurities are simultaneously supplied from step 4, and a diffusion region is formed so that the breakdown voltage improvement region overlaps the outermost gate region with a slight shift outward. Of course, a window 14' for impurity diffusion for the gate region is also formed on the mask at the same time.
The diffusion windows 14,14' are approximately the same width. Therefore, it goes without saying that the diffusion depths ASB are approximately equal.

Thereafter, the cathode region 3 and each electrode are formed to complete the electrostatic induction cell 1'.

Note that one or more windows may be provided between the windows 13 and 14, for example, as shown in FIG. 4, a semiconductor substrate 2' provided with a mask 15' provided with a window 13' may be used. You can.

However, the consensus is that it is preferable to have a width comparable to that of the diffusion window 14, because it is better for the impurity diffusion region for improving breakdown voltage to have at least the same diffusion depth as the gate region.

〔Effect of the invention〕

In the electrostatic induction semiconductor device according to claim 1.2, since the distance between the impurity diffusion region for improving breakdown voltage and the cathode region is longer than that of the conventional one, a high reverse voltage is applied between the gate and the cathode to shorten the turn-off time. It is also easy to manufacture.

The manufacturing method according to claim 3 allows the electrostatic induction semiconductor device according to claim 2 to be easily manufactured in the same process as conventional methods by simply changing the mask pattern when forming the impurity diffusion region for improving breakdown voltage and the gate region. can do.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view of an electrostatic induction thyristor, which is an example of the invention as claimed in claim 1, and FIG. 2 is a schematic sectional view of an electrostatic induction thyristor, which is an example of the invention as claimed in claim 2. FIG. 3 is a schematic cross-sectional view for explaining the process of forming a gate region and an impurity diffusion region for improving breakdown voltage in an example of the manufacturing method according to claim 3, and FIG. A schematic cross-sectional view for explaining the process of forming a gate region and an impurity diffusion region for improving breakdown voltage in another example of the method, FIG. 5 is a cross-sectional view showing the basic structure of an electrostatic induction thyristor, and FIG. FIG. 1 is a schematic cross-sectional view of a conventional electrostatic induction thyristor. 111'... Electrostatic induction thyristor 2.2'...
Semiconductor substrate 3... Cathode region 4... Gate region 7... Impurity diffusion region for improving breakdown voltage 13
...Window 14 for impurity diffusion in the breakdown voltage improvement region...
・Window 15.15 for impurity diffusion for outermost gate region
'···mask

Claims (1)

[Scope of Claims] 1. A cathode region and a gate region are provided in a surface portion of a semiconductor substrate, and a gate voltage applied to the same gate region and of the same conductivity type as the gate region is provided at a position outside of both regions in the surface portion. In a static induction semiconductor device equipped with an impurity diffusion region for improving breakdown voltage to which is applied, the impurity diffusion region for improving breakdown voltage is formed immediately outside the outermost gate region with a gap between the impurity diffusion regions for improving breakdown voltage. An electrostatic induction semiconductor device characterized by: 2. A cathode region and a gate region are provided on the surface portion of the semiconductor substrate, and a gate voltage of the same conductivity type as the gate region is applied to a position outside of both regions in the surface portion. In an electrostatic induction semiconductor device having an impurity diffusion region for improving breakdown voltage, the impurity diffusion region for improving breakdown voltage is formed so as to overlap the outermost gate region with a slight deviation outward. An electrostatic induction semiconductor device characterized by: 3. The method for manufacturing an electrostatic induction semiconductor device according to claim 2, wherein when forming the gate region and the impurity diffusion region for improving breakdown voltage in the semiconductor substrate, the outermost window for impurity diffusion for the gate region is formed. A semiconductor substrate is provided with a mask that has windows for impurity diffusion in the breakdown voltage improvement region adjacent to each other, and impurities are simultaneously supplied from both windows so that the breakdown voltage improvement region is located in the outermost gate region. A method for manufacturing an electrostatic induction semiconductor device, comprising forming a diffusion region so as to overlap with the diffusion region with a slight deviation outward.