JPH0397235A - Manufacture of resin seal type semiconductor device - Google Patents

Manufacture of resin seal type semiconductor device

Info

Publication number
JPH0397235A
JPH0397235A JP1236444A JP23644489A JPH0397235A JP H0397235 A JPH0397235 A JP H0397235A JP 1236444 A JP1236444 A JP 1236444A JP 23644489 A JP23644489 A JP 23644489A JP H0397235 A JPH0397235 A JP H0397235A
Authority
JP
Japan
Prior art keywords
resin
frame
suspension
semiconductor device
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1236444A
Other languages
Japanese (ja)
Inventor
Isao Yoshino
功 吉野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1236444A priority Critical patent/JPH0397235A/en
Publication of JPH0397235A publication Critical patent/JPH0397235A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent imperfect insulation and permeation of water caused by discharge from a suspension pin, by a method wherein the frame side root of the suspension pin for fixing a frame mounting a semiconductor element chip to a tie bar is thinned, the suspension pin is pulled out after the frame is coated with resin, and the pulled-out part is coated with resin. CONSTITUTION:A semiconductor chip 3 is mounted on a frame 2, which is fixed to a tie bar 7 by suspension pins 1 and leads 4. The frame 2 side root of the suspension pin 1 is thinned. The frame 2 is sealed with resin; the suspension pins 1 are pulled out, and cut at the frame 2 side thinned roots; the leads 4 are cut out from the tie bar 7. Then the cut part of the frame 2 is coated with resin 6. Thereby imperfect insulation caused by the discharge of the suspension pins 1 can be prevented, and permeation of water from the suspension pins 1 can be prevented.

Description

【発明の詳細な説明】 ［産業との利用分野］ 本発明は樹脂封虫型半導体装置の製造方法に関する。[Detailed description of the invention] [Application fields with industry] The present invention relates to a method for manufacturing a resin-sealed semiconductor device.

［従来の技術］ 第３図（ａ）〜（ｄ）は樹脂封止型半導体装置の従来の
製造方法を示す工程図、第３図（ｅ）は第３図（ｄ）の
Ｂ−Ｂ線断面図である。[Prior Art] FIGS. 3(a) to 3(d) are process diagrams showing a conventional manufacturing method of a resin-sealed semiconductor device, and FIG. 3(e) is a line BB in FIG. 3(d). FIG.

フレーム２２は半導体素子チツブ２３が搭載され、つり
ピン２１とリード２４によりタイバー２７に固定されて
ぃる（第３図（ａ）〉。フレーム２２を樹脂で封止し（
第３図（ｂ））、つりピン２１を樹脂２５との境界部分
で切断するとともに、リード２４をタイパー２７より切
断する（第３図（Ｃ））。この後、つりピン２１の切断
部分を樹脂２６でコーティングし、樹脂封止型半導体装
置ができ上がる（第３図（ｄ））。A semiconductor chip 23 is mounted on the frame 22, and is fixed to a tie bar 27 by a hanging pin 21 and a lead 24 (Fig. 3(a)).The frame 22 is sealed with resin (
3(b)), the suspension pin 21 is cut at the boundary with the resin 25, and the lead 24 is cut using the tieper 27 (FIG. 3(C)). Thereafter, the cut portion of the suspension pin 21 is coated with resin 26, and a resin-sealed semiconductor device is completed (FIG. 3(d)).

［発明が解決しようとする課題］ 上述した従来の樹脂封止型半導体装置の製造方法は、つ
りピンをパッケージ外部で切断するため、高電圧に耐え
る絶縁型パッケージにおいては、コーティング樹脂の劣
化、コーティング樹脂一パッケージ間の界面はく離など
により実装上、つりピンと実装基板間で放電がおこり絶
縁不良となりやすいという欠点があり、また、高温高湿
雰囲気においてつりピンとパッケージ樹脂間は膨張係数
の違いにより界面にすき間ができ、水が侵入して半導体
素子チップが故障するという欠点がある。[Problems to be Solved by the Invention] In the conventional method for manufacturing a resin-sealed semiconductor device described above, the hanging pins are cut outside the package. Due to delamination at the interface between the resin and the package, electrical discharge occurs between the suspension pin and the mounting board during mounting, which tends to cause poor insulation.Also, in a high-temperature, high-humidity atmosphere, the interface between the suspension pin and the package resin may deteriorate due to the difference in expansion coefficient. This has the drawback that a gap is created, allowing water to enter and the semiconductor element chip to malfunction.

本発明の目的は、つりピンからの放電およびつリピンか
らの水の侵入を防止する、樹脂封止型半導体装置の製造
方法を提供することである。An object of the present invention is to provide a method for manufacturing a resin-sealed semiconductor device that prevents discharge from the suspension pins and water from entering from the suspension pins.

Ｃ　Ｂ　題を解決するための千段］ 本発明の樹脂封止型半導体装置の製造方法は、半導体素
子チップを搭載したフレームをタイバーに固定するつり
ピンのフレーム側の根元を細くしておき、フレームに樹
脂をコーティングした後、つりピンを引抜いてつりピン
を完全になくし、その部分に樹脂でコーティングするも
のである。C B A thousand steps to solve the problem] The method for manufacturing a resin-sealed semiconductor device of the present invention includes making the base of the hanging pin on the frame side thinner for fixing the frame on which the semiconductor element chip is mounted to the tie bar; After the frame is coated with resin, the suspension pins are pulled out to completely eliminate them, and that part is then coated with resin.

［作　用コ 製造後、つりピンがなくなるため、つりピンからの放電
による絶縁不良および水の侵入を防止できる。[Function] Since the suspension pin disappears after manufacturing, insulation defects and water intrusion due to discharge from the suspension pin can be prevented.

［実施例］ 次に、本発明の実施例について図面を参照して説明する
。[Example] Next, an example of the present invention will be described with reference to the drawings.

′ｄＳ１図（ａ）〜（ｄ）は本発明の樹脂封止型半導体
装置の製造方法の第１の実施例の工程図、第１図（ｅ）
は第１図（ｄ）のＡ−Ａ線断面図である。'dS1 Figures (a) to (d) are process diagrams of the first embodiment of the method for manufacturing a resin-sealed semiconductor device of the present invention, and Figure 1 (e)
is a sectional view taken along the line A-A in FIG. 1(d).

フレーム２は半導体素子チップ３が搭載され、つりピン
１とリード４によりタイパー７に固定されている（第１
図（ａ））。ここで、つりピン１はフレーム２イ則の・
根元が細くなっている。フレーム２を樹脂５で封止し（
第１図（ｂ））、つりピン１を引き抜いて、つりピン１
を細くなっているフレーム２の根元から切断するととも
に、リード４をタイパー７より切断する（第１図（Ｃ）
）。この後樹脂６でフレーム２の切断部分をコーティン
グする（第１図（ｄ））。A semiconductor element chip 3 is mounted on the frame 2, and is fixed to a tieper 7 by suspension pins 1 and leads 4 (first
Figure (a)). Here, the suspension pin 1 is set according to the frame 2 A rule.
The base is thin. The frame 2 is sealed with resin 5 (
Figure 1(b)), pull out the hanging pin 1, and
At the same time, cut the lead 4 from the thinner base of the frame 2 using the tieper 7 (see Fig. 1(C)).
). Thereafter, the cut portion of the frame 2 is coated with resin 6 (FIG. 1(d)).

上記の製造方法により、第１図（ｅ）に示すように、製
造後つりピン１をなくすことかでき、つりピンｌの放電
による絶縁不良を防止でき、つりピン１からの水の侵入
を防ぐことができる。By the above manufacturing method, as shown in FIG. 1(e), it is possible to eliminate the suspension pin 1 after manufacture, prevent insulation failure due to discharge of the suspension pin 1, and prevent water from entering from the suspension pin 1. be able to.

第２図は本発明の樹脂封止型半導体装置の製造方法の第
２の実施例の工程図である。FIG. 2 is a process diagram of a second embodiment of the method for manufacturing a resin-sealed semiconductor device of the present invention.

つりピン１１は半導体素子チップ１３を搭載したフレー
ム１２をタイパー１７に固定している。A suspension pin 11 fixes a frame 12 on which a semiconductor element chip 13 is mounted to a tieper 17.

フレーム１２とリード１４の一部を樹脂１５で封止後、
つりピン１１を引き抜き、樹脂１６でコーティングする
。After sealing part of the frame 12 and leads 14 with resin 15,
The suspension pin 11 is pulled out and coated with resin 16.

本実施例ではつりピン１１がなくなるため、つりピン１
１と樹脂１５（パッケージ）の界面からの水分の侵入が
なくなり、耐湿性が向上する利点がある。In this embodiment, since the suspension pin 11 is eliminated, the suspension pin 1
There is an advantage that moisture intrusion from the interface between 1 and the resin 15 (package) is eliminated, and moisture resistance is improved.

［発明の効果］ 以」二説明したように本発明は、つりピンを引き抜き、
樹脂コーディングすることにより、製造後、つりピンを
なくすことができるので、つりピンからの放電による絶
縁不良を防止でき、また、つりピンかないため、つりピ
ンからの水の侵入がなくなり、耐湿性が向Ｌし、信顆性
の高い半導体装置を提供することができる効果がある。[Effects of the Invention] As explained below, in the present invention, when the hanging pin is pulled out,
By resin coating, the suspension pin can be eliminated after manufacturing, which prevents insulation failure due to discharge from the suspension pin.Also, since there is no suspension pin, there is no water intrusion from the suspension pin, which improves moisture resistance. This has the effect of providing a semiconductor device with high reliability and high reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）〜（ｄ）は本発明の樹脂封止型半導体装置
の製造方法の第１の実施例の工程図、第１図（ｅ）は第
１図（ｄ）のＡ−Ａ線断面図、第２図（ａ）　．　（ｂ
）は本発明の樹脂封止型半導体装置の製造方法の第２の
実施例の工程図、第３図（ａ）〜（ｄ）は樹脂封止型半
導体装置の従来の製造方法のの工程図、第３図（ｅ）は
第３図（ｄ）のＢ−Ｂ線断面図である。 １．１１・・・つりピン、 ２．１２・・・フレーム、 ３．１３−・・半導体素子チップ、 ４．１４−・・リード、 ５．１５−・・樹月旨（パッケージ）、６．１６・・・
樹脂（コーティング）、７．１７−・・タイバー1(a) to 1(d) are process diagrams of the first embodiment of the method for manufacturing a resin-sealed semiconductor device of the present invention, and FIG. 1(e) is A-A in FIG. 1(d). Line sectional view, Figure 2 (a). (b
) is a process diagram of a second embodiment of the method for manufacturing a resin-sealed semiconductor device of the present invention, and FIGS. 3(a) to 3(d) are process diagrams of a conventional method for manufacturing a resin-sealed semiconductor device. , FIG. 3(e) is a sectional view taken along the line BB in FIG. 3(d). 1.11... Hanging pin, 2.12... Frame, 3.13-... Semiconductor element chip, 4.14-... Lead, 5.15-... Juzuki (package), 6. 16...
Resin (coating), 7.17-...Tie bar

Claims (1)

【特許請求の範囲】[Claims] １、半導体素子チップを搭載したフレームをタイバーに
固定するつりピンのフレーム側の根元を細くしておき、
フレームに樹脂をコーティングした後、つりピンを引抜
いてつりピンを完全になくし、その部分に樹脂でコーテ
ィングする、樹脂封止型半導体装置の製造方法。1. Make the base of the hanging pin on the frame side thinner, which fixes the frame with the semiconductor chip mounted on the tie bar.
A method of manufacturing a resin-sealed semiconductor device in which the frame is coated with resin, the suspension pins are completely removed by pulling out the suspension pins, and that portion is coated with resin.
JP1236444A 1989-09-11 1989-09-11 Manufacture of resin seal type semiconductor device Pending JPH0397235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1236444A JPH0397235A (en) 1989-09-11 1989-09-11 Manufacture of resin seal type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1236444A JPH0397235A (en) 1989-09-11 1989-09-11 Manufacture of resin seal type semiconductor device

Publications (1)

Publication Number Publication Date
JPH0397235A true JPH0397235A (en) 1991-04-23

Family

ID=17000843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1236444A Pending JPH0397235A (en) 1989-09-11 1989-09-11 Manufacture of resin seal type semiconductor device

Country Status (1)

Country Link
JP (1) JPH0397235A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008134427A1 (en) * 2007-04-27 2008-11-06 Microchip Technology Incorporated Leadframe configuration to enable strip testing of sot-23 packages and the like

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008134427A1 (en) * 2007-04-27 2008-11-06 Microchip Technology Incorporated Leadframe configuration to enable strip testing of sot-23 packages and the like
WO2008134426A3 (en) * 2007-04-27 2008-12-24 Microchip Tech Inc Leadframe configuration to enable strip testing of sot-23 packages and the like

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