JPH0398523U - - Google Patents
Info
- Publication number
- JPH0398523U JPH0398523U JP714690U JP714690U JPH0398523U JP H0398523 U JPH0398523 U JP H0398523U JP 714690 U JP714690 U JP 714690U JP 714690 U JP714690 U JP 714690U JP H0398523 U JPH0398523 U JP H0398523U
- Authority
- JP
- Japan
- Prior art keywords
- digital signal
- signal processing
- digital
- conversion means
- saturated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 4
- 229920006395 saturated elastomer Polymers 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は、この考案によるデジタルイコライザ
としてのデジタル信号処理装置の一実施例を示す
ブロツク図、第２図と第３図は、この考案の実施
例におけるデジタルイコライザのレベルダイヤグ
ラム、第４図は従来のデジタルイコライザのレベ
ルダイヤグラムである。
１……Ａ／Ｄ変換器、２……デジタル信号処理
装置（ＤＳＰ）、３……Ｄ／Ａ変換器、４……減
衰器、５……マイコン。
FIG. 1 is a block diagram showing an embodiment of a digital signal processing device as a digital equalizer according to this invention, FIGS. 2 and 3 are level diagrams of a digital equalizer according to an embodiment of this invention, and FIG. This is a level diagram of a conventional digital equalizer. 1...A/D converter, 2...Digital signal processing device (DSP), 3...D/A converter, 4...Attenuator, 5...Microcomputer.
Claims (1)
るＡ／Ｄ変換手段と、 前記Ａ／Ｄ変換手段からのデジタル信号を受け
、最大出力周波数における飽和デジタルデータ入
力時に出力データが飽和となるようレベル設定さ
れた所定のイコライジング処理を行うデジタル信
号処理手段と、 前記デジタル信号処理手段でイコライジング処
理されたデジタル信号をアナログ信号に変換する
Ｄ／Ａ変換手段と、 を備えて成ることを特徴とするデジタル信号処理
装置。 (2) 前記デジタル信号処理手段の前記デジタル
イコライジング処理のレベル設定に連動して前記
Ｄ／Ａ変換手段の出力レベルを調整する減衰手段
を有することを特徴とする請求項１記載のデジタ
ル信号処理装置。[Claims for Utility Model Registration] (1) A/D conversion means for converting an input analog signal into a digital signal; and receiving a digital signal from the A/D conversion means and outputting it when saturated digital data is input at a maximum output frequency. Digital signal processing means that performs predetermined equalization processing whose level is set so that the data is saturated; and D/A conversion means that converts the digital signal equalized by the digital signal processing means into an analog signal. A digital signal processing device characterized by: (2) The digital signal processing device according to claim 1, further comprising attenuation means for adjusting the output level of the D/A conversion means in conjunction with the level setting of the digital equalizing process of the digital signal processing means. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP714690U JPH0398523U (en) | 1990-01-30 | 1990-01-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP714690U JPH0398523U (en) | 1990-01-30 | 1990-01-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0398523U true JPH0398523U (en) | 1991-10-14 |
Family
ID=31510808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP714690U Pending JPH0398523U (en) | 1990-01-30 | 1990-01-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0398523U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012144234A1 (en) * | 2011-04-21 | 2012-10-26 | パナソニック株式会社 | Voltage generating circuit, analog-digital converter circuit, solid-state image pickup device, and image pickup apparatus |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61292409A (en) * | 1985-06-20 | 1986-12-23 | Matsushita Electric Ind Co Ltd | volume control device |
| JPS63309011A (en) * | 1987-06-11 | 1988-12-16 | Matsushita Electric Ind Co Ltd | Digital graphic equalizer |
-
1990
- 1990-01-30 JP JP714690U patent/JPH0398523U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61292409A (en) * | 1985-06-20 | 1986-12-23 | Matsushita Electric Ind Co Ltd | volume control device |
| JPS63309011A (en) * | 1987-06-11 | 1988-12-16 | Matsushita Electric Ind Co Ltd | Digital graphic equalizer |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012144234A1 (en) * | 2011-04-21 | 2012-10-26 | パナソニック株式会社 | Voltage generating circuit, analog-digital converter circuit, solid-state image pickup device, and image pickup apparatus |
| US9232160B2 (en) | 2011-04-21 | 2016-01-05 | Panasonic Intellectual Property Management Co., Ltd. | Voltage generation circuit, analog-to-digital conversion circuit, solid-state imaging device, and imaging apparatus, which are capable of reducing random noise |
| JP5899494B2 (en) * | 2011-04-21 | 2016-04-06 | パナソニックＩｐマネジメント株式会社 | Voltage generation circuit, analog / digital conversion circuit, solid-state imaging device, and imaging device |
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