JPH04101489A - Thin film wiring substrate - Google Patents
Thin film wiring substrateInfo
- Publication number
- JPH04101489A JPH04101489A JP21968290A JP21968290A JPH04101489A JP H04101489 A JPH04101489 A JP H04101489A JP 21968290 A JP21968290 A JP 21968290A JP 21968290 A JP21968290 A JP 21968290A JP H04101489 A JPH04101489 A JP H04101489A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuit wiring
- thin film
- bonding
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は薄膜配線基板に関し、より詳細には回路配線か
高密度の電気回路基板や半導体素子収納用パッケージ等
に用いられるセラミック配線基板の改良に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a thin film wiring board, and more specifically to improvements in ceramic wiring boards used for circuit wiring, high-density electric circuit boards, packages for housing semiconductor elements, etc. It is related to.
(従来技術及びその課題)
従来、電気回路基板や半導体素子収納用パッケージ等に
おける薄膜配線基板はその回路配線がM。(Prior art and its problems) Conventionally, the circuit wiring of thin film wiring boards used in electric circuit boards, packages for storing semiconductor elements, etc. is M.
Mn法等の厚膜形成技術によって形成されている。It is formed using a thick film forming technique such as the Mn method.
このMo−Mn法は、タングステン(W)、モリブデン
−マンガン(Mo−Mn)等の高融点金属から成る金属
粉末に有機用材、溶媒を添加し、ペースト状となした金
属ペーストを生もしくは焼結セラミック体の外表面にス
クリーン印刷により回路配線としての所定パターンに印
刷塗布し、次にこれを還元雰囲気中で焼成し、高融点金
属とセラミック体とを焼結一体化させる方法である。This Mo-Mn method involves adding an organic material and a solvent to a metal powder made of a high-melting point metal such as tungsten (W) or molybdenum-manganese (Mo-Mn), and then producing a metal paste in the form of a paste, either raw or sintered. This is a method in which a predetermined pattern of circuit wiring is coated on the outer surface of a ceramic body by screen printing, and then this is fired in a reducing atmosphere to sinter and integrate the high melting point metal and the ceramic body.
しかし乍ら、このMo−Mn法を用いて回路配線を形成
した場合、回路配線は金属ペーストをスクリーン印刷す
ることにより形成されることから回路配線の微細化が困
難であり、回路配線の高密度化ができないという欠点を
有していた。However, when circuit wiring is formed using this Mo-Mn method, it is difficult to miniaturize the circuit wiring because the circuit wiring is formed by screen printing a metal paste, and the high density of the circuit wiring is difficult to achieve. It had the disadvantage of not being able to be converted into
そこで上記欠点を解消するために回路配線を従来の厚膜
形成技法により形成するのに替えて微細化が可能な薄膜
形成技法を用いて形成した薄膜配線基板、即ち、セラミ
ック基板上にチタン(Ti)、クロム(Cr)、ニッケ
ル・クロム合金(Ni−Cr)等から成る接着層と金(
Au)から成る主導体層とを順次、イオンブレーティン
グ法やスパッタリンク法、メツキ法、蒸着法等の薄膜形
成技法により層着し、しかる後、これらの層をフォトリ
ソグラフィによって所定のパターンに形成し、回路配線
とした薄膜配線基板が提案されている。Therefore, in order to eliminate the above-mentioned drawbacks, instead of forming the circuit wiring using the conventional thick film forming technique, a thin film wiring board is formed using a thin film forming technique that allows for miniaturization.In other words, a titanium (Ti) ), chromium (Cr), nickel-chromium alloy (Ni-Cr), etc., and gold (
A main conductor layer consisting of Au) is sequentially deposited using a thin film forming technique such as an ion blasting method, a sputter link method, a plating method, or an evaporation method, and then these layers are formed into a predetermined pattern by photolithography. However, a thin film wiring board with circuit wiring has been proposed.
しかし乍ら、この薄膜形成技法を用いて形成した薄膜配
線基板はチタン、クロム、ニッケル・クロム合金と金と
か相互拡散し易い金属であるため回路配線に抵抗器やコ
ンデンサ等の電子部品を半田等のロウ材を介し接合させ
電気的に接続させる場合、ロウ材を溶融させる熱(約2
30〜450°C)が回路配線に印加されると該回路配
線を構成する接着層としてのチタン、クロム、ニッケル
・クロム合金か金から成る主導体層に拡散していき、そ
の結果、セラミック基板に、該セラミック基板と密着性
か悪い金が直接接触することとなって回路配線のセラミ
ック基板に対する接合強度が低下してしまい、薄膜配線
基板としての信頼性が大幅に劣化してしまうという欠点
を有していた。However, since the thin film wiring board formed using this thin film formation technique is a metal that easily interdiffuses with titanium, chromium, nickel-chromium alloy and gold, it is difficult to solder electronic components such as resistors and capacitors to the circuit wiring. When bonding and electrically connecting through a brazing material, the heat to melt the brazing material (approximately 2
When a temperature of 30 to 450°C is applied to the circuit wiring, it diffuses into the main conductor layer made of titanium, chromium, nickel-chromium alloy, or gold as an adhesive layer constituting the circuit wiring, and as a result, the ceramic substrate Another disadvantage is that the ceramic substrate comes into direct contact with the gold, which has poor adhesion, and the bonding strength of the circuit wiring to the ceramic substrate decreases, resulting in a significant deterioration of reliability as a thin film wiring substrate. had.
また接着層としてのチタン、クロム、ニッケル・クロム
合金等が金から成る主導体層に拡散することにより回路
配線の導通抵抗か極めて高いものとなる欠点も有してい
た。Another drawback is that titanium, chromium, nickel-chromium alloy, etc. used as an adhesive layer diffuse into the main conductor layer made of gold, resulting in extremely high conduction resistance of the circuit wiring.
(発明の目的)
本発明者は上記欠点に鑑み種々の実験の結果、回路配線
を構成するニッケル・クロム合金から成る接着層と金か
ら成る主導体層との間にニッケル、パラジウム、ロジウ
ム、白金の少なくとも1種から成るバリア層を介在させ
ると該ニッケル、パラジウム等から成るバリア層か接着
層と主導体層との相互拡散を有効に防止し、回路配線を
セラミック基板上に強固に被着接合させ得ることを知見
した。(Object of the Invention) In view of the above-mentioned drawbacks, the present inventor has conducted various experiments and discovered that nickel, palladium, rhodium, platinum, etc. When a barrier layer made of at least one of nickel, palladium, etc. is interposed, interdiffusion between the barrier layer or adhesive layer and the main conductor layer is effectively prevented, and the circuit wiring is firmly bonded to the ceramic substrate. We found that it is possible to
本発明は上記知見に基づき、回路配線の導通抵抗を低く
、且つ回路配線とセラミック基板との被着接合を強固と
し、回路配線に抵抗器やコンデンサ等の電子部品を半田
等のロウ材を介して強固に接合させることができる高信
頼性の薄膜配線基板を提供することをその目的とするも
のである。Based on the above findings, the present invention lowers the conduction resistance of the circuit wiring, strengthens the adhesion between the circuit wiring and the ceramic substrate, and connects electronic components such as resistors and capacitors to the circuit wiring through brazing material such as solder. The object of the present invention is to provide a highly reliable thin film wiring board that can be firmly bonded by using a thin film wiring board.
(課題を解決するための手段)
本発明の薄膜配線基板はセラミック基板上に薄膜形成技
術によりニッケル・クロム合金から成る接着層と、ニッ
ケル、パラジウム、ロジウム、白金の少なくとも1種か
ら成るバリア層と、金から成る主導体層を順次積層した
3層構造を有する回路配線を被着形成したことを特徴と
するものである。(Means for Solving the Problems) The thin film wiring board of the present invention has an adhesive layer made of a nickel-chromium alloy and a barrier layer made of at least one of nickel, palladium, rhodium, and platinum formed on a ceramic substrate by thin film formation technology. The present invention is characterized in that a circuit wiring having a three-layer structure in which main conductor layers made of gold are sequentially laminated is formed.
(実施例)
次に本発明の薄膜配線基板を添付図面にと基づき詳細に
説明する。(Example) Next, the thin film wiring board of the present invention will be described in detail based on the accompanying drawings.
第1図は本発明の薄膜配線基板の一実施例を示す断面図
であり、lはセラミック基板、2は回路配線である。FIG. 1 is a cross-sectional view showing one embodiment of the thin film wiring board of the present invention, where 1 is a ceramic substrate and 2 is a circuit wiring.
前記セラミック基板1は酸化アルミニウム質焼結体、ム
ライト質焼結体、窒化アルミニウム質焼結体、チタン酸
バリウム磁器、チタン酸ジルコン酸鉛磁器等から成り、
セラミック基板1が例えば酸化アルミニウム質焼結体か
ら成る場合には、例えばアルミナ、マグネシア、カルシ
ア等の原料粉末に適当な有機溶剤、溶媒を添加混合して
泥漿状となすとともにこれをドクターブレード法を採用
することによってセラミックグリーンシート(セラミッ
ク生シート)を形成し、しかる後、前記セラミックグリ
ーンシートに適当な打抜き加工を施し、所定形状と成す
とともに高温(約1600°C)で焼成することによっ
て製作される。The ceramic substrate 1 is made of aluminum oxide sintered body, mullite sintered body, aluminum nitride sintered body, barium titanate porcelain, lead zirconate titanate porcelain, etc.
When the ceramic substrate 1 is made of, for example, an aluminum oxide sintered body, a suitable organic solvent or solvent is added to and mixed with a raw material powder such as alumina, magnesia, or calcia to form a slurry, which is then subjected to a doctor blade method. A ceramic green sheet (ceramic raw sheet) is formed by employing the ceramic green sheet, and then the ceramic green sheet is punched in an appropriate manner, formed into a predetermined shape, and fired at a high temperature (about 1600°C). Ru.
また前記セラミック基板1の上面には回路配線2が薄膜
形成技法によって被着形成されており、該回路配線2は
接着層3と、バリア層4と、主導体層5の3層構造を有
している。Further, a circuit wiring 2 is formed on the upper surface of the ceramic substrate 1 by a thin film forming technique, and the circuit wiring 2 has a three-layer structure of an adhesive layer 3, a barrier layer 4, and a main conductor layer 5. ing.
前記回路配線2の接着層3はニッケル・クロム合金から
成り、蒸着法やイオンブレーティング法、スパッタリン
グ法等の薄膜形成技法によりセラミック基板l上に層着
される。The adhesive layer 3 of the circuit wiring 2 is made of a nickel-chromium alloy, and is deposited on the ceramic substrate l by a thin film forming technique such as vapor deposition, ion blasting, or sputtering.
尚、前記接着層3はセラミック基板lと回路配線2との
接合強度を上げる作用を為し、その厚みは500人未満
であると回路配線2をセラミック基板lに強固に接合さ
せるのが困難となる傾向にあり、また5000人を越え
ると接着層3を薄膜形成技法により層着させる際の内部
応力によってセラミック基板1と接着層3との接合強度
が低下する傾一
向にあることから500乃至5000人の範囲とするこ
とが好ましく、好適には1000乃至3000人の範囲
が良い。The adhesive layer 3 serves to increase the bonding strength between the ceramic substrate l and the circuit wiring 2, and if its thickness is less than 500, it is difficult to firmly bond the circuit wiring 2 to the ceramic substrate l. In addition, if the number of people exceeds 5000, the bonding strength between the ceramic substrate 1 and the adhesive layer 3 tends to decrease due to internal stress when the adhesive layer 3 is deposited using a thin film formation technique. The number of people is preferably in the range of 1,000 to 3,000 people.
また前記接続層3の上面にはバリア層4が層着されてお
り、該バリア層4は接着層3と主導体層5との相互拡散
を防止するとともに接着層3と主導体層5とを強固に接
合させる作用を為す。Further, a barrier layer 4 is layered on the upper surface of the connection layer 3, and the barrier layer 4 prevents mutual diffusion between the adhesive layer 3 and the main conductor layer 5, and also serves to separate the adhesive layer 3 and the main conductor layer 5. It works to make a strong bond.
前記バリア層4はニッケルに(Ni)、パラジウム(P
d)、ロジウム(Rh)、白金(Pt)の少なくとも1
種から成り、蒸着法やイオンブレーティング法、スパッ
タリング法等の薄膜形成技法により接着層3の上面に層
着される。The barrier layer 4 is made of nickel (Ni) and palladium (P).
d), rhodium (Rh), and platinum (Pt).
The adhesive layer 3 is formed of a seed and is deposited on the upper surface of the adhesive layer 3 by a thin film forming technique such as vapor deposition, ion blasting, or sputtering.
尚、前記バリア層4はその厚みが500人未満であると
接着層3と主導体層5との相互拡散を有効に防止するこ
とができない傾向にあり、また1000人を越えるとバ
リア層4を薄膜形成技法により層着させる際の内部応力
によって接着層3とバリア層4との接合強度が低下する
傾向にあることから500乃至1000人の範囲とする
ことが好ましく、好適には1000乃至3000人の範
囲か良い。Note that if the thickness of the barrier layer 4 is less than 500 layers, mutual diffusion between the adhesive layer 3 and the main conductor layer 5 cannot be effectively prevented, and if the thickness exceeds 1000 layers, the barrier layer 4 tends to be Since the bonding strength between the adhesive layer 3 and the barrier layer 4 tends to decrease due to internal stress during layer deposition using a thin film forming technique, the number of participants is preferably in the range of 500 to 1,000 people, preferably 1,000 to 3,000 people. The range is good.
また前記バリア層4の上面には主導体層5が蒸着法やイ
オンブレーティング法、スパッタリング法、メツキ法等
の薄膜形成技法により層着されており、該主導体層5は
主として電気を通す通路として作用を為す。Further, a main conductor layer 5 is deposited on the upper surface of the barrier layer 4 by a thin film forming technique such as a vapor deposition method, an ion blating method, a sputtering method, or a plating method. It acts as.
前記主導体層5は導通抵抗か極めて低い金か使用され、
その厚みは0.1 μm未満であると回路配線2の導通
抵抗が高くなって薄膜配線基板としては不向きとなる傾
向にあることから0.1 μm以上とすることか好まし
く、コストの点も考慮すると1.0乃至5.0μmの範
囲か好適である。The main conductor layer 5 is made of gold with very low conduction resistance,
If the thickness is less than 0.1 μm, the conduction resistance of the circuit wiring 2 tends to increase, making it unsuitable for use as a thin film wiring board. Therefore, it is preferable to set the thickness to 0.1 μm or more, taking into consideration the cost. Then, a range of 1.0 to 5.0 μm is suitable.
次に本発明の薄膜配線基板の具体的な製造方法について
説明する。Next, a specific method for manufacturing the thin film wiring board of the present invention will be explained.
まずセラミック基板1を洗浄し、セラミック基板1の外
表面に付着している塵や屑を除去する。First, the ceramic substrate 1 is cleaned to remove dust and debris adhering to the outer surface of the ceramic substrate 1.
次に前記セラミック基板1上に蒸着法により接着層とし
てのニッケル・クロムと、バリア層としてのニッケル、
パラジウム、ロジウム、白金の少なくとも1種と、主導
体層としての金を所定厚みに順次、層着させる。Next, nickel/chromium as an adhesive layer and nickel as a barrier layer are deposited on the ceramic substrate 1 by vapor deposition.
At least one of palladium, rhodium, and platinum and gold as a main conductor layer are sequentially deposited to a predetermined thickness.
次に前記接着層と、バリア層と、主導体層の各々をフォ
トリソグラフィによって所定パターンに食刻し、セラミ
ック基板l上に接着層と、バリア層と、主導体層の3層
構造を有する回路配線を被着形成して製品としての薄膜
配線基板となる。Next, each of the adhesive layer, barrier layer, and main conductor layer is etched into a predetermined pattern by photolithography, and a circuit having a three-layer structure of the adhesive layer, barrier layer, and main conductor layer is formed on the ceramic substrate l. Wiring is deposited to form a thin film wiring board as a product.
前記薄膜配線基板は回路配線2に抵抗器やコンデンサ等
の電子部品を半田等のロウ材を介して接合させる場合、
接着層3と主導体層5との間にバリア層4が介在されて
いるためロウ材を溶融させる熱か回路配線2に印加され
、接着層3と主導体層5との間に相互拡散か起ころうと
してもその相互拡散は前記バリア層4によって防止され
、回路配線2の導通抵抗を極めて低いものになすととも
に回路配線2のセラミック基板lへの接合強度を強固と
して極めて信頼性の高い薄膜配線基板となすことが可能
となる。When the thin film wiring board is used to bond electronic components such as resistors and capacitors to the circuit wiring 2 through a brazing material such as solder,
Since the barrier layer 4 is interposed between the adhesive layer 3 and the main conductor layer 5, heat for melting the brazing material is applied to the circuit wiring 2, and mutual diffusion occurs between the adhesive layer 3 and the main conductor layer 5. Even if such interdiffusion were to occur, the barrier layer 4 prevents such interdiffusion, thereby making the conduction resistance of the circuit wiring 2 extremely low, and strengthening the bonding strength of the circuit wiring 2 to the ceramic substrate l, resulting in extremely reliable thin film wiring. It becomes possible to use it as a substrate.
(実験例)
次に本発明の作用効果を以下の実験例に基づき説明する
。(Experimental Examples) Next, the effects of the present invention will be explained based on the following experimental examples.
(I)試料の作成
酸化アルミニウム質焼結体から成るセラミック基板を洗
浄し、その後、このセラミック基板上面に第1表に示す
厚みのニッケル・クロム合金(NiCr)から成る接着
層と、ニッケル(Ni)、パラジウム(Pd) 、ロジ
ウム(Rh)、白金(Pt)の少なくとも1種から成る
バリア層と、金(Au)から成る主導体層をイオンブレ
ーティング法により順次層着させ、しかる後、フォトリ
ソグラフィによりlX1mmのドツト状に加工し回路配
線試料となす。(I) Preparation of sample A ceramic substrate made of an aluminum oxide sintered body is cleaned, and then an adhesive layer made of a nickel-chromium alloy (NiCr) with a thickness shown in Table 1 is placed on the top surface of the ceramic substrate, ), a barrier layer made of at least one of palladium (Pd), rhodium (Rh), and platinum (Pt) and a main conductor layer made of gold (Au) are sequentially deposited by an ion-blating method, and then photo-coated. It is processed into a dot shape of 1×1 mm by lithography and used as a circuit wiring sample.
尚、試料番号183は本発明品と比較するための比較試
料てあり、接着層と主導体層との間にバリア層を層着し
ていない、従来のものである。Incidentally, sample number 183 is a comparative sample for comparison with the product of the present invention, and is a conventional sample in which a barrier layer is not layered between the adhesive layer and the main conductor layer.
(IF)接合強度の測定
各試料のドツト状回路配線に420°Cの熱処理を10
分間行った後、回路配線にアルミニウムから成る引っ張
り金具をエポキシ樹脂を介して接合し、その後、引っ張
り金具を回路配線に対して垂直方向に引っ張り、回路配
線がセラミック基板より剥がれた時の引っ張り力を求め
、これを回路配線の接合強度として評価した。(IF) Measurement of bonding strength The dot-shaped circuit wiring of each sample was heat treated at 420°C for 10 minutes.
After that, a tension fitting made of aluminum is bonded to the circuit wiring via epoxy resin, and then the tension fitting is pulled in a direction perpendicular to the circuit wiring to reduce the tensile force when the circuit wiring is peeled off from the ceramic substrate. This was evaluated as the bonding strength of the circuit wiring.
一〇−
尚、前記接合強度の測定は各々20個ずつ行い、その平
均値を求めて接合強度の評価とした。10- The above-mentioned bonding strength was measured for 20 pieces each, and the average value was calculated to evaluate the bonding strength.
上記の結果を第1表に示す。The above results are shown in Table 1.
(以下、余白)
第1表から明らかなように従来のニッケル・クロム合金
から成る接着層に金から成る主導体層を直接層着させた
回路配線は、回路配線に抵抗器やコンデンサ等の電子部
品を半田等を介して接合させる際、回路配線に半田等の
ロウ材を溶融させる熱が印加されると接着層と主導体層
との間に相互拡散が起こって回路配線のセラミック基板
に対する接合強度が0.82K g/mm2以下に低下
し、薄膜配線基板の信頼性が大幅に劣化している。(Left below) As is clear from Table 1, conventional circuit wiring in which a main conductor layer made of gold is directly deposited on an adhesive layer made of a nickel-chromium alloy is not suitable for electronic devices such as resistors and capacitors on the circuit wiring. When parts are bonded using solder, etc., when heat is applied to the circuit wiring to melt the brazing material such as solder, mutual diffusion occurs between the adhesive layer and the main conductor layer, resulting in the bonding of the circuit wiring to the ceramic substrate. The strength decreased to 0.82K g/mm2 or less, and the reliability of the thin film wiring board was significantly deteriorated.
これに対し、本発明品のニッケル・クロム合金から成る
接着層と金から成る主導体層との間にニッケル、パラジ
ウム、ロジウム、白金の少なくとも1種から成るバリア
層を介在させたものは接着層と主導体層との間の相互拡
散か有効に防止され、これによって回路配線のセラミッ
ク基板に対する接合強度を2.28 K g/mm’以
上として極めて信頼性の高い薄膜配線基板となすことか
できる。On the other hand, in the product of the present invention, a barrier layer made of at least one of nickel, palladium, rhodium, and platinum is interposed between the adhesive layer made of a nickel-chromium alloy and the main conductor layer made of gold. Mutual diffusion between the ceramic substrate and the main conductor layer is effectively prevented, and as a result, the bonding strength of the circuit wiring to the ceramic substrate can be increased to 2.28 K g/mm' or more, resulting in an extremely reliable thin film wiring board. .
(発明の効果)
以上詳述した通り、本発明の薄膜配線基板によれば、セ
ラミック基板上に被着形成される回路配線をニッケル・
クロム合金から成る接着層と、ニッケル、パラジウム、
ロジウム、白金の少なくとも1種から成るバリア層と、
金から成る主導体層の3層構造となしたことから回路配
線に抵抗器やコンデンサ等の電子部品を半田等のロウ材
を介し接合させたとしても回路配線のセラミック基板に
対する接合強度が低下することは一切なく、回路配線の
セラミック基板に対する接合強度を常に強固として高信
頼性の薄膜配線基板となすことができる。(Effects of the Invention) As detailed above, according to the thin film wiring board of the present invention, the circuit wiring formed on the ceramic substrate is made of nickel.
Adhesive layer made of chromium alloy, nickel, palladium,
a barrier layer made of at least one of rhodium and platinum;
Because it has a three-layer structure with a main conductor layer made of gold, even if electronic components such as resistors and capacitors are bonded to the circuit wiring through a brazing material such as solder, the bonding strength of the circuit wiring to the ceramic substrate will decrease. There is no problem at all, and the bonding strength of the circuit wiring to the ceramic substrate is always strong, making it possible to create a highly reliable thin film wiring board.
また同時に回路配線の導通抵抗を極めて低いものとなす
こともてきる。At the same time, the conduction resistance of the circuit wiring can be made extremely low.
第1図は本発明の薄膜配線基板の一実施例を示す断面図
である。
1・・セラミック基板 2・・回路配線3・・接着層
4・・バリア層5・・主導体層FIG. 1 is a sectional view showing an embodiment of the thin film wiring board of the present invention. 1. Ceramic board 2. Circuit wiring 3. Adhesive layer
4. Barrier layer 5. Main conductor layer
Claims (1)
ロム合金から成る接着層と、ニッケル、パラジウム、ロ
ジウム、白金の少なくとも1種から成るバリア層と、金
から成る主導体層を順次積層した3層構造を有する回路
配線を被着形成したことを特徴とする薄膜配線基板。It has a three-layer structure in which an adhesive layer made of a nickel-chromium alloy, a barrier layer made of at least one of nickel, palladium, rhodium, and platinum, and a main conductor layer made of gold are sequentially laminated on a ceramic substrate using a thin film formation technique. A thin film wiring board characterized by having circuit wiring formed thereon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21968290A JPH04101489A (en) | 1990-08-20 | 1990-08-20 | Thin film wiring substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21968290A JPH04101489A (en) | 1990-08-20 | 1990-08-20 | Thin film wiring substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04101489A true JPH04101489A (en) | 1992-04-02 |
Family
ID=16739322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21968290A Pending JPH04101489A (en) | 1990-08-20 | 1990-08-20 | Thin film wiring substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04101489A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5485352A (en) * | 1993-12-27 | 1996-01-16 | Nec Corporation | Element joining pad for semiconductor device mounting board |
-
1990
- 1990-08-20 JP JP21968290A patent/JPH04101489A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5485352A (en) * | 1993-12-27 | 1996-01-16 | Nec Corporation | Element joining pad for semiconductor device mounting board |
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