JPH0410433U - - Google Patents

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Publication number
JPH0410433U
JPH0410433U JP5020890U JP5020890U JPH0410433U JP H0410433 U JPH0410433 U JP H0410433U JP 5020890 U JP5020890 U JP 5020890U JP 5020890 U JP5020890 U JP 5020890U JP H0410433 U JPH0410433 U JP H0410433U
Authority
JP
Japan
Prior art keywords
output terminal
transistor
operates
channel mos
transistor whose
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5020890U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5020890U priority Critical patent/JPH0410433U/ja
Publication of JPH0410433U publication Critical patent/JPH0410433U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一実施例の高電圧発生装置の回路図、
第2図は一実施例の高電圧発生装置への入力信号
及び出力電圧を説明する波形図、第3図は従来の
高電圧発生装置の回路図、第4図は従来の高電圧
発生装置への入力信号及び出力電圧を説明する波
形図である。 1,2……回路、3,4……入力端子、5,6
……インバータ、7,10……コンバータ、8,
11……フオトカプラ、9,12……ドライバー
回路、13,14,15……出力端子、Q10
11……NチヤンネルMOSトランジスタ、Q
〜Q,Q12〜Q14……トランジスタ。
FIG. 1 is a circuit diagram of a high voltage generator according to an embodiment,
Figure 2 is a waveform diagram illustrating the input signal and output voltage to a high voltage generator according to one embodiment, Figure 3 is a circuit diagram of a conventional high voltage generator, and Figure 4 is a diagram of a conventional high voltage generator. FIG. 2 is a waveform diagram illustrating input signals and output voltages of the . 1, 2...Circuit, 3, 4...Input terminal, 5, 6
...Inverter, 7,10...Converter, 8,
11... Photocoupler, 9, 12... Driver circuit, 13, 14, 15... Output terminal, Q10 ,
Q11 ...N-channel MOS transistor, Q
5 to Q9 , Q12 to Q14 ...Transistors.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号に応じてスイツチングを行うスイツチ
ング素子と、該スイツチング素子の出力端子にベ
ース端子が接続され出力端子がハイレベルに設定
されている時動作する第1のトランジスタと、出
力端子にベースが接続され出力端子がローレベル
に設定されている時動作する第2のトランジスタ
と、前記第1、第2のトランジスタのエミツタに
ゲートが接続されソースに高電圧が印加されるN
チヤンネルMOSトランジスタとを有し、該Nチ
ヤンネルMOSトランジスタのドレインより抵抗
を介して出力を行うことを特徴とする高電圧発生
装置。
A switching element that performs switching according to an input signal, a first transistor whose base terminal is connected to the output terminal of the switching element and operates when the output terminal is set to a high level, and a first transistor whose base is connected to the output terminal. a second transistor that operates when the output terminal is set to a low level; and an N transistor whose gates are connected to the emitters of the first and second transistors and a high voltage is applied to the sources.
What is claimed is: 1. A high-voltage generator comprising: a N-channel MOS transistor; and outputting from the drain of the N-channel MOS transistor via a resistor.
JP5020890U 1990-05-14 1990-05-14 Pending JPH0410433U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5020890U JPH0410433U (en) 1990-05-14 1990-05-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5020890U JPH0410433U (en) 1990-05-14 1990-05-14

Publications (1)

Publication Number Publication Date
JPH0410433U true JPH0410433U (en) 1992-01-29

Family

ID=31568563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5020890U Pending JPH0410433U (en) 1990-05-14 1990-05-14

Country Status (1)

Country Link
JP (1) JPH0410433U (en)

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