JPH0410499U - - Google Patents

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Publication number
JPH0410499U
JPH0410499U JP5032790U JP5032790U JPH0410499U JP H0410499 U JPH0410499 U JP H0410499U JP 5032790 U JP5032790 U JP 5032790U JP 5032790 U JP5032790 U JP 5032790U JP H0410499 U JPH0410499 U JP H0410499U
Authority
JP
Japan
Prior art keywords
signal
right channel
circuit
adder
cancellation signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5032790U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5032790U priority Critical patent/JPH0410499U/ja
Publication of JPH0410499U publication Critical patent/JPH0410499U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係るステレオ再生装置の一実
施例を示すブロツク図、第2図は第1図中の第1
および第2のイコライザ回路の一例を示すブロツ
ク図、第3図は本考案のステレオ再生装置を理論
的に説明するための伝達特性モデル図、第4図は
第1図中の第1および第2のイコライザ回路の他
の例を示すブロツク図である。 1,9……ハイパスフイルタ、3,11……遅
延回路、5,13……増幅回路、7,15……第
1および第2の相殺信号作成回路、17,31…
…第1および第2の加算器、19,33……第1
および第2のイコライザ回路、21,35……L
およびRスピーカ、37……ダミーヘツド、39
,41……左右のマイクロフオン。
FIG. 1 is a block diagram showing an embodiment of a stereo reproduction device according to the present invention, and FIG.
and a block diagram showing an example of a second equalizer circuit, FIG. 3 is a transfer characteristic model diagram for theoretically explaining the stereo reproduction device of the present invention, and FIG. FIG. 2 is a block diagram showing another example of the equalizer circuit of FIG. 1, 9... High pass filter, 3, 11... Delay circuit, 5, 13... Amplifying circuit, 7, 15... First and second cancellation signal generation circuit, 17, 31...
...first and second adders, 19, 33...first
and a second equalizer circuit, 21, 35...L
and R speaker, 37...dummy head, 39
, 41...Left and right microphones.

Claims (1)

【実用新案登録請求の範囲】 受聴位置の前方に左右対称に配置された左およ
び右チヤンネル・スピーカに対し、 これら左又は右チヤンネル・スピーカから前記
受聴位置の右又は左側受聴点までの音の伝播時間
と前記左又は右チヤンネル・スピーカから前記左
又は右側受聴点までの音の伝播時間との差をT(
T>0)、前記左又は右チヤンネル・スピーカか
ら前記右又は左側受聴点までの音の減衰度をa(
0<a≦1)、自然対数の底をe、角速度をωと
したとき、 伝達特性H(ω)を有するフイルタ、遅延時間
Tの遅延回路および前記減衰度aの増幅回路を直
列接続してなり、左チヤンネル信号から第1の相
殺信号を作成する第1の相殺信号作成回路と、 伝達特性H(ω)を有するフイルタ、遅延時間
Tの遅延回路および前記減衰度aの増幅回路を直
列接続してなり、右チヤンネル信号から第2の相
殺信号を作成する第2の相殺信号作成回路と、 前記左チヤンネル信号と第2の相殺信号を加算
する第1の加算器と、 前記右チヤンネル信号と第1の相殺信号を加算
する第2の加算器と、 前記第1の加算器からの出力信号を伝達特性1
/[1−a2{H(ω)}2e−j2ωT]のフ
イルタ処理して前記左チヤンネル・スピーカ側へ
出力する第1のイコライザ回路と、 前記第2の加算器からの出力信号を伝達特性1
/[1−a2{H(ω)}2e−j2ωT]のフ
イルタ処理して前記右チヤンネル・スピーカ側へ
出力する第2のイコライザ回路と、 を具備することを特徴とするステレオ再生装置。
[Claims for Utility Model Registration] Regarding left and right channel speakers arranged symmetrically in front of a listening position, propagation of sound from these left or right channel speakers to the right or left listening point of the listening position. The difference between the time and the sound propagation time from the left or right channel speaker to the left or right listening point is T(
T>0), the degree of attenuation of the sound from the left or right channel speaker to the right or left listening point is a(
0<a≦1), the base of the natural logarithm is e, and the angular velocity is ω.A filter having a transfer characteristic H(ω), a delay circuit with a delay time T, and an amplifier circuit with the attenuation degree a are connected in series. A first cancellation signal creation circuit that creates a first cancellation signal from the left channel signal, a filter having a transfer characteristic H(ω), a delay circuit with a delay time T, and an amplifier circuit with the attenuation degree a are connected in series. a second cancellation signal creation circuit that creates a second cancellation signal from the right channel signal; a first adder that adds the left channel signal and the second cancellation signal; and the right channel signal. a second adder that adds the first cancellation signal; and a transfer characteristic 1 of the output signal from the first adder.
/[1-a 2 {H(ω)} 2 e -j2 ωT] and outputs the output signal from the second adder to the left channel speaker. Transfer characteristics 1
/[1-a 2 {H(ω)} 2 e −j2 ωT] and a second equalizer circuit that performs filter processing and outputs the resultant signal to the right channel speaker side. .
JP5032790U 1990-05-16 1990-05-16 Pending JPH0410499U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5032790U JPH0410499U (en) 1990-05-16 1990-05-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5032790U JPH0410499U (en) 1990-05-16 1990-05-16

Publications (1)

Publication Number Publication Date
JPH0410499U true JPH0410499U (en) 1992-01-29

Family

ID=31568779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5032790U Pending JPH0410499U (en) 1990-05-16 1990-05-16

Country Status (1)

Country Link
JP (1) JPH0410499U (en)

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