JPH04106916A - Method of forming gaas layer - Google Patents

Abstract

PURPOSE:To form a high quality of GaAs layer on an Si substrate by putting the quantity of added impurities to the quantity of bringing about the hardening of GaAs crystal. CONSTITUTION:First, a GaAs layer 12 where impurities are added is grown on an Si substrate 10. The impurities to be added are made, for example, indium, and for the additive concentration, it is made the quantity of bringing about the hardening of GaAs crystal. Next, a GaAs layer 14, where impurities are not added, is grown on this GaAs layer 12, where impurities are added. In the middle of the growth of the GaAs layer 14, where impurities are not added, or after the growth, annealing is performed. The structure, which has the laminate (layer consisting of 12 and 14) of GaAs being grown on the Si substrate 10 and annealed at high temperature, is cooled slowly to a room temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method of forming a GaAs (gallium arsenide) layer on a Si (silicon) substrate.

(Prior Art) Research and development have been carried out to grow GaAs 1lt on a Si substrate. According to conventional growth techniques, after a GaAs film is formed on a 51 substrate at an appropriate film forming temperature of approximately 500 to 600° C. or higher, the film is slowly cooled to room temperature.

The results of research on the stress in the GaAs layer grown on such a 51 substrate, or the literature ``Japanese
Journal of Applied Phys.
sics, Vol, '27. No.

10, (1988), p. L18(5-L1Si8). According to this document, tZ'rG a
The stress at room temperature in the As-grown layer is determined by the difference in thermal expansion between GaAs and Si between temperatures around 350°C and room temperature, so it is not related to the growth temperature of GaAs, and it also increases due to annealing. (2) During the cooling process to room temperature after film formation, dislocations move over a wide area or create new formations in order to relieve the stress within the growth layer caused by the difference in thermal expansion at temperatures above 350°C. It has been reported that this occurs.

(Problems to be Solved by the Invention) Therefore, in the conventional growth technology of a GaAs layer on a Si substrate, it is not possible to avoid the cooling process of the GaAs growth layer from a growth temperature of 350°C or higher to room temperature. As mentioned above, it is difficult to reduce the dislocations generated in order to relieve stress.

In addition, in order to reduce dislocations and degrees in the GaAs growth layer, conventionally, I
Attempts have also been made to introduce strained superlattices such as n Ga As , / Ga As s, etc., or to combine these, but in any case, +06/'C
It was difficult to obtain dislocations and degrees of less than m2.

The purpose of this invention is to reduce the stress on the surface side where the device is fabricated, and also to reduce the density of dislocations, thereby producing high quality G.
An object of the present invention is to provide a method for forming aAs1l on a 31 substrate.

(Means for Solving the Problems) In order to achieve this object, the method for forming GaAs1W of the present invention includes a step of growing an impurity-doped GaAs layer on a Si substrate, and a step of growing an impurity-doped GaAs layer on the impurity-doped GaAs layer. The method includes a step of growing an additive-free GaAs layer, an annealing step during or after the growth of the impurity-free GaAs layer, and finely adjusting the amount of the impurity added to an amount that causes hardening of the GaAs crystal. −.

In applying the present invention, it is preferable to use impurities such as indium (In), phosphorus (P), antimony (Sb), nitrogen (N), tellurium (Te), selenium (Se), and subbutton (
It is preferable to use one or more elements selected from the element group Zn).

Roughly speaking, according to the embodiment of the present invention, when the impurity is indium (In), the amount added is 1019/cm3.
That's fine. Preferably, In addition amount%
It would be good to set it as 1019-1020/Cm3.

(Function) In this invention, GaAs doped with impurities is formed on a Si substrate.
An impurity-doped GaAs layer is formed on the impurity-doped GaAs layer. This impurity-doped GaA
The s layer and the impurity-free GaAs layer are the GaAs layer of the present invention.
It constitutes an As layer. The impurity used is a substance that has the effect of hardening the solid solution, and the amount added is:
The temperature is set to a level that hardens the GaAS crystal. Therefore, the impurity-doped GaAs layer 1. The hardening effect of this impurity makes it difficult for dislocations to move at temperatures as high as 350°C, and since dislocations do not occur easily, the stress is less relaxed, and therefore the bond between the Si substrate and the GaAs layer is reduced. Perhaps more stress is applied to the impurity-doped GaAs layer, probably due to the difference in thermal expansion. Therefore, the stress applied to the undoped GaAs layer grown on this impurity-doped GaAs layer is reduced, and therefore the density of dislocations that have been generated to relieve the stress is also reduced.

These decreases are particularly large in the region of the undoped GaAs layer on the surface side opposite to the Si substrate side.
This impurity-free GaAs layer becomes a high-quality GaAs layer suitable for manufacturing active elements and the like.

According to the present invention, it is possible to solve the problem that many dislocations occur during the cooling process to relieve the stress caused by the difference in thermal expansion between Si and GaAs. I can do it.

(Embodiments) Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1A and 1B are process diagrams for explaining the method of growing a GaAs layer on a 51 substrate of the present invention.

First, an impurity-doped GaAs layer 12 is grown on the Si substrate 10. In this example, the thickness of the growth layer 12 is 0.1
~1. The thickness of the film should be appropriate within the area surrounding the horse. The impurity to be added is, for example, indium (In), and its concentration in the GaAs layer is about 10197 cm 3 or more. In the case of indium, the minimum addition concentration necessary to harden the GaAs crystal is about 1019·'Cm3, so it may be better to have more than this.
! In order to prevent damage, the maximum addition M is preferably about 10"/crn3.

The growth of this impurity-doped GaAs layer is performed using an undoped GaAs layer.
Similar to the growth of a normal GaAs layer by the MOCVD method,
Trimethylgallium and arsine are used as process gases, and hydrogen is used as carrier gas at appropriate flow rates (
(SCCM) to a film forming chamber that can maintain an appropriate degree of vacuum, and in the embodiment of this invention, trimethylisidium! Indium in the GaAs growth layer has the above-mentioned 10”/
Flow rate sufficient to add 8 cm3 or higher (SCCM)
Supplied with Other growth conditions may be set similarly to commonly used conditions.

Next, an undoped GaAs layer 14 is grown on this impurity-doped GaAs layer 12. In this embodiment, the film thickness is approximately 3L1m. This GaAs layer 14 may be grown under growth conditions normally used in MOCVD.

In the present invention, annealing is performed during or after the growth of the impurity-free GaAs layer 4. This annealing step may be carried out once, or may be carried out in two or more steps, depending on the requirements. Do this for minutes.

GaA grown on a Si substrate 10 and annealed at high temperature
A structure (herein, this structure is also referred to as a wafer) having a stacked body (layers consisting of 12 and 14) of s,
Cool slowly to room temperature. In this slow cooling process, as already explained, the temperature of 350°C is naturally passed. However, in the layer structure obtained by the process of the embodiment of the present invention, the impurity-doped GaA
In the s-layer 12, the GaAs crystal is hardened due to the addition of indium, and therefore dislocations are difficult to move and new dislocations are difficult to occur in the impurity-doped GaAs layer 2. Therefore, a large stress is applied to the impurity-doped GaAs layer 12 due to the difference in thermal expansion between Sl and GaAs of the substrate 10. Therefore, in the impurity-free GaAs layer 4 on the front side of the wafer, the stress is reduced overall, and therefore the number of dislocations that have been generated to relieve stress is also reduced. In particular, this decrease is due to the impurity-free Ga
This occurs significantly on the surface side of the As layer 14, and therefore becomes a high-quality GaAs layer suitable for manufacturing semiconductor devices.

It is clear that the invention is not limited only to the embodiments described above, but can be subjected to many variations and modifications. For example, in the above embodiment, the impurity to be added is indium (In), but is not limited to this, and other elements having the property of hardening the solid solution of GaAs crystal, such as phosphorus (P), are used as the impurity. , antimony (Sb), elemental (N), tellurium (Te), selenium (Se) or zinc (
Elements such as Zn) can also be used alone or in appropriate combinations.

In addition, when the impurity is indium (In), the amount added is 10'9/cm3 or more, but if an impurity other than indium is used, it should be added to the extent that hardening occurs when it is added to GaAs. Whether it is necessary or not, the addition concentration may be determined by setting a suitable amount depending on each impurity.

In addition, an impurity-doped GaAs layer and an impurity-free GaAs layer
Other growth conditions for the s-layer are limited to those in the embodiments described above, and may be appropriately set according to the design.

(Effect of the invention) As is clear from the above explanation, the GaA of this invention
According to the method for forming the s layer, impurity-doped GaAs# is formed on a Si substrate by adding an impurity that has the function of hardening a solid solution to the GaAs layer at a concentration sufficient to actually harden it, and then the impurity is added to the upper side of the GaAs layer. Since this is a method of growing normal GaAs without doping and annealing it to grow a GaAs layer on a Si substrate, the impurity-free GaAs to be used in semiconductor devices has a higher concentration in the layer than conventional GaAs layers. The stress is reduced, and the dislocation density is also reduced, resulting in a GaAs layer with higher quality than before.

[Brief explanation of the drawing]

FIGS. 1A and 18 are process diagrams for explaining the method of forming a GaAs layer of the present invention. 10 = Si substrate 12 - Impurity-doped GaAs layer 14 - Impurity-free GaAs layer.

Claims (3)

[Claims] (1) A method for growing a GaAs layer on a Si substrate, comprising: growing an impurity-doped GaAs layer on the Si substrate; growing an impurity-free GaAs layer on the impurity-doped GaAs layer; A method for forming a GaAs layer, comprising: an annealing step during or after the growth of the doped GaAs layer, and the amount of the impurity added is set to an amount that causes hardening of the GaAs crystal. (2) The impurity according to claim 1 is indium (In).
, phosphorus (P), antimony (Sb), nitrogen (N), tellurium (Te), selenium (Se), and zinc (Zn). How to form. (3) A method for forming a GaAs layer, characterized in that when the impurity according to claim 1 is indium (In), the amount added is 10^1^9/cm^3 or more.