JPH0412047U - - Google Patents
Info
- Publication number
- JPH0412047U JPH0412047U JP5098490U JP5098490U JPH0412047U JP H0412047 U JPH0412047 U JP H0412047U JP 5098490 U JP5098490 U JP 5098490U JP 5098490 U JP5098490 U JP 5098490U JP H0412047 U JPH0412047 U JP H0412047U
- Authority
- JP
- Japan
- Prior art keywords
- output
- data
- area
- setting
- table memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Description
第１図はこの考案の機能ブロツク図、第２図〜
第６図は実施例を示し、第２図はデータ出力装置
の構成を示したブロツク図、第３図は優先エリア
の設定例を示した図、第４図は優先順位テーブル
メモリ１７の設定例を示した図、第５図は２以上
のデータを重ね合せ出力する際の過程を示した図
、第６図は重ね合せ指令に応答して実行されるフ
ローチヤートである。
１１……キー入力部、１２……入力制御部、１
３……ＣＰＵ、１４……表示制御部、１５……Ｃ
ＲＴ表示部、１６……ＲＡＭ、１７……優先順位
テーブルメモリ。
Figure 1 is a functional block diagram of this invention, Figure 2~
FIG. 6 shows an embodiment, FIG. 2 is a block diagram showing the configuration of the data output device, FIG. 3 is a diagram showing an example of setting the priority area, and FIG. 4 is an example of setting the priority table memory 17. FIG. 5 is a diagram showing the process of superimposing and outputting two or more data, and FIG. 6 is a flowchart executed in response to a superimposition command. 11...Key input section, 12...Input control section, 1
3...CPU, 14...Display control unit, 15...C
RT display unit, 16...RAM, 17...priority table memory.
Claims (1)
なり合つて出力される出力領域を部分指定する出
力領域指定手段と、 この出力領域指定手段によつて指定された出力
領域毎にデータ出力の優先順位をテーブルメモリ
に設定する優先順位設定手段と、 第１のデータと第２のデータとを重ね合せて出
力する際に、前記出力領域指定手段によつて指定
された出力領域毎に前記テーブルメモリの設定内
容にしたがつて第１のデータあるいは第２のデー
タを優先出力させる出力制御手段と、 を具備したことを特徴とするデータ出力装置。[Claims for Utility Model Registration] Output area specifying means for partially specifying an output area in which at least first data and second data overlap and are output; and an output specified by the output area specifying means. priority setting means for setting data output priorities for each area in a table memory; A data output device comprising: output control means for preferentially outputting first data or second data according to the setting contents of the table memory for each output area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5098490U JPH0412047U (en) | 1990-05-16 | 1990-05-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5098490U JPH0412047U (en) | 1990-05-16 | 1990-05-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0412047U true JPH0412047U (en) | 1992-01-31 |
Family
ID=31570009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5098490U Pending JPH0412047U (en) | 1990-05-16 | 1990-05-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0412047U (en) |
-
1990
- 1990-05-16 JP JP5098490U patent/JPH0412047U/ja active Pending