JPH0412097A - Compound semiconductor and method for growing the same - Google Patents

Compound semiconductor and method for growing the same

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Publication number
JPH0412097A
JPH0412097A JP11059590A JP11059590A JPH0412097A JP H0412097 A JPH0412097 A JP H0412097A JP 11059590 A JP11059590 A JP 11059590A JP 11059590 A JP11059590 A JP 11059590A JP H0412097 A JPH0412097 A JP H0412097A
Authority
JP
Japan
Prior art keywords
compound semiconductor
layer
temperature
silicon substrate
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11059590A
Other languages
Japanese (ja)
Inventor
Hiroya Kimura
浩也 木村
Kouichi Koukado
香門 浩一
Futatsu Shirakawa
白川 二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP11059590A priority Critical patent/JPH0412097A/en
Publication of JPH0412097A publication Critical patent/JPH0412097A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、多孔質シリコン基板上に成長させた■−v族
、■−■族、IV−IV族等の化合物半導体及びその製
造方法に関する。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to compound semiconductors such as ■-v group, ■-■ group, IV-IV group, etc. grown on a porous silicon substrate and a method for manufacturing the same. .

(従来の技術) シリコン基板は、大面積化が容易であり、軽量で高い熱
伝導率を有し、安価であるところから、該基板の上に化
合物半導体を成長させる試みがなされてきた。
(Prior Art) Attempts have been made to grow compound semiconductors on silicon substrates because they are easy to grow in area, lightweight, have high thermal conductivity, and are inexpensive.

しかし、例えば、シリコンとGaAsとの間に約4%の
結晶格子定数の差があるため、7リコン基板上に格子定
数の異なる化合物半導体のへテロエビタキンヤル成長を
行うときには、通常の成長方法では良好な結晶を得るこ
とはできず、例えば、基板単結晶の面指数に対して角度
を僅かにずらせたオフアングルシリコン基板、Geバッ
ファ層を有するシリコン基板を用いる方法が試みられて
いる。
However, since there is a difference in crystal lattice constant of about 4% between silicon and GaAs, for example, when performing heteroepitaxial growth of compound semiconductors with different lattice constants on a silicon substrate, it is difficult to use the normal growth method. However, it is not possible to obtain a good crystal using this method, and methods using, for example, an off-angle silicon substrate whose angle is slightly shifted with respect to the plane index of the substrate single crystal, and a silicon substrate having a Ge buffer layer have been attempted.

さらに、rsolid 5tate Technolo
gy(+988−1)日本語版p、41〜49」の例の
ように、850〜900℃程度の高温で熱処理したシリ
コン基板の上に、400〜450℃程度の低温で200
Å以下の薄いGaAs層を成長させ、その後通常の高温
成長を行う二段階温度成長法も試みられているが、必ず
しも良好な結晶を成長させることができなかった。また
、GaAs歪み超格子を有するシリコン基板等を使用す
る方法などが試みられているが、成長層の残留転位は1
087cm’程度に低減するに止まっている。第4図は
上記方法の温度制御の説明図であり、第3図は得られた
GaAs半導体の断面図である。
Furthermore, rsolid 5tate Technolo
gy (+988-1) Japanese version p, 41-49'', a silicon substrate heat-treated at a high temperature of about 850-900°C is heated at a low temperature of about 400-450°C for 200°C.
A two-step temperature growth method has also been attempted in which a thin GaAs layer of Å or less is grown and then normal high-temperature growth is performed, but it has not always been possible to grow a good crystal. In addition, attempts have been made to use a silicon substrate with a GaAs strained superlattice, but the residual dislocations in the grown layer are only 1.
It has only decreased to about 0.087 cm'. FIG. 4 is an explanatory diagram of temperature control in the above method, and FIG. 3 is a cross-sectional view of the obtained GaAs semiconductor.

さらに、「応用物理第57巻第11号(1988)第1
1】0〜1720頁」では、ヘテロエピタキシャル成長
に伴う界面近傍の歪み応力の緩和を目的として、陽極化
成法によりシリコン基板表面に微小孔を有する多孔質層
を形成し、接層の上にGaAsを成長させることが試み
られたが、エピタキシャル層の結晶性は、バルク結晶と
比較して、良好なものを得ることはできなかった。
Furthermore, “Applied Physics Vol. 57 No. 11 (1988) No. 1
1, pages 0 to 1720, a porous layer with micropores is formed on the surface of a silicon substrate by anodization, and GaAs is deposited on the contact layer, with the aim of alleviating strain stress near the interface due to heteroepitaxial growth. Attempts were made to grow the epitaxial layer, but the crystallinity of the epitaxial layer was not as good as that of the bulk crystal.

(発明が解決しようとする課題) 本発明は、上記の欠点を解消し、多孔質シリコン基板の
上に形成した結晶性の優れた化合物半導体及びその成長
方法を提供しようとするものである。
(Problems to be Solved by the Invention) The present invention aims to eliminate the above-mentioned drawbacks and provide a compound semiconductor with excellent crystallinity formed on a porous silicon substrate and a method for growing the same.

(課題を解決するための手段) 本発明は、多孔質シリコン基板上に成長させた化合物半
導体において、多孔質シリコン基板の表面変成層の上に
低温成長による厚さ10〜5000人の化合物半導体層
、さらにその上に高温成長による化合物半導体単結晶層
を有することを特徴とする化合物半導体、及び、多孔質
シリコン基板上に化合物半導体を成長させる製造方法に
おいて、陽極化成法によりシリコン単結晶を多孔質化し
たシリコン基板の表面変成層の上に、200〜500℃
の低温成長で厚さ10〜5000人の化合物半導体層を
成長させ、接層の上に通常の成長法で化合物半導体単結
晶層を高温成長させることを特徴とする化合物半導体の
製造方法である。
(Means for Solving the Problems) The present invention provides a compound semiconductor grown on a porous silicon substrate, in which a compound semiconductor layer with a thickness of 10 to 5000 layers is grown by low temperature growth on the surface metamorphic layer of the porous silicon substrate. , a compound semiconductor characterized by further having a compound semiconductor single crystal layer grown at high temperature thereon, and a manufacturing method for growing a compound semiconductor on a porous silicon substrate, in which a silicon single crystal is grown into a porous layer by an anodization method. 200 to 500℃ on top of the surface metamorphic layer of the silicon substrate.
This method of manufacturing a compound semiconductor is characterized by growing a compound semiconductor layer with a thickness of 10 to 5,000 thick by low-temperature growth, and then growing a compound semiconductor single crystal layer on the contact layer at high temperature by a normal growth method.

(作用) 従来、シリコン基板の上に二段階成長法で化合物半導体
単結晶層を成長させる方法や陽極化成法によりシリコン
表面に多孔質層を形成した多孔質シリコン基板の上に化
合物半導体単結晶層を成長させる方法が試みられてきた
が、低転位密度で良好な結晶性を得ることはできなかっ
た。
(Function) Conventionally, a compound semiconductor single crystal layer is grown on a silicon substrate by a two-step growth method, or a compound semiconductor single crystal layer is grown on a porous silicon substrate in which a porous layer is formed on the silicon surface by an anodization method. However, it has not been possible to obtain good crystallinity with low dislocation density.

本発明者等は、上記の多孔質シリコン基板から、特に表
面変成層を除去することなく、直接的に化合物半導体を
成長させる方法を鋭意研究したところ、変成層を有する
多孔質シリコン基板の上に、目的とする化合物半導体と
同じ組成の薄い化合物半導体層を低温成長させ、さらに
その上に目的とする化合物半導体単結晶層を通常の方法
で高温成長させることにより、結晶性の優れた化合物半
導体を得ることに成功した。上記の薄い低温成長層は、
アモルファスまたは不安定な結晶構造を有するとともに
、目的とする化合物半導体自身の格子定数を保持するた
め、シリコンと化合物半導体の格子不整合を緩和し、低
転位密度で結晶性の良い化合物半導体単結晶層を成長さ
せることを可能にするものと思われる。また、多孔質シ
リコン層は、通常のシリコンに比べてヤング率が約10
分の1と柔軟性に富んでいるため、熱膨張係数が大きく
異なる化合物半導体の成長層を、成長温度から室温に冷
却するときにも、2つの物質量の歪みは吸収されるため
、化合物産導体成長層の転位や残留応力を大幅に低減す
ることができる。
The present inventors conducted intensive research on a method for directly growing compound semiconductors from the above-mentioned porous silicon substrate without removing the surface metamorphic layer. , by growing a thin compound semiconductor layer with the same composition as the target compound semiconductor at low temperature, and then growing the target compound semiconductor single crystal layer on top of it at high temperature using the usual method, a compound semiconductor with excellent crystallinity can be produced. succeeded in obtaining it. The thin low-temperature growth layer mentioned above is
In addition to having an amorphous or unstable crystal structure, the lattice constant of the target compound semiconductor itself is maintained, so the lattice mismatch between silicon and the compound semiconductor is alleviated, and the compound semiconductor single crystal layer has a low dislocation density and good crystallinity. This seems to make it possible to grow. In addition, the porous silicon layer has a Young's modulus of about 10 compared to normal silicon.
Because of its high flexibility, even when a growth layer of compound semiconductors with significantly different coefficients of thermal expansion is cooled from the growth temperature to room temperature, the strain in the amounts of the two substances is absorbed, resulting in a reduction in the amount of compound semiconductors. Dislocations and residual stress in the conductor growth layer can be significantly reduced.

本発明を具体的に説明すると、フッ酸等の溶液中で電流
密度0,1〜200mA/cm’の範囲で陽極化成する
ことにより、シリコン基板の表面近傍に20〜300人
の孔径を有する多孔質層を5〜300umの厚さで生成
させた後、該シリコン基板上に成長温度200〜500
℃て厚さ10〜5000人の低温成長化合物半導体層を
成長させ、次いて、成長温度を400〜8QQ℃に上げ
て通常の方法で目的とする化合物半導体単結晶層を高温
成長させるものである。
To explain the present invention specifically, by anodizing in a solution such as hydrofluoric acid at a current density of 0.1 to 200 mA/cm', porous pores having a pore diameter of 20 to 300 pores are formed near the surface of a silicon substrate. After forming a quality layer with a thickness of 5 to 300 um, a growth temperature of 200 to 500 um was applied to the silicon substrate.
A low-temperature grown compound semiconductor layer with a thickness of 10 to 5,000 layers is grown at 100 to 5000 degrees Celsius, and then the growth temperature is raised to 400 to 8QQ degrees Celsius, and the desired compound semiconductor single crystal layer is grown at high temperature using the usual method. .

なお、低温成長層の厚さ及び成長温度は、成長対象の化
合物半導体と成長法の種類により上記の範囲で適宜選択
することができる。例えば、GaAsをOMVPE法で
成長する場合は、この厚さは50〜2000人が好適で
あり、さらに、好ましくは100〜1500人とするの
がよい。また、成長温度は200〜500℃で可能であ
るが、GaAsの場合は300〜450℃が好適である
The thickness and growth temperature of the low-temperature growth layer can be appropriately selected within the above range depending on the compound semiconductor to be grown and the type of growth method. For example, when growing GaAs by the OMVPE method, the thickness is preferably 50 to 2,000 layers, and more preferably 100 to 1,500 layers. Further, the growth temperature can be 200 to 500°C, but in the case of GaAs, 300 to 450°C is suitable.

高温成長の温度は、400〜800℃の間で選択するこ
とができるか、格子不整合緩和の点から、少なくとも低
温成長の温度より高くする必要がある。
The temperature for high-temperature growth can be selected between 400 and 800° C., or needs to be at least higher than the temperature for low-temperature growth from the viewpoint of lattice mismatch relaxation.

GaAsの場合の高温成長温度は、450〜700 ’
Cが適当であり、さらに、結晶性改善の点から500〜
700 ”Cを選ぶことが望ましい。
The high temperature growth temperature for GaAs is 450-700'
C is suitable, and from the point of view of improving crystallinity, 500~
It is preferable to choose 700”C.

(実施例) シリコン基板に多孔質層を形成し、多孔質層表面の変成
層を除去することな(、その上に二段階温度成長法によ
りGaAs単結晶薄膜を成長させて、その結晶性を調べ
た。
(Example) A porous layer was formed on a silicon substrate, and a GaAs single crystal thin film was grown on it by a two-step temperature growth method (without removing the metamorphic layer on the surface of the porous layer) to improve its crystallinity. Examined.

まず、シリコン基板への多孔質層の形成は、ンリコン基
板表面をフン酸溶液に接触させて、電流密度を20m^
/cm’に調節して陽極化成により、厚さ30μmの多
孔質層を形成した。この状態では多孔質層表面に厚さ5
00人の変成層が存在していた。この多孔質シリコン基
板の上に、OMVPE法により成長温度420℃で厚さ
150人のGaAs層を成長させ、次いで、成長温度を
65(1”cまで上げて同じ方法で厚さ2.5μmのG
aAs単結晶薄膜を成長させた。
First, to form a porous layer on a silicon substrate, the surface of the silicon substrate is brought into contact with a hydrochloric acid solution, and the current density is set to 20 m^.
/cm' and anodized to form a porous layer with a thickness of 30 μm. In this state, the surface of the porous layer has a thickness of 5
There were 00 metamorphic strata. On this porous silicon substrate, a 150 μm thick GaAs layer was grown by OMVPE at a growth temperature of 420°C, and then a 2.5 μm thick layer was grown in the same manner with the growth temperature raised to 65°C. G
An aAs single crystal thin film was grown.

得られたGaAs単結晶薄膜の転位密度は、IXIO5
cm−’と大幅に低減することができた。
The dislocation density of the obtained GaAs single crystal thin film is IXIO5
cm-'.

(比較例) 従来のシリコン基板の表面に実施例と同様の方法で低温
成長による厚さ150人のGaAs層と、高温成長によ
る厚さ2.5μmのGaAs単結晶薄膜を成長させ、転
位密度を調べたところ、4XI07cm−”と大きな値
を示した。
(Comparative Example) A GaAs layer with a thickness of 150 μm by low temperature growth and a GaAs single crystal thin film with a thickness of 2.5 μm by high temperature growth were grown on the surface of a conventional silicon substrate in the same manner as in the example, and the dislocation density was reduced. When investigated, it showed a large value of 4XI07cm-''.

(発明の効果) 本発明は、上記の構成を採用することにより、変成層を
有したままの多孔質シリコン基板を用いても、格子定数
及び熱膨張係数の異なる化合物半導体を結晶性良く成長
させることができ、また、成長温度から室温に冷却して
も、化合物半導体成長単結晶層に残留する応力を低く抑
えることができ、低転位密度で結晶性の優れた化合物半
導体単結晶薄膜を提供することができるようになった。
(Effects of the Invention) By adopting the above configuration, the present invention allows compound semiconductors with different lattice constants and coefficients of thermal expansion to grow with good crystallinity even when using a porous silicon substrate that still has a metamorphic layer. Furthermore, even when the growth temperature is cooled to room temperature, residual stress in the compound semiconductor grown single crystal layer can be kept low, thereby providing a compound semiconductor single crystal thin film with low dislocation density and excellent crystallinity. Now I can do it.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は変成層を有する多孔質シリコン基板上に二段階
温度成長法により成長させたGaAs単結晶の断面図、
第2図は第1図のGaAs単結晶を成長するための温度
制御の説明図、第3図は従来のンリコン基板上に二段階
温度成長法により成長させたGaAs単結晶の断面図、
第4図は第3図のGaAs単結晶を成長するための温度
制御の説明図である。 第1 図 第2図 時 間
Figure 1 is a cross-sectional view of a GaAs single crystal grown by a two-step temperature growth method on a porous silicon substrate with a metamorphic layer;
FIG. 2 is an explanatory diagram of temperature control for growing the GaAs single crystal shown in FIG. 1, and FIG. 3 is a cross-sectional view of a GaAs single crystal grown by a two-step temperature growth method on a conventional silicon substrate.
FIG. 4 is an explanatory diagram of temperature control for growing the GaAs single crystal shown in FIG. 3. Figure 1 Figure 2 Time

Claims (2)

【特許請求の範囲】[Claims] (1)多孔質シリコン基板上に成長させた化合物半導体
において、多孔質シリコン基板の表面変成層の上に低温
成長による厚さ10〜5000Åの化合物半導体層、さ
らにその上に高温成長による化合物半導体単結晶層を有
することを特徴とする化合物半導体。
(1) In a compound semiconductor grown on a porous silicon substrate, a compound semiconductor layer with a thickness of 10 to 5000 Å grown at low temperature is formed on the surface metamorphic layer of the porous silicon substrate, and a compound semiconductor layer grown at high temperature is added on top of the compound semiconductor layer grown at a low temperature. A compound semiconductor characterized by having a crystal layer.
(2)多孔質シリコン基板上に化合物半導体を成長させ
る製造方法において、陽極化成法によりシリコン単結晶
を多孔質化したシリコン基板の表面変成層の上に、20
0〜500℃の低温成長で厚さ10〜5000Åの化合
物半導体層を成長させ、該層の上に通常の成長法で化合
物半導体単結晶層を高温成長させることを特徴とする化
合物半導体の製造方法。
(2) In a manufacturing method of growing a compound semiconductor on a porous silicon substrate, 20%
A method for manufacturing a compound semiconductor, comprising growing a compound semiconductor layer with a thickness of 10 to 5000 Å by low-temperature growth at 0 to 500°C, and growing a compound semiconductor single crystal layer on the layer at high temperature by a normal growth method. .
JP11059590A 1990-04-27 1990-04-27 Compound semiconductor and method for growing the same Pending JPH0412097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11059590A JPH0412097A (en) 1990-04-27 1990-04-27 Compound semiconductor and method for growing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11059590A JPH0412097A (en) 1990-04-27 1990-04-27 Compound semiconductor and method for growing the same

Publications (1)

Publication Number Publication Date
JPH0412097A true JPH0412097A (en) 1992-01-16

Family

ID=14539840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11059590A Pending JPH0412097A (en) 1990-04-27 1990-04-27 Compound semiconductor and method for growing the same

Country Status (1)

Country Link
JP (1) JPH0412097A (en)

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