JPH04140984A - Still video camera - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still video camera (electronic still camera) that records image information obtained by a solid-state image sensor as a still image. [Prior art] Figure 3 is a block diagram of a still video camera.
01 is a lens, 202 is an aperture, 203 is a shutter, 20
4 is a shutter and aperture drive circuit. 101 is a solid-state image sensor, which is a full-frame CCD that will be explained later.
(charge-coupled device). 205 is a solid-state image sensor driving circuit, and 206 is a clock generation circuit. 207 is a signal processing circuit that processes the output obtained from the solid-state image sensor to obtain a luminance signal. 2
08 is an FM modulation circuit that performs FM modulation on the luminance signal. 2
09 is a recording amplifier that amplifies the FM modulated signal so that it can be magnetically recorded. 210 is a magnetic head, and 211 is a magnetic sheet which is a recording medium. 212 is a motor that rotates the magnetic sheet 211, 213
214 is a motor servo circuit, and 214 is a system control circuit that controls the operation of the entire system. 215 and 216 are shirt release switches; when pressed halfway, switch 215 is released; when pressed fully, switches 215 and 2 are released.
16 are both turned on. A series of still image capturing scenes is performed in synchronization with the operation of turning on this switch. FIG. 4 is a diagram showing an imaging sea fence of a still video camera. In FIG. 4, unnecessary charges from the solid-state image sensor 101 are swept away by the following operation between time T1 and time T2. Shutter 20 between T2 and T3
3 is opened, the solid-state image sensor 101 is exposed, and signal charges are accumulated. The shutter is closed at T3, and the charges accumulated during the exposure period between T3 and T4 are read out and recorded on the magnetic sheet 211. FIG. 5 is a diagram showing the configuration of the solid-state image sensor 101. The solid-state image sensor shown in Figure 5 is a full-frame type CC
It is called D and is used in conjunction with a shutter in still video cameras. In FIG. 5, reference numeral 1 indicates a light receiving section composed of a vertical transfer CCD, 2 a horizontal CCD, and 3 an output amplifier. The light receiving section 1 is provided with a vertical transfer electrode ΦPI and an electrode ΦAB used for anti-blooming operation and vertical transfer operation, which will be explained later. The horizontal CCD 2 is provided with a horizontal transfer electrode ΦS. Reference numeral 13 refers to an optical black section (hereinafter abbreviated as section 08), which is a light shielding layer provided by attaching an aluminum layer or the like on top of the CCD. Since the pixel output of the 08 section is only the dark voltage component, the signal of the 08 section is used as a black reference level during signal processing. FIG. 6 is a diagram showing the structure of the solid-state image sensor shown in FIG. 5 as a CCD. The structure shown in Fig. 6 is called a virtual phase structure, and details are given in the literature (IEEE, Tr.
ans, ED, Vol, ED-28ppp 483-4
89 May 1981>. A brief explanation will be given here. FIG. 6 shows the cross-sectional structure and potential distribution of the horizontal CCD 2 of the virtual phase CCD. The CCD is formed on a p-type silicon substrate 10, and is provided with a horizontal transfer electrode 4 via a silicon oxide film 11. 5 is a p-type ion implantation layer, and 6 is an n-type ion implantation layer. These create a fixed step-like potential distribution underneath, as if there were a virtual electrode. The shallower potential is called a hard barrier, and the deeper potential is called a partial well. 7 is an n-type ion implantation layer for forming a stepped potential distribution. A step-like potential distribution is formed by the stiffness, and the step-like potential distribution rises and falls depending on the potential applied to the horizontal transfer electrode 4. The shallower potential is called a clocked barrier, and the deeper potential is called a clocked well. When the clock becomes VH, the potentials of the clocked barrier and clock dwell are deeper than those of the virtual barrier and the virtual well, whereas when the clock becomes VL, the potentials of the clocked barrier and clock dwell become shallower. Charge 8 is transferred by switching the clock voltage between high (Hi) and low (Low) in this manner. Charge transfer is also performed in the light receiving section 1 according to the same principle as in the horizontal CCD 2. FIG. 7 is a diagram showing a cross-sectional structure (a cross-section in the X direction in FIG. 5) of the light receiving section 1, which is provided with an anti-blooming gate section and an anti-blooming gate electrode 9 for suppressing blooming. This is different from Fig. 6. No two layers are provided under the anti-blooming gate electrode. Anti-blooming behavior in such structures is discussed in the literature (IEEE, Tr.
ans. ED-30No, 8 August 1983 p94
1) is described in detail, so I will only give a brief explanation here. The anti-blooming gate uses the principle of a charge pump to recombine excess electrons with holes and erase them. FIG. 8 is a diagram showing the potential distribution under the anti-blooming gate, with the horizontal axis in the depth direction. An interface trap 12 exists at the interface between the silicon oxide film 11 and the substrate 10. When a positive voltage VABH is applied to the anti-blooming gate electrode 9, excess charge overflows from the potential well and is captured by the interface trap 12. Next, when a negative voltage VABL is applied to the anti-blooming electrode 9,
Holes are attracted from the substrate and recombine with electrons trapped in the interface trap. By applying positive and negative clocks to the anti-blooming electrode 9 during exposure in this manner, excess charges are erased via the interface trap. FIG. 9 is a timing chart illustrating drive timing in the still video camera using the solid-state image pickup device described above. FIG. 9 corresponds to FIG. 4. Unnecessary charge removal period T,
-T, the vertical transfer pulse and the anti-blooming gate pulse are driven in two phases, and the horizontal transfer pulse is driven at high speed to remove unnecessary charges. During the exposure period, only the anti-blooming gate is driven to remove excess charges. In the read recording period T3 to T4, one stage of charge is vertically transferred in one horizontal period, and the signal charge is transferred to the output amplifier 3 by the horizontal CCD 2, converted into a voltage, and read out. FIG. 10 is a diagram showing a cross-sectional structure in the Y direction in FIG. 5 in order to explain the generation of hot hole electrons, which are undesirable noise charges. In Figure 10,
The P+ layer 14 is called a channel stop region and is a layer that electrically isolates pixels. That is, the area surrounded by the channel stop 14 in FIG. 10 becomes one pixel. FIG. 10(a) explains the hole accumulation operation when a negative voltage is applied to the anti-blooming electrode ΦAB. When a negative voltage is applied to ΦAB, holes, which are positive charges, are accumulated at the interface between silicon and silicon oxide film from the substrate through the channel stop 14. On the contrary, the 10th
As shown in Figure (b), the hole returns to the channel stop at the same time as the voltage applied to ΦAB changes to positive. At that time, the holes are accelerated by the electric field and collide with the crystal lattice, or the energy generated at that time creates bare electrons and holes. These electrons are called hot hole electrons, and are accumulated together with signal charges in the charge well of the CCD. These electrons are undesirable dark charges generated by causes other than heat, and are proportional to the number of pulses applied to the anti-blooming gate regardless of temperature. FIG. 11 is a diagram showing the output of one horizontal line of the solid-state image sensor 101 in the dark. The empty readout level occurs because the number of horizontal CCDs 2 is greater than the number of horizontal pixels of the light receiving section 1. Since the horizontal CCD is cleared every line at high speed, there is almost no accumulation of dark charge and the output is almost zero. Next, the dark charges accumulated in the photosensitive area are output as the black level of the photosensitive area. Next, the dark charge level of 08 parts is output. A problem that often arises here is that there is a level difference between the dark voltage level of the photosensitive part, that is, the part that is not shielded from aluminum light, and the dark voltage level of the part 08, that is, the part that is shielded from aluminum light. The cause of this dark voltage step difference is not yet clear, but it is speculated that it is due to some kind of difference in the crystalline state of the interface between silicon and silicon oxide film between parts with and without an aluminum layer. FIG. 12 is a diagram illustrating the drive timing of the anti-blooming gate when the shutter speed is long and short in the conventional example. Figure 12 (a) shows the shutter opening/closing timing during long exposure, (b) shows the drive timing of the anti-blooming gate pulse during long exposure, and (c) shows the timing of driving the anti-blooming gate pulse during long exposure.
(d) shows the shutter opening/closing timing during short-second exposure, and (d) shows the drive timing of the anti-blooming gate pulse during short-second exposure. In long-time exposure, at time t1 after the dark charge has been swept out, driving of an anti-blooming gate pulse is started prior to opening the shutter, and at t2, the shutter is opened and exposure is started. At t5, the shutter is closed and the exposure is completed. n anti-blooming pulses are applied between t5 and t6. This is to prevent blooming during transfer by ensuring that the charge in the light receiving section 1 is less than the amount of charge that can be reliably transferred. Here, it is assumed that m pulses are applied between tl and t5. Next 1. Reading of accumulated charges starts from . In short time exposure, driving of an anti-blooming gate pulse is started at time 1 prior to shutter opening, and at t2 the shutter is opened and exposure is started. At t3, the shutter closes and the exposure ends. Between t3 and t4, n pulses are applied for the aforementioned purpose. A pulse is applied to m- between t and t3. That is, during long exposure, more anti-blooming pulses are applied than during short exposure. If the number of anti-blooming pulses applied varies depending on the exposure time, the amount of hot hole electrons generated will also vary depending on the number of pulses. [Problems to be Solved by the Invention] There is no problem if there is no dark voltage level difference between the photosensitive area and the 08 area described above, but if the element has a large dark voltage level difference, a problem occurs in the image. That is, since the image pickup signal processing circuit 207 uses the voltage of the 08 section as the black reference level, a problem arises in which the black level changes such that the black becomes brighter and stands out at long seconds and becomes darker and sinks at short seconds. In black-and-white signal processing, only the black level changes, but when color signal processing is performed by attaching a color filter to the solid-state image sensor 101, a phenomenon called black balance fluctuation occurs in which the black color changes, and the image is further deteriorated. The negative impact on Furthermore, in general, the level difference in dark voltage is highly dependent on variations in the semiconductor process, and there are large variations from loft to loft, and if selected, the yield of solid-state imaging devices will be extremely reduced. The present invention was made in order to solve such problems, and even if there is a dark voltage level difference between the photosensitive area and the 08 area of the solid-state image sensor, it is possible to create a still image in which the black level does not change due to changes in exposure time. The purpose is to provide video cameras. (Means for Solving the Problems) The present invention focuses on the characteristic that the dominant dark voltage source of a CCD is hot hole electrons, and that the generated dark voltage is proportional to the number of anti-blooming pulses regardless of temperature. In order to keep the dark voltage level constant even when using a solid-state imaging device with a dark voltage level difference, a means is used to control the number of anti-blooming pulses to always be substantially constant regardless of the exposure time. Specifically, the still video camera is configured as shown in (1) to (4) below. (1) A still video camera equipped with a solid-state imaging device having an anti-blooming electrode, which is exposed to light for a required period of time after the dark charge of the solid-state imaging device is swept out, and after the exposure is completed, the accumulated charge is read and recorded, and the dark charge is swept out. A still video camera comprising pulse number control means for controlling the number of pulses applied to the anti-blooming electrode to be substantially constant regardless of the exposure time during the period from the end to the start of readout. (2) u In the still video camera in ('), the pulse number control means changes the anti-blooming pulse frequency in accordance with the exposure time during the period from the end of dark charge sweeping to the shutter closing. (3) In the still video camera according to (1) above, the pulse number control means changes the number of anti-blooming pulses in accordance with the exposure time during the period from shutter closing to reading out the accumulated charge. (4) In (]) above, the variation in the number of pulses applied to the anti-pluming electrode is 80% regardless of the exposure time.
A still video camera with less than 00 pulses. (Function) With the configurations (1) to (4) above, the black level of the image signal does not vary even if the exposure time changes. (Embodiment) FIG. 1 is a diagram showing an anti-blooming pulse of a "still video camera" which is an embodiment of the present invention. The overall configuration is as shown in Figure 3, and the system control circuit 21
The operation of 4 is different. That is, during short exposure, t+, t3
The frequency of the anti-blooming pulse between 1 and 2 is made higher than that during long exposure, and the number of pulses is equal to the number m of pulses in the period t1 to t6 during long exposure. The system control circuit 214 in FIG. 3 is operated so that the voltage is applied during the -13 period. The system control circuit 214 is composed of a microcomputer, and the clock generation circuit 206 generates an anti-blooming pulse according to a command from the system control circuit 214. therefore,
The frequency and application period of the anti-blooming pulse are controlled by a program in system control circuit 214. The clock generation circuit 206 receives 2-bit data from the system control circuit 214 to (1) fix to low, (2) 250 KHz. It is controlled in four states: (3) 500K) Iz and (4) I MHz. Therefore, during long exposure, 1,
~ Set the t5 period to 500KH2, and during short exposure,
If the t1-t3 period becomes 1/2 of the t1-t5 period, 1. By setting the anti-blooming pulse frequency in the ~t3 period to IMH2, the number of anti-blooming pulses becomes equal during long-second exposure and short-second exposure, and the step difference in dark voltage becomes equal.
The problem that the black level varies depending on the exposure time no longer occurs. FIG. 2 is a diagram showing a multi-bloom mink pulse in a second embodiment of the present invention. The difference from Fig. 1 is that the frequency of the anti-blooming pulse during the period t1 to t3 of the short exposure is not changed, but the pulse application period after t3 is extended to keep the total number of anti-blooming pulses constant. That's true. System control circuit 20
The information provided by 4 is the setting data of a finite pulse frequency and the period for which the data is provided, and pulses are not counted. Therefore, in this embodiment, it is difficult to completely match the number of anti-blooming pulses in any case. However, regardless of the shutter speed, it is sufficient to keep the variation in the number of anti-blooming pulses within a predetermined range determined from the variation in the solid-state image sensor 101, the gain of the image signal processing circuit 207, and the allowable range of black level variation. It is possible. If you want to match the number of pulses even more precisely,
Although not shown, is it easy to add a circuit that counts anti-blooming pulses and prohibits anti-blooming pulses when a predetermined number of pulses is reached?Normally, this is not necessary, and the program of the system control circuit 214 can be changed. It is possible to obtain sufficient performance. According to experimental results, sufficient performance could be obtained by suppressing the variation in the number of anti-blooming pulses to 8000 pulses or less under each exposure condition. If a variation of 8000 pulses is allowed, it is possible to suppress the variation in the number of anti-blooming pulses using only a control program. In addition, the present invention has 1
Needless to say, the present invention is not limited to phase-driven CCDs. [Effects of the Invention] As explained above, according to the present invention, the number of anti-blooming pulses is always controlled to be within a predetermined variation range regardless of the exposure time. Even if there is a dark voltage level difference between 0 and 08 parts, the level difference is always constant, and it is possible to prevent variations in the black level depending on the exposure time.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an anti-blooming pulse according to a first embodiment of the present invention, FIG. 2 is a diagram showing an anti-blooming pulse according to a second embodiment of the present invention, and FIG. 3 is a block diagram of a still video camera. Figure 4 shows the imaging sea fence of the still video camera, Figure 5 shows the configuration of the full-frame CCD, Figure 6 shows the structure of the CCD shown in Figure 5, and Figure 7 shows the structure of the CCD shown in Figure 5. Figure 5 shows the structure of the light receiving section 1 of the CCD, Figure 8 shows the potential distribution under the anti-blooming gate, Figure 9 is a timing chart explaining the driving timing of the CCD, and Figure 10 shows the hot FIG. 11 is a diagram illustrating the generation of hole electrons, FIG. 11 is a diagram illustrating the dark voltage level difference between the photosensitive area and the 08 area, and FIG. 12 is a diagram illustrating a conventional anti-blooming pulse. 101---One solid-state image sensor 205---One solid-state image sensor drive circuit 206...
... Clock generation circuit 214 - ... System control circuit

Claims (4)

[Claims] (1) A still video camera equipped with a solid-state imaging device having an anti-blooming electrode, which is exposed to light for a required period of time after the dark charge of the solid-state imaging device is swept out, and after the exposure is completed, the accumulated charge is read and recorded, and the dark charge is swept out. A still video camera characterized by comprising a pulse number control means for controlling the number of pulses applied to the anti-blooming electrode to be substantially constant regardless of the exposure time during the period from the end to the start of readout. (2) The still video camera according to claim 1, wherein the pulse number control means changes the anti-blooming pulse frequency in accordance with the exposure time during the period from the end of sweeping out the dark charges to the closing of the shutter. . (3) The still video camera according to claim 1, wherein the pulse number control means changes the number of anti-blooming pulses in accordance with the exposure time during a period from closing the shutter to reading out the accumulated charge. (4) The still video camera according to claim 1, wherein the variation in the number of pulses applied to the anti-blooming electrode is 8000 pulses or less regardless of the exposure time.