JPH04142139A - Monitoring device - Google Patents
Monitoring deviceInfo
- Publication number
- JPH04142139A JPH04142139A JP26423290A JP26423290A JPH04142139A JP H04142139 A JPH04142139 A JP H04142139A JP 26423290 A JP26423290 A JP 26423290A JP 26423290 A JP26423290 A JP 26423290A JP H04142139 A JPH04142139 A JP H04142139A
- Authority
- JP
- Japan
- Prior art keywords
- logical operation
- circuit
- signal
- reception means
- signal transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、少なくとも2つの信号伝送線を用いた平衡型
通信システムの故障を監視する監視装置に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a monitoring device for monitoring failures in a balanced communication system using at least two signal transmission lines.
(従来の技術)
従来、この種の監視装置を用いた平衡型通信システムは
、2つの信号伝送線と、上記信号伝送線に接続して信号
の送受信を行う複数のノードとから構成されており、自
動車内のデータ伝送に用いられている。各ノードは、上
記信号の送受を行う通信回路に一方の信号伝送線が故障
しても他方の信号伝送線により通信が可能なように、受
信スレッシュレベルの異なる2つの受信回路(コンパレ
ータ等)を設け、一方の受信回路は通常の受信回路と同
じ低いスレッシュレベルを有し、他方の受信回路は伝送
が可能な潜在的な故障(例えば、信号伝送線のショート
等)に対しては正常に受信できない高いスレッシュレベ
ルを有し、これら両受倍回路の出力を選択回路を通して
選択的に受信して、信号伝送線の故障を監視していた。(Prior Art) Conventionally, a balanced communication system using this type of monitoring device is composed of two signal transmission lines and a plurality of nodes that are connected to the signal transmission lines and transmit and receive signals. , used for data transmission in automobiles. Each node is equipped with two receiving circuits (comparators, etc.) with different reception threshold levels so that even if one signal transmission line fails, communication can be performed using the other signal transmission line. One receiving circuit has the same low threshold level as a normal receiving circuit, and the other receiving circuit can receive normal reception against potential failures (for example, short circuits in signal transmission lines). The outputs of these duplexers were selectively received through a selection circuit to monitor failures in the signal transmission line.
すなわち、監視装置は、正常時には、通信回路に設けた
2つの受信回路のうち、受信スレッシュレベルの低い方
の受信回路を使用して信号の送受信を行い、ある一定時
間間隔、又は一定条件が成立した場合に故障を監視し、
監視時には、受信スレッシュレベルの高い方の受信回路
を使用して受信を行い、上記潜在的故障を監視していた
。In other words, under normal conditions, the monitoring device transmits and receives signals using the receiving circuit with the lower reception threshold level among the two receiving circuits provided in the communication circuit, and when a certain period of time or a certain condition is met. monitor for failures if
During monitoring, the receiving circuit with a higher reception threshold level is used to perform reception, and the potential failure is monitored.
(発明が解決しようとする課題)
ところが、上記監視装置では、故障監視はある一定時間
間隔、又は一定条件が成立した場合にのみ行うので、例
えば自動車のエンジンコンピュータのように、故障をた
だちに検出したいものでも、瞬時にその故障の検出はで
きず、故障検出の信頼性に欠けるという問題点があった
。(Problem to be Solved by the Invention) However, in the above-mentioned monitoring device, failure monitoring is performed only at a certain time interval or when a certain condition is met. However, there was a problem in that failures could not be detected instantaneously, and failure detection was unreliable.
本発明は、上記問題点に鑑みなされたものであって、故
障が生じた時に瞬時に異常を検出することができる監視
装置を提供することを目的とする。The present invention has been made in view of the above problems, and an object of the present invention is to provide a monitoring device that can instantly detect an abnormality when a failure occurs.
(課題を解決するための手段)
上記目的を達成するために、本発明では、少なくとも2
つの信号伝送線と接続し、一方の前記信号伝送線が通信
不良になると他方の前記信号伝送線を介してデータの通
信を行う平衡型通信システムにおける通信回路において
、それぞれ異なる差動振幅の閾値が設定され、当該各閾
値と前記各信号伝送線から受信した信号の差動振幅を比
較する第1及び第2の受信手段と、該第1及び第2の受
信手段からの比較結果を取り込み、該結果に応じた論理
演算を行う論理演算手段とを具えた監視装置が提供され
る。(Means for Solving the Problem) In order to achieve the above object, the present invention provides at least two
In a communication circuit in a balanced communication system that is connected to two signal transmission lines, and when one of the signal transmission lines suffers a communication failure, data is communicated via the other signal transmission line, each having different differential amplitude thresholds. first and second receiving means that compare the differential amplitudes of the signals received from the respective signal transmission lines with the respective threshold values set and the comparison results from the first and second receiving means are taken in; A monitoring device is provided that includes a logical operation means that performs a logical operation according to a result.
(作用)
通常時には、第1及び第2の受信手段からの出力は、同
じであるが、異常が発生した場合に入力する信号の差動
振幅が小さくなり、閾値の高い受信手段では信号が検出
できなくなるので、その出力が閾値の低い受信手段から
のものと異なり、上記出力を論理演算手段で論理演算す
ることにより、異常検出を行う。(Function) Normally, the outputs from the first and second receiving means are the same, but when an abnormality occurs, the differential amplitude of the input signal becomes smaller, and the receiving means with a higher threshold detects the signal. Therefore, the output is different from that from the receiving means with a low threshold value, and abnormality detection is performed by performing a logical operation on the output by the logical operation means.
従って、監視装置は、第1及び第2の受信手段からの出
力を論理演算することで、リアルタイムに異常を検出す
ることができる。Therefore, the monitoring device can detect abnormalities in real time by performing logical operations on the outputs from the first and second receiving means.
(実施例)
以下、本発明の実施例を第1図乃至第2図の図面に基づ
き詳細に説明する。(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings of FIGS. 1 and 2.
第1図は、本発明に係る監視装置の構成を示す構成ブロ
ック図である。図において、監視装置10は、信号伝送
線であるデータバスA、BとACカップリングのための
コンデンサ01〜C4を介して接続されているコンパレ
ータ等からなる受信回路11.12と、該受信回路11
.12の出力を論理演算する排他的論理和(以下、「E
XOR」という。)回路13と、EXOR回路13から
の出力を取り込むフィルタロ路14と、受信回路11か
らの出力データを取り込み、データの送受信を制御する
通信制御回路15と、通信制御回路15を制御する制御
回路(CPU)16とから構成されている。FIG. 1 is a block diagram showing the configuration of a monitoring device according to the present invention. In the figure, a monitoring device 10 includes receiving circuits 11 and 12, which are composed of comparators, etc., connected to data buses A and B, which are signal transmission lines, and capacitors 01 to C4 for AC coupling, and the receiving circuit 11
.. Exclusive OR (hereinafter referred to as “E
It is called "XOR". ) circuit 13, a filter path 14 that takes in the output from the EXOR circuit 13, a communication control circuit 15 that takes in the output data from the reception circuit 11 and controls data transmission and reception, and a control circuit that controls the communication control circuit 15 ( CPU) 16.
受信回路11.12は、データバスAXBから入力する
信号の出力レベル(振幅のピーク電圧VAVB )を減
算して差動振幅を求め、さらにその結果を予め設定され
ている差動受信スレッシュレベルと比較し、対応するデ
ジタル信号に変換して出力している。受信回路11は、
通信システムの故障により、信号の差動振幅が半分にな
っても信号の受信ができるよう、に、差動受信スレッシ
ュレベルVSLが第2図(a)の点線で示すように、低
く設定されている。また、受信回路12は、通信システ
ムに故障かなく差動振幅が大きい時にはデータバスから
入力した信号の差動振幅を検出できるが、故障が発生し
て信号の差動振幅が小さい時には上記入力した信号の差
動振幅を検出できないように、差動受信スレッシュレベ
ルVSOが第2図(a)の−点鎖線で示すように、受信
回路11の差動受信スレッシュレベルVSLに比べて高
く設定されている。The receiving circuit 11.12 subtracts the output level (amplitude peak voltage VAVB) of the signal input from the data bus AXB to obtain a differential amplitude, and further compares the result with a preset differential reception threshold level. Then, it is converted to a corresponding digital signal and output. The receiving circuit 11 is
The differential reception threshold level VSL is set low as shown by the dotted line in Figure 2(a) so that the signal can be received even if the differential amplitude of the signal is halved due to a failure in the communication system. There is. Furthermore, when there is no failure in the communication system and the differential amplitude is large, the receiving circuit 12 can detect the differential amplitude of the signal input from the data bus, but when a failure occurs and the differential amplitude of the signal is small, the receiving circuit 12 can detect the differential amplitude of the signal input from the data bus. In order to prevent the differential amplitude of the signal from being detected, the differential reception threshold level VSO is set higher than the differential reception threshold level VSL of the receiving circuit 11, as shown by the dashed line in FIG. 2(a). There is.
EXOR回路13は、受信回路11.12から入力する
デジタル信号に基づき論理演算を行っている。例えば第
2図(b) 、(c)に示すように、受信回路11と1
2からともに“1”レベルのデジタル信号20.21が
出力される場合、又はともに“0ルベルのデジタル信号
が出力される場合には、EXOR回路13からの出力信
号は、第2図(d)に示すように、“0”レベルになり
、受信回路11と12のいずれかからのみ、′1”レベ
ルのデジタル信号22が出力される場合には、EXOR
回路13からの出力信号は、“1″レベルになる。The EXOR circuit 13 performs logical operations based on digital signals input from the receiving circuits 11.12. For example, as shown in FIGS. 2(b) and 2(c), receiving circuits 11 and 1
When the digital signals 20 and 21 are both output from the EXOR circuit 20 and 21 at the "1" level, or when the digital signals 20 and 21 are both at the "0" level, the output signal from the EXOR circuit 13 is as shown in FIG. 2(d). As shown in FIG.
The output signal from the circuit 13 becomes "1" level.
フィルタ回路14は、所定の周波数領域(EXOR回路
13からの出力信号に相当する周波数領域)の信号を通
過させる帯域フィルタ等から構成されている。The filter circuit 14 is composed of a bandpass filter or the like that passes signals in a predetermined frequency range (frequency range corresponding to the output signal from the EXOR circuit 13).
通信制御回路15は、受信回路11.12及び図示しな
い送信回路を制御してデータバスA、 Bとの信号の授
受を行っている。The communication control circuit 15 controls the receiving circuits 11, 12 and a transmitting circuit (not shown) to exchange signals with the data buses A and B.
制御回路16は、通信制御回路15を制御してデータの
入出力を行うと共に、フィルタ回路14からの出力を取
り込んで、データバスに故障が発生したかどうか監視を
行っている。The control circuit 16 controls the communication control circuit 15 to input and output data, and also takes in the output from the filter circuit 14 to monitor whether a failure has occurred in the data bus.
次に、第1図に示した監視装置のデータバス監視動作に
ついて説明する。Next, the data bus monitoring operation of the monitoring device shown in FIG. 1 will be explained.
データバスA、Bに故障がない正常時の場合には、上記
データバスA、Bから受信回路11.12に入力した信
号の差動振幅は、それぞれ第2図(a)に示す正常時の
波形振幅になるので、受信回路11゜12は共に上記波
形を検出して、第2図(b) 、(c)に示すl”レベ
ルの波形のデジタル信号20゜21を出力する。EXO
R回路13は、上記受信回路11.12からのデジタル
信号を取り込むと、上記信号に応じた論理演算を行う。When the data buses A and B are in normal operation with no failure, the differential amplitudes of the signals input from the data buses A and B to the receiving circuit 11 and 12 are as shown in Fig. 2 (a). Since the amplitude of the waveform is the same, the receiving circuits 11 and 12 both detect the above waveform and output a digital signal 20 and 21 having an l'' level waveform as shown in FIGS. 2(b) and 2(c).EXO
When the R circuit 13 takes in the digital signal from the receiving circuit 11.12, it performs a logical operation according to the signal.
この場合、取り込まれた信号は共に、′l”レベルの波
形なので、EXOR回路13は、第2図(d)に示すよ
うに、“0”レベルの信号を、フィルタ回路14を介し
て制御回路16に出力する。制御回路16は、上記“O
″レベル信号を取り込むと、データバスには故障が発生
していない、正常時であると判断する。In this case, since both of the captured signals have waveforms at the 'l' level, the EXOR circuit 13 passes the '0' level signals to the control circuit through the filter circuit 14, as shown in FIG. 2(d). 16.The control circuit 16 outputs the above “O
``When the level signal is taken in, it is determined that there is no failure on the data bus and that it is normal.
また、データバスA、Bに故障が発生した異常時の場合
には、上記データバスA、Bから受信回路11.12に
入力した信号の差動振幅は、それぞれ第2図(a)に示
す正常時の波形振幅に比べてほぼ半分の異常時の波形振
幅になるので、受信回路11では上記波形を検出して、
第2図(b)に示す“1”レベルの波形のデジタル信号
22を出力するが、受信回路12では上記波形を検出で
きず、第2図(C)に示す“0”レベルの信号を出力す
る。In addition, in the case of an abnormal situation where a failure occurs in the data buses A and B, the differential amplitudes of the signals input from the data buses A and B to the receiving circuits 11 and 12 are shown in FIG. 2(a), respectively. Since the waveform amplitude at abnormal times is approximately half of the waveform amplitude at normal times, the receiving circuit 11 detects the above waveform,
A digital signal 22 with a "1" level waveform shown in FIG. 2(b) is output, but the receiving circuit 12 cannot detect the above waveform and outputs a "0" level signal shown in FIG. 2(C). do.
EXOR回路13は、上記受信回路11.12からのデ
ジタル信号を取り込むと、上記信号に応じた論理演算を
行う。この場合、取り込まれた信号は“1”と“0”レ
ベルの波形なので、EXOR回路13は、第2図(d)
に示すように、“ビレベルの信号を、フィルタ回路14
を介して制御回路16にaカする。制御回路16は、故
障発生を示す上記“ビレベルの信号を取り込むと、デー
タバスに故障が生じた、異常時であると判断する。When the EXOR circuit 13 takes in the digital signal from the receiving circuit 11.12, it performs a logical operation according to the signal. In this case, since the captured signal has a waveform of "1" and "0" levels, the EXOR circuit 13
As shown in FIG.
A is connected to the control circuit 16 via the control circuit 16. When the control circuit 16 receives the above-mentioned "beam level" signal indicating the occurrence of a failure, it determines that a failure has occurred in the data bus and that an abnormality is occurring.
従って、本実施例では、両データバスから入力した信号
を異なる差動受信スレッシュレベルで検出し、該検8し
た信号をEXOR回路で論理演算し、異常時の差動振幅
が小さくなったものがある時だけ、異常検出を示す信号
を出力するようにしているので、制御回路16は、デー
タバスに故障が生じたのと同時に、データバスの異常を
検知することができる。Therefore, in this embodiment, the signals inputted from both data buses are detected at different differential reception threshold levels, and the detected signals are subjected to a logical operation using an EXOR circuit, and the differential amplitude at the time of abnormality is reduced. Since a signal indicating abnormality detection is output only at certain times, the control circuit 16 can detect an abnormality in the data bus at the same time as a failure occurs in the data bus.
(発明の効果)
以上説明したように、本発明では、少なくとも2つの信
号伝送線と接続し、一方の前記信号伝送4゜
線が通信不良になると他方の前記信号伝送線を介してデ
ータの通信を行う平衡型通信システムにおける通信回路
において、それぞれ異なる差動振幅の閾値が設定され、
当該各閾値と前記各信号伝送線から受信した信号の差動
振幅を比較する第1及び第2の受信手段と、該第1及び
第2の受信手段からの比較結果を取り込み、該結果に応
じた論理演算を行う論理演算手段とを具えたので、信号
伝送線に故障が生じた時に瞬時に異常を検出することが
でき、これにより故障検出の信頼性を高めることができ
る。(Effects of the Invention) As explained above, in the present invention, connection is made with at least two signal transmission lines, and when one of the signal transmission lines has a communication failure, data communication is performed via the other signal transmission line. Different differential amplitude thresholds are set in communication circuits in balanced communication systems that perform
first and second receiving means that compare the differential amplitude of the signals received from each of the signal transmission lines with the respective thresholds; and receiving the comparison results from the first and second receiving means and responding to the results. Since the present invention is equipped with a logical calculation means for performing logical calculations, it is possible to instantly detect an abnormality when a failure occurs in the signal transmission line, thereby increasing the reliability of failure detection.
第1図は、本発明に係る監視装置の構成を示す構成ブロ
ック図、第2図は第1図に示した監視装置の各部での信
号波形を示す波形図である。
11.12・・・受信回路、13・・・EXOR回路、
14・・・フィルタ回路、15・・・通信制御回路、1
6・・・制御回路、A、 B・・・信号伝送線(データ
バス)。FIG. 1 is a block diagram showing the configuration of a monitoring device according to the present invention, and FIG. 2 is a waveform diagram showing signal waveforms at various parts of the monitoring device shown in FIG. 11.12...Reception circuit, 13...EXOR circuit,
14... Filter circuit, 15... Communication control circuit, 1
6...Control circuit, A, B...Signal transmission line (data bus).
Claims (2)
記信号伝送線が通信不良になると他方の前記信号伝送線
を介してデータの通信を行う平衡型通信システムにおけ
る通信回路において、それぞれ異なる差動振幅の閾値が
設定され、当該各閾値と前記各信号伝送線から受信した
信号の差動振幅を比較する第1及び第2の受信手段と、
該第1及び第2の受信手段からの比較結果を取り込み、
該結果に応じた論理演算を行う論理演算手段とを具えた
ことを特徴とする監視装置。(1) There are different differences between communication circuits in a balanced communication system that is connected to at least two signal transmission lines, and when one of the signal transmission lines becomes defective, data is communicated via the other signal transmission line. first and second receiving means, each of which has a dynamic amplitude threshold set, and which compares each threshold with the differential amplitude of the signal received from each of the signal transmission lines;
taking in the comparison results from the first and second receiving means;
A monitoring device comprising: logical operation means for performing a logical operation according to the result.
ことを特徴とする請求項1記載の監視装置。(2) The monitoring device according to claim 1, wherein the logical operation means comprises an exclusive OR circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26423290A JPH04142139A (en) | 1990-10-02 | 1990-10-02 | Monitoring device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26423290A JPH04142139A (en) | 1990-10-02 | 1990-10-02 | Monitoring device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04142139A true JPH04142139A (en) | 1992-05-15 |
Family
ID=17400330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26423290A Pending JPH04142139A (en) | 1990-10-02 | 1990-10-02 | Monitoring device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04142139A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000354072A (en) * | 1999-04-23 | 2000-12-19 | Daimlerchrysler Ag | Circuit device provided with reducing circuit capable of reducing interference longitudinal voltage on two- wire line |
| JP2017188865A (en) * | 2016-04-05 | 2017-10-12 | エルエス産電株式会社Lsis Co., Ltd. | PLC communication system |
| JP2018160865A (en) * | 2017-03-24 | 2018-10-11 | シナプティクス・ジャパン合同会社 | Digital signal transmission apparatus, clock signal transmission apparatus, and reception circuit |
| JP2022153060A (en) * | 2021-03-29 | 2022-10-12 | アズビル株式会社 | Abnormality detection device and sensor system |
-
1990
- 1990-10-02 JP JP26423290A patent/JPH04142139A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000354072A (en) * | 1999-04-23 | 2000-12-19 | Daimlerchrysler Ag | Circuit device provided with reducing circuit capable of reducing interference longitudinal voltage on two- wire line |
| JP2017188865A (en) * | 2016-04-05 | 2017-10-12 | エルエス産電株式会社Lsis Co., Ltd. | PLC communication system |
| US10110432B2 (en) | 2016-04-05 | 2018-10-23 | Lsis Co., Ltd. | Telecommunications system for programmable logic controller |
| JP2018160865A (en) * | 2017-03-24 | 2018-10-11 | シナプティクス・ジャパン合同会社 | Digital signal transmission apparatus, clock signal transmission apparatus, and reception circuit |
| JP2022153060A (en) * | 2021-03-29 | 2022-10-12 | アズビル株式会社 | Abnormality detection device and sensor system |
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