JPH04142794A - Ceramic multilayer wiring board - Google Patents
Ceramic multilayer wiring boardInfo
- Publication number
- JPH04142794A JPH04142794A JP26674990A JP26674990A JPH04142794A JP H04142794 A JPH04142794 A JP H04142794A JP 26674990 A JP26674990 A JP 26674990A JP 26674990 A JP26674990 A JP 26674990A JP H04142794 A JPH04142794 A JP H04142794A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- ceramic multilayer
- multilayer wiring
- grooves
- organic resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 32
- 229920001721 polyimide Polymers 0.000 claims abstract description 29
- 239000004642 Polyimide Substances 0.000 claims abstract description 28
- 239000011347 resin Substances 0.000 claims abstract description 23
- 229920005989 resin Polymers 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 7
- 230000000694 effects Effects 0.000 description 4
- 238000010304 firing Methods 0.000 description 4
- 239000002241 glass-ceramic Substances 0.000 description 3
- 230000008961 swelling Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はセラミック多層配線基板に関し、特に表面に有
機樹脂を積層するセラミック多層配線基板の構造に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a ceramic multilayer wiring board, and particularly to the structure of a ceramic multilayer wiring board in which an organic resin is laminated on the surface.
従来、この種のセラミック多層配線基板の表面には、有
機樹脂層との密着強度を増すための何の加工も施されて
おらず、有機樹脂ワニス塗布前に密着改良剤を塗布する
だけであった。Conventionally, the surface of this type of ceramic multilayer wiring board has not been subjected to any processing to increase the adhesion strength with the organic resin layer, and only an adhesion improver is applied before applying the organic resin varnish. Ta.
上述した従来のセラミック多層配線基板では、基板表面
上に有機樹脂層を形成する場合に、基板と有機樹脂膜と
の間の密着強度が充分でなく、有機樹脂膜の多層化に伴
い端部に集中する有機樹脂層の残留応力の影響で有機樹
脂が基板から剥がれたり、セラミック基板がクラックを
生じる、あるいは割れてしまうという欠点があった。In the conventional ceramic multilayer wiring board described above, when an organic resin layer is formed on the surface of the board, the adhesion strength between the board and the organic resin film is insufficient, and as the organic resin film becomes multilayered, the edges There have been disadvantages in that the organic resin may peel off from the substrate and the ceramic substrate may crack or break due to the concentrated residual stress in the organic resin layer.
さらに、有機樹脂を基板にスピンコードで塗布する場合
、どうしても端部に盛り上がりが発生し、その結果周辺
部の有機樹脂層のピアホールの抜は性が悪いという欠点
があった。Furthermore, when an organic resin is applied to a substrate using a spin cord, bulges inevitably occur at the edges, resulting in poor removal of peer holes in the organic resin layer at the periphery.
本発明のセラミック多層配線基板は、内部に導体層を有
するセラミック多層基板と、このセラミック多層基板の
積層面全体に形成された溝と、前記セラミック多層基板
の表面に形成され且つその縁が基板表面上の最外周の前
記溝内にくるように形成された有機樹脂層とからなって
いる。The ceramic multilayer wiring board of the present invention includes a ceramic multilayer board having a conductor layer inside, a groove formed on the entire laminated surface of the ceramic multilayer board, and a groove formed on the surface of the ceramic multilayer board, the edge of which is formed on the surface of the board. and an organic resin layer formed within the groove on the outermost periphery of the top.
また本発明のセラミック多層配線基板は、前記溝が格子
状に形成されており、また前記最外周の溝は他の前記溝
に比して幅、深さとも大きく形成されており、さらに前
記有機樹脂層がポリイミドとなっている。Further, in the ceramic multilayer wiring board of the present invention, the grooves are formed in a lattice shape, and the outermost groove is formed to be larger in width and depth than the other grooves, and the The resin layer is made of polyimide.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図及び第2図は本発明の第1の実施例の断面図及び
平面図である。1 and 2 are a sectional view and a plan view of a first embodiment of the present invention.
図に示すようにセラミック多層配線基板11の積層面全
面にある間隔をおいて格子状の渭12゜14を形成する
。そして基板上に積層する有機樹脂層13、本例ではポ
リイミドの端面を最外周に形成された溝12の外周部分
に合わせる構造をとる。As shown in the figure, grid-like edges 12.degree. 14 are formed at certain intervals over the entire laminated surface of the ceramic multilayer wiring board 11. The end face of the organic resin layer 13, in this example polyimide, laminated on the substrate is aligned with the outer periphery of the groove 12 formed at the outermost periphery.
これらの渭12..14は、セラミック多層配線基板形
成過程において通常焼成前のグリーンシート積層体の時
点で加工を施し形成される。グリーンシート積層体の時
点での方が加工が容易なためであるが、この方法では焼
成後に積層体の収縮率の違いなどから渭が所望の位置よ
りぶれて形成されることもある。従って、正確な溝を形
成する場合には焼成後に加工を施すことも可能である。These 12. .. 14 is formed by processing the green sheet laminate before firing in the process of forming the ceramic multilayer wiring board. This is because it is easier to process the green sheet laminate, but with this method, the edges may be formed deviating from the desired position due to differences in the shrinkage rate of the laminate after firing. Therefore, if accurate grooves are to be formed, processing can be performed after firing.
渭12.14の大きさの範囲は、幅が1mm〜10m
m 、深さ10μm〜1mm程度であり、およそ10m
m〜20mmのピッチでセラミック多層配線基板表面全
体に格子状に形成される。この時、積層するポリイミド
層13の端面が内部にくる最外周の溝12だけは、基板
内部の溝14に比べて幅、深さともに大きく形成される
。The size range of Wei 12.14 is 1mm to 10m in width.
m, depth is about 10 μm to 1 mm, approximately 10 m
They are formed in a lattice pattern over the entire surface of the ceramic multilayer wiring board at a pitch of m to 20 mm. At this time, only the outermost groove 12, in which the end face of the polyimide layer 13 to be laminated is located, is formed to have a larger width and depth than the groove 14 inside the substrate.
次に、第1図に示すような第1の実施例の構造をとった
ことによって得られる成果を以下に示す。Next, the results obtained by adopting the structure of the first embodiment as shown in FIG. 1 will be described below.
まずセラミック多層配線基板11とポリイミド層13と
の密着強度について述べる。セラミック多層配線基板1
1のポリイミド積層面全面に溝12.14を形成するこ
とにより、実質上、ポリイミド層13とセラミック多層
配線基板11との接触面積は大きくなり、相互の密着強
度の増加がはかれる。−例として、160mmX160
mmの比較的強度の弱いガラスセラミック多層配線基板
上にポリイミドを単純積層した場合の効果を示す。以後
、ガラスセラミック多層配線基板をGCSと略して説明
を進める。積層面に何の加工も施されていないGC3上
にポリイミドを単純積層していくと約200μmの膜厚
でポリイミド層の端部からの剥がれ、あるいはポリイミ
ド層の端面下のGCSの割れといった事態が発生する。First, the adhesion strength between the ceramic multilayer wiring board 11 and the polyimide layer 13 will be described. Ceramic multilayer wiring board 1
By forming the grooves 12 and 14 over the entire surface of the polyimide layer 13, the contact area between the polyimide layer 13 and the ceramic multilayer wiring board 11 becomes substantially larger, and the mutual adhesion strength can be increased. - As an example, 160mmX160
This figure shows the effect when polyimide is simply laminated on a glass ceramic multilayer wiring board with relatively low strength of mm. Hereinafter, the glass ceramic multilayer wiring board will be abbreviated as GCS in the description. When polyimide is simply laminated on GC3 with no processing applied to the laminated surface, the polyimide layer peels off from the edge after a film thickness of about 200 μm, or the GCS under the edge of the polyimide layer cracks. Occur.
これは、ポリイミドとGCSの熱膨張係数の違いから発
生する残留応力がポリイミド層の端部に集中するためで
、この応力にポリイミドとGC3間の密着強度あるいは
比較的強度のもろいGCS自身が耐えきれなくなった結
果として起こる現象である。この残留応力は基板が大き
くなればなるほど大きくなる。This is because the residual stress generated due to the difference in thermal expansion coefficient between polyimide and GCS is concentrated at the edges of the polyimide layer, and the adhesive strength between polyimide and GC3 or the relatively strong and fragile GCS itself cannot withstand this stress. This is a phenomenon that occurs as a result of being lost. This residual stress increases as the substrate becomes larger.
同様に160mmX160mmのGCSを用いて第1図
に示した本実施例の構造でポリイミドの単純積層を行っ
た結果、ポリイミドの膜厚が250μmを過ぎてもポリ
イミドの端部からの剥がれ、またGCSの割れは認めら
れなかった。これは、ガラスセラミック基板の積層面全
体に格子状に形成された溝12,14により、ポリイミ
ド層13の端部に集中する残留応力の応力分散が行われ
ているからである。Similarly, when polyimide was simply laminated using the structure of this example shown in Figure 1 using a 160 mm x 160 mm GCS, it was found that even if the polyimide film thickness exceeded 250 μm, the polyimide peeled off from the edges and the GCS No cracks were observed. This is because the residual stress concentrated at the end of the polyimide layer 13 is dispersed by the grooves 12 and 14 formed in a lattice pattern over the entire laminated surface of the glass ceramic substrate.
次に、ポリイミド層13の端部盛り上がりについて述べ
る。Next, the swelling of the end portion of the polyimide layer 13 will be described.
本実施例の構造でポリイミドをセラミック基板上へスピ
ンコード法でコーティングする場合、ポリイミド層13
の端部は基板表面の最外周部に形成された渭12内に入
るため、基板全体としてはフラットな面を持つポリイミ
ド層13が形成される。従来、溝を持たない基板にポリ
イミドをスピンコード法で塗布した場合、どうしても端
部の盛り上がりが発生し周辺部、特に四隅の膜厚が厚く
なりその部分でピアホールの形成性が悪くなっていた。When coating polyimide onto a ceramic substrate using the spin code method in the structure of this example, the polyimide layer 13
Since the end portion of the polyimide layer 13 enters the edge 12 formed at the outermost periphery of the substrate surface, a polyimide layer 13 having a flat surface is formed on the entire substrate. Conventionally, when polyimide was applied to a substrate without grooves using the spin cord method, swells occurred at the edges and the film thickness became thicker at the periphery, especially at the four corners, making it difficult to form peer holes in those areas.
第1の実施例はポリイミド層13の端面を溝12の外周
部にあわせであるが、必ずしもこの必要はない。第3図
は、ポリイミド端面を溝の内部にもってきた第2の実施
例の断面図である。溝22はグリーンシート積層体の状
態で加工すると、その位置が焼成時の収縮でバラつくた
め本実施例の構造となる。渭22は幅2mm、深さは3
00μmである。In the first embodiment, the end face of the polyimide layer 13 is aligned with the outer periphery of the groove 12, but this is not necessarily necessary. FIG. 3 is a sectional view of a second embodiment in which the polyimide end face is brought inside the groove. When the grooves 22 are processed in the green sheet laminate, their positions vary due to shrinkage during firing, resulting in the structure of this embodiment. Wei 22 has a width of 2 mm and a depth of 3
00 μm.
第4図は第3の実施例であり、溝32の深さが1mmで
ある。セラミック焼成後に加工を施す場合は、この程度
の深さまで溝をはった方が加工しやすい。また、溝32
の深さが深く、側面で応力を受けるために応力に対する
耐性が向上する。FIG. 4 shows a third embodiment, in which the depth of the groove 32 is 1 mm. When processing the ceramic after it is fired, it is easier to process it if the grooves are made to this depth. In addition, the groove 32
The depth is deep and the stress is received on the sides, which improves the resistance to stress.
以上説明したように本発明は、セラミック多層配線基板
の積層面全体に溝を形成し、積層する有機樹脂層のふち
を前記溝内にもってくるという構造のセラミック多層配
線基板を形成することにより、基板端部に集中する有機
樹脂層の残留応力の応力分散を行い、有機樹脂の基板か
らの剥がれあるいはセラミック基板の応力による割れを
防止できる効果がある。また、有機樹脂のスピンコーテ
ィング時に於ける端部盛り上がりも解消されるという効
果もある。As explained above, the present invention forms a ceramic multilayer wiring board with a structure in which grooves are formed over the entire laminated surface of the ceramic multilayer wiring board, and the edges of the organic resin layers to be laminated are brought into the grooves. This has the effect of dispersing the residual stress in the organic resin layer concentrated at the edge of the substrate, thereby preventing the organic resin from peeling off from the substrate or cracking of the ceramic substrate due to stress. It also has the effect of eliminating swelling at the edges during spin coating of organic resin.
第1図及び第2図は本発明の第1の実施例の断面図及び
平面図、第3図、第4図はそれぞれ本発明の第2.第3
の実施例の断面図である。
11.21.31・・・セラミック多層配線基板、12
.22.32・・・最外周の溝、13.23゜3・・・
有機樹脂層
(ポリイミド層)
4・・・内部
の溝。1 and 2 are a sectional view and a plan view of a first embodiment of the present invention, and FIGS. 3 and 4 are respectively a sectional view and a plan view of a second embodiment of the present invention. Third
FIG. 11.21.31...Ceramic multilayer wiring board, 12
.. 22.32...Outermost groove, 13.23°3...
Organic resin layer (polyimide layer) 4...Internal groove.
Claims (4)
セラミック多層基板の積層面全体に形成された溝と、前
記セラミック多層基板の表面に形成され且つその縁が基
板表面上の最外周の前記溝内にくるように形成された有
機樹脂層とからなることを特徴とするセラミック多層配
線基板。1. a ceramic multilayer substrate having a conductor layer inside; a groove formed on the entire laminated surface of the ceramic multilayer substrate; 1. A ceramic multilayer wiring board characterized by comprising an organic resin layer formed in such a manner as to cover the organic resin layer.
請求項1記載のセラミック多層配線基板。2. 2. The ceramic multilayer wiring board according to claim 1, wherein the grooves are formed in a grid pattern.
大きく形成されていることを特徴とする請求項1または
2記載のセラミック多層配線基板。3. 3. The ceramic multilayer wiring board according to claim 1, wherein the outermost groove is formed to have a larger width and depth than the other grooves.
る請求項1または2または3記載のセラミック多層配線
基板。4. 4. The ceramic multilayer wiring board according to claim 1, wherein the organic resin layer is made of polyimide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26674990A JP2551220B2 (en) | 1990-10-04 | 1990-10-04 | Ceramic multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26674990A JP2551220B2 (en) | 1990-10-04 | 1990-10-04 | Ceramic multilayer wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04142794A true JPH04142794A (en) | 1992-05-15 |
| JP2551220B2 JP2551220B2 (en) | 1996-11-06 |
Family
ID=17435177
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26674990A Expired - Fee Related JP2551220B2 (en) | 1990-10-04 | 1990-10-04 | Ceramic multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2551220B2 (en) |
-
1990
- 1990-10-04 JP JP26674990A patent/JP2551220B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2551220B2 (en) | 1996-11-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |