JPH0414555B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image recording device with less dark current unevenness.

In particular, the present invention relates to an image recording device suitable for still image photography.

In general, high-quality image recording devices using image sensors have a serious problem of dark current unevenness. That is, thermoelectrons are formed within the image sensor over time, and these become dark currents that reduce the S/N of the image signal. At the same time, impurity unevenness and traps within the image sensor cause unevenness in the dark current, which deteriorates the image quality. There are drawbacks that can reduce it.

Such dark current unevenness affects images as uneven brightness and partial hue deviations, and has been a particularly serious problem in image recording apparatuses that require high image quality.

The main object of the present invention is to provide an image recording device that can eliminate or reduce such dark current unevenness.

Another object of the present invention is to provide a power-saving image recording apparatus that can eliminate or reduce dark current unevenness and is not affected by the start-up characteristics of the recording system.

Therefore, in the present invention, after one fraction of image information is stored in the light receiving section of the frame transfer type imaging means, the light receiving section is It is configured to block light.

This prevents smear from occurring during the transfer time.

Therefore, the transfer time can be extended as appropriate.

Further, in the present invention, since the transfer time is variable, it is possible to appropriately select a transfer time that can equalize dark current unevenness.

Furthermore, in the present invention, when the switch for recording is operated, the recording electric circuit and mechanism as the recording system are started, and one frame of image information is formed on the light receiving part of the image sensor, and then the shutter is used to generate the image information. Since the light-receiving section is shielded from light and the formation of a new image is stopped, the recording system does not have to be driven all the time; it only needs to be driven each time, and no photographing opportunity is missed. .

Further, a detection means for detecting the start-up of the recording system is provided, and the output of this detection means allows reading of information in the image pickup device.
Recording is performed before the dark current unevenness increases, and since the recording system is stable, no jitter or the like occurs in the image.

In addition, since the image information formed and held in the light receiving section is temporarily transferred to the storage section within the element before being led to the recording system, one more fraction of image information is received after the transfer. It can be formed in the section.

Further, in the present invention, the frequency element or the transfer time of the transfer signal is configured to be changed in accordance with the time until the output from the rise detecting means of the recording system is obtained, so that the transfer signal is changed immediately after the rise of the recording system. Recording is performed immediately, and problems such as the transfer time being too long compared to the start-up of the recording system do not occur. Therefore, not only dark current unevenness can be suppressed, but also the dark current level itself can be minimized.

The present invention will be described in detail below based on examples.

FIG. 1 is a block diagram showing one embodiment of the configuration of an image recording apparatus according to the present invention.

1 in the figure is an imaging optical system. Reference numeral 2 is a constriction means, which may be physical or mechanical. 3 is the shutter means according to the present invention, which may be either physical or mechanical. Further, it may also be used as the aperture 2. 5 is, for example, a CCD (Charge coupled device)
This is a photoelectric conversion type imaging means such as. Reference numeral 4 denotes a color filter disposed in front of the imaging means, which may be of a stripe type, a mosaic type, or the like.

Further, this filter may not be provided when obtaining only black and white images. Reference numeral 6 denotes a setting circuit for setting the accumulation time in the image pickup device, and 7 denotes a video signal processing circuit which converts image information obtained from the image pickup means into an appropriate signal format. 8 is a driver circuit,
Controls scanning, transfer, etc. of the imaging means 5. A shutter control circuit 9 is controlled by a sequence control circuit 10 to close the shutter when the accumulation time set in the setting circuit 6 has elapsed. 1
0 is a sequence control circuit that controls the sequence of the entire image recording apparatus of this embodiment.

Reference numeral 11 denotes a motor control circuit, which is controlled by a sequence control circuit when the power switch is turned on. 12 is a motor synchronously controlled by the control circuit 11, 13 is a magnetic disk rotationally driven by the motor, 14 is a magnetic head, and 15 is a PG.
(pulse generation) head, and feeds back the rotational phase of the motor to the motor control circuit 11. The F terminal is a terminal that outputs a servo lock signal,
Reference numeral 16 is a clock oscillator, and reference numeral 17 is a recording switch, which also serves as a start switch for the recording system in this embodiment. Further, D is a display device.

FIG. 2 is a schematic diagram showing an example of the configuration of, for example, a frame transfer type CCD as an imaging means indicated by 5 in FIG. 1.

In the figure, 18 is a light receiving section, 19 is an accumulation section, 20 is a horizontal register, and 21 is an anti-bloom mink barrier 22.
is an anti-blooming drain, and 23 is an output amplifier.

Further, _φ1 is a pulse signal for transferring the charge in the light receiving section to the storage section, _φ2 is a pulse signal for shifting the charge in the storage section to the horizontal shift register, and _φ3 is a horizontal shift pulse.

FIGS. 3a and 3b are diagrams showing an example of timing charts of the main parts of the first illustrated block.

FIG. 4 is a block diagram showing an example of the configuration of a transfer time control circuit according to the present invention, and the main parts of these blocks are included inside the sequence control circuit 10. Also, the same numbers as in FIG. 1 indicate the same members.

Reference numeral 24 denotes a memory for generating fixed data, and this memory stores data corresponding to the start-up time of the recording system. 25 indicates the time set in the image storage time setting circuit 6 and the memory 24.
28 is a presettable counter that counts the time according to the output of the accumulation time setting circuit 6, and the output of the circuit 6 is connected to its preset input terminal. There is. or,
The reset terminal R is connected to receive a reset input when the recording switch 17 is activated.
When the counter 28 counts the clock 16 by the set value of the setting circuit 6 after operating the recording switch 17, it outputs a high level signal from the Q terminal. This signal is input to the shutter control circuit 9 to close the shutter 3.

Furthermore, the output data of the subtracter 25 corresponds to the waiting time from the end of image accumulation in the image sensor to the start-up of the recording system, and this data is transmitted to the switch circuit 100.
is input to the decoder 30 via
The output of the frequency dividing circuit 31 is connected to control the frequency division ratio of the frequency dividing circuit 31.

That is, for example, the frequency division ratio is set to increase as the decoder input increases. Q of frequency dividing circuit 31
The output is supplied to the driver circuit 8 via a 3-input AND gate 32.

The output of the switch circuit is input to the preset input terminal of a presettable counter 36, and the Q output of the counter 28 is connected to the reset terminal R of the counter via a rising synchronized one-shot circuit 35. There is. Also, counter 36
The Q output of the counter 36 is connected to the input of an AND gate 32 via an inverter 37, and the counter 36 is configured so that the Q output becomes high level when the counter 36 counts up to a preset value after being reset. Further, the Q output of the counter 28 is connected to the other input terminal of the AND gate 32.

Therefore, the output of the frequency dividing circuit 31 is supplied to the driver circuit 8 until a predetermined time has elapsed after the shutter is closed, and forms a transfer pulse φ ₁ in the image pickup device while the Q output of the counter 28 is at a high level. used for.

Note that 26 and 27 are memories for setting fixed time data, 26 being data approximately corresponding to the vertical blanking period of a TV signal, and 27 being capable of outputting an appropriate time longer than the data. Furthermore, data can be set in the memory 27 as appropriate using an external operating member.

29 is a data selector for selectively guiding one of the output of the subtracter 25, the output of the memory 26, and the output of the memory 27 to the decoder 30 in the switch circuit 100. Further, the servo lock signal output terminal F of the motor control circuit 11 is connected to the control input C of the switch circuit 100 via an AND gate, and the Q output of the counter 28 is inverted and connected to the other inputs of the gate. It has been entered. When the rotational phase of the motor is locked by the motor control circuit, a high level signal is output from the F terminal, and this high level signal is sent to the counter 28.
When inputted to the switch circuit while the Q output of is at a low level, that is, while the shutter is open, the data in the circuit 26 is forcibly switched to be selected regardless of the selection by the data selector 29. It is configured.

As a result, if the recording system is started up before the shutter is closed, that is, before the transfer starts, the transfer frequency is set to be approximately the same as the vertical blanking period, for example.

Therefore, during the rising period immediately after the switch 17 for recording is activated, the transfer time is controlled according to the time until this rising, and after rising, the data is read out within a fixed, for example, vertical blanking period. It will be like that.

Furthermore, it becomes easy to monitor images when the recording system is running.

Note that the transfer time selected when the recording system has started up may be another fixed value.

Furthermore, in this embodiment, the frequency division ratio of the transfer clock is changed depending on the waiting time until the recording system starts up, but after converting the waiting time to a voltage level,
The transfer clock frequency may be continuously controlled by a VCO (voltage controlled oscillator), and the transfer clock may be formed from the VCO output.

Next, a detailed explanation of this embodiment will be given based on FIGS. 3a and 3b.

First, the record switch 17 is turned on at time t ₁ in a of the same figure.
When it is closed (the output is set to H), power is supplied to each circuit etc. via a power line (not shown). Also the fourth
The illustrated counter 28 is reset. Along with this, the shutter control circuit 9 opens the shutter 3, and the driver circuit 8 sends pulses φ ₁ ,
By outputting φ ₂ as shown in FIG. 3a, unnecessary charges flow into the drain 22 over the anti-blooming barrier 21 and are removed.

When the time (T _c +T _p ) set in advance in the accumulation time setting circuit 6 has elapsed, the Q output of the counter 28 shown in FIG. 4 becomes high level, and the shutter 3 is closed via the shutter control circuit 9. Ru. While the shutter 3 is closed, the servo lock completion signal is not obtained from the F terminal of the motor control circuit 11, and the selector 29 is not connected to the memory 2.
If you have not selected data 6 or 27,
Prefixed time data (t ₃ −
t ₁ ) to the time preset in the setting circuit 6 (t ₃ −
_t2 ) was subtracted. Time (t ₃ −t ₂ ) data is input to the decoder 30 via the switch circuit 100,
The frequency dividing circuit 31 outputs a signal with a frequency corresponding to this time (t ₃ −t ₂ ). Since this signal passes through the AND gate 32, the time (t3 _{- t2} ) measured by the counter 36 after the shutter 3 closes (time _{t2 )}
The signal is sent to the driver circuit 8 to form a transfer pulse φ ₁ until the time period elapses.

At time _t4 , a high level output is obtained from the F terminal of the motor control circuit 11, thereby making it possible to read out the data already transferred to the storage section of the image sensor. In addition, in order to perform reading after the transfer from the light receiving section to the storage section is completed, the Q output of the counter 36, the synchronization signal S from the sequence control circuit (Fig. 3a), and the F terminal output are connected. The driver circuit 8 starts reading out the image information by calculating the logical product of , but this is not particularly shown.

The example shown in FIG. 3b is a diagram showing the timing when the accumulation time _T0 changes to _T0 , and as is clear from the figure, the timing from when the switch 17 is activated until the shutter 3 is closed is shown. When the time (set value of the setting circuit 6) increases, the waiting time T _w1 becomes shorter to T _w2 , and the transfer frequency increases accordingly.

In this way, in the present invention, the transfer frequency can be set to a time T _w3 that is longer than the vertical blanking period, which has the effect of equalizing dark current unevenness during transfer, and allows this time T _w3 to be adjusted as appropriate. Therefore, it is possible to set the optimum transfer time among the characteristics of increasing dark current and decreasing characteristics of dark current unevenness.

In addition, since the transfer time, that is, the transfer frequency, is changed in accordance with the waiting time until the recording system starts up, the dark current level does not increase more than necessary, and the optimum transfer time that suppresses dark current unevenness is set. Automatically set. That is, one of the features of the present invention is that it achieves both equalization of dark current unevenness and prompt recording after the recording system starts up.

Furthermore, in the present invention, the transfer time is restored to a predetermined value after the recording system starts up, so that, for example, if the second shot is taken immediately after the first shot, recording is done quickly. .

The most basic feature of the present invention is that in order to achieve such appropriate changes in transfer time without causing smearing, the light-receiving surface is constructed to block light during the transfer period. Various characteristic configurations can be obtained.

Note that the output of the terminal F is displayed on the display device D with sound or light. This allows the user to know when the next imaging will be possible.

In the case of this embodiment, the power is maintained by the sequence control circuit from the time the switch 17 is closed until at least the recording on the disk 13 is completed. Note that in this embodiment, reading is performed using a servo lock signal, but
The information may be read out using a timer that outputs a signal after a predetermined period of time has elapsed after the shutter operation. That is, it is sufficient if the configuration is such that reading is performed after detecting in some way that the recording system is stable. Alternatively, reading may be performed using a manual switch.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the configuration of the present invention, FIG. 2 is a diagram showing an example of the structure of a frame transfer type image sensor applicable to the present invention, and FIGS. 3a and 3b are the circuits shown in the first diagram. FIG. 4 is a diagram showing an example of the transfer frequency control circuit of the present invention. 5... Imaging means, 8... Driver circuit, 9... Shutter control circuit, 10... Sequence control circuit, 11
...Motor control circuit, 14...Head, D...Display device.

Claims (1)

[Scope of Claims] 1. Imaging means having at least a light receiving section for converting imaging light from a subject into electrical image charges, and a storage section for temporarily accumulating the image charges from the light receiving section; a trigger means for instructing photography; a recording means activated in conjunction with the operation of the trigger means to record a video signal obtained through the imaging means on a recording medium; and operation of the trigger means. a detection means for detecting that the recording means is in a recordable state in accordance with the above; and a control means for interlocking and controlling the driving of each of the above means in response to the operation of the trigger means; The control means transfers the image charge from the light receiving section to the storage section after a predetermined period of time has elapsed after the photographing instruction is given by the trigger means, and the detection means detects that a recordable state has been reached. An imaging device characterized in that the image charge in the storage section is then read out and recorded by the recording means. 2. An imaging means for photoelectrically converting imaging light from a subject to generate an electric image charge, a shutter means for shielding the light receiving section from light, a trigger means for instructing photography, and this trigger means a recording means that is activated in conjunction with the operation of the imaging means and records the video signal obtained through the imaging means on a recording medium; and the recording means becomes ready for recording in response to the operation of the trigger means. and a control means for interlocking and controlling the drive of each of the above means in accordance with the operation of the trigger means, and the control means is configured to detect a predetermined time after the shooting instruction is given by the trigger means. After a period of time has elapsed, the shutter means blocks light from the imaging means, and after the detection means detects that a recordable state has been reached, the image charges in the imaging means are read out and recorded. An imaging device characterized by recording by a means.