JPH04163676A - Image storage method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to an image storage system, and more particularly to an image storage system for storing binary and multivalued images in a memory.

[Conventional technology]

Generally, when storing binary images such as character patterns and line drawings, higher resolution is required than smoothness and continuity of diagonal lines and the like. On the other hand, halftone image data such as photographs requires continuity of gradual gradation changes, that is, high gradation. Therefore, when storing data in which characters (binary images) and photographic images (halftone images) coexist as shown in Figure 2, the number of pixels and pseudo-contours required to maintain the quality of the characters has conventionally been reduced. Memory had a number of gradations that did not occur. Note that the halftone image is stored after being converted into multi-value pixel data of n bits (=2' gradation) per pixel.

[Problems to be Solved by the Invention] However, in the above-mentioned conventional example, when attempting to store a mixture of high-quality binary images and multi-value images, an enormous memory capacity is required, and as a result, the size of the device becomes large. However, this method has the disadvantage that the processing and cost become enormous. For example, if a multivalued image has 256 gradations, 8 bits are required per pixel. However, in the case of a binary image, although one bit per pixel is sufficient, eight times as much memory capacity is required. The present invention has been made in view of such prior art, and it is an object of the present invention to provide an image storage method that makes it possible to efficiently store binary and multivalue mixed images while maintaining high quality with a small amount of memory. It is.

[Means to solve the problem]

The image storage system of the present invention that solves this problem has the configuration shown below. That is, a memory for storing image information, a first storage means for storing a binary pixel as 1-bit data in the memory, a multi-value pixel as n-bit data, and a multi-value pixel as n binary pixels. a second storage means for storing data in the memory; an area information storage means for storing information for determining a binary/multivalued pixel area; a readout means for reading data from the memory; a determining means for determining whether the output data is a binary pixel or a multi-valued pixel based on area determination information stored in the area information storage means; a first output means that outputs data based on 1-bit information of the pixel of interest when the determination is made; and a first output means that outputs data based on 1-bit information of the pixel of interest; the second outputting data based on bit information;
output means.

[Effect]

In this configuration of the present invention, a binary image is stored as bit image data in the memory as it is, and in the case of multivalued pixel data, it is stored in the memory as n-bit data. At this time, determination information as to which part is a binary pixel or a multivalued pixel is stored. When reading data from memory,
Based on the determination information, it is determined whether the read data is binary or multivalued. When it is determined that the pixel is binary pixel data, data based on 1-bit information is output, and when it is determined that it is multi-value pixel data, data based on n-bit information is output.

【Example】

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. In addition, in the example, an example adapted to a printer will be explained, but
The present invention may also be applied in other ways. FIG. 1 is a block diagram showing the configuration of an image processing section of a printer in this embodiment. In the figure, 1 is an input terminal for inputting print data (including various control commands) from a host computer, etc., and 2 is an interpreter that determines whether the input data is a multilevel image or a binary image. 3 is a resolution conversion circuit, 4 is a bitmap expansion circuit, 5 is a DPCM encoder, 6 is a frame buffer, 7 is an image area memory, 8 is a multi-value conversion circuit, 9
1 is a DPCM decoder, 10 is a signal changeover switch, 11 is a scan conversion circuit, 12 is a memory controller, and 13 is an output terminal. Interpreter 2 is input terminal 1 from the host computer, etc.
interprets commands and data applied through the
Binary images such as line drawings are output to the bitmap expansion circuit 4, and multi-value image data (in the embodiment, each pixel is 8 bits) is output to the resolution conversion circuit 3. The bitmap development circuit 4 develops the input binary image into a bitmap (in the case of a character code, generates a character pattern), and writes it into the corresponding address of the frame buffer 6. On the other hand, the resolution conversion circuit 3 converts the input multi-valued image data to the resolution stored in the frame buffer 6 (in this embodiment,
Convert it to 1/2 of the resolution of the binary image and convert it to DPCM
Output to encoder 5. The DPCM encoder 5 compresses the input 8-bit multivalued pixel data into 4 bits, and writes the compressed code to the frame buffer 6 according to a predetermined rule as described later. FIG. 5 shows a detailed block diagram of the DPCM encoder. In the figure, 20 is a subtracter, 21 is a quantizer, 22 is a representative value setting circuit, 23 is an adder, 24 is a limiter, 25 is a predictor, and 26 is a signal changeover switch. The input 8-bit multivalued pixel data is subtracted by a subtracter 20, which calculates the difference from the predicted value supplied from a switch 26, and a quantizer 21 performs known non-linear quantization (the absolute value increases from the difference O). quantization (which becomes coarser according to the quantization) is performed and output as a 4-bit DPCM code. The DPCM code is set by the representative value setting circuit 22.
A quantized representative value is obtained at , a predicted value is added at an adder 23 , and a local decoded value is generated by keeping it within a predetermined range at a limiter 24 . Since this locally decoded value is used to generate a predicted value, it is output to the predictor 25. In this embodiment, the immediately preceding pixel value is used as the predicted value. Therefore, the predictor is composed of a D-type flip-flop, and the input locally decoded value is used as the predicted value of the next pixel. In order to match the decoded values on the encoder side and the decoder side, the switch 26 selects only the first data that forms the boundary of the multi-value image area (in other words, if the pixel immediately before the multi-value pixel of interest is a binary pixel), the switch 26 The common terminal is connected to the terminal d, and the initial value set to the same value on the encoder side and the decoder side is outputted to the subtracter 20 as a predicted value. In other cases, the common terminal of the switch 26 is connected to the terminal C, and the value from the predictor 25 is output to the subtracter 20. The resolution conversion circuit 3 also writes a determination signal (hereinafter referred to as a binary multi-value determination signal) for distinguishing between an image area and a text area into the image area memory 7 in units of image pixels. FIG. 3 shows the relationship between the binary pixels stored in the frame memory 6 and the multivalued image. As explained earlier, in the case of the embodiment, one multilevel pixel is 4
Bit, a binary pixel is 1 bit. As shown in FIG. 3, the frame buffer 6 stores l multi-value pixels as four binary pixels (=2×2 pixels). Therefore, the resolution of a multivalued pixel becomes 1/2 both vertically and horizontally, but
Since a value image does not require any resolution, there is practically no problem.Also, to repeat, the multi-value pixel data stored in the frame buffer 6 is not bitmap data, and the binary multi-value determination signal is also in multi-value pixel units. Therefore, readout of the frame buffer is performed in units of multivalued pixels. By repeating the above process, one page of image information (binary data and DPCM data) is stored in the frame buffer 6.
Similarly, after the binary multi-value determination signal for one page is also stored in the image area memory 7, when a print command is input from the terminal 1, the interpreter 2 starts a printer engine (not shown). . When the engine is started, the terminal 14 is supplied with a synchronization signal from the engine (if the printer engine is of the laser beam type, a vertical synchronization signal and other known BD signals), and the memory control circuit 12 receives the synchronization signal according to the synchronization signal. The data in the frame buffer allo and image area memory 7 are read out sequentially. Now, the data read out from the frame buffer 6 is as follows.
The signal is applied to the multi-level conversion circuit 8 and the DPCM decoder 9, respectively. Further, the binary multi-value determination signal read from the image area memory 7 is supplied to the DPCM decoder 9 and the switch 10. In accordance with the data (1 or O) read out from the frame buffer 6, the multilevel conversion circuit 8 outputs either the gradation data of the drawing section or the gradation data of the background section, which are preset. FIG. 4 is a block diagram showing details of the multi-value converting circuit 8. As shown in FIG. 30 is a drawing section gradation data storage register, 31 is a background section gradation data storage register (both are 8-bit registers), 32 is a shift register, and 33 is a signal changeover switch. In the drawing section and background section gradation data storage registers 30 and 31, desired gradation data is stored in advance through the interpreter 2 according to a command from a host computer or the like. Since the data read out from the frame buffer 6 is in multilevel pixel units (4 bits), it is first stored in the shift register 32 and then taken out bit by bit by a pixel clock (not shown) and supplied to the control terminal of the switch 33. Ru. The switch 33 selects either the register 30 or the register 31 according to the signal applied from the shift register 32 and outputs it to the switch 10. Incidentally, the signal changeover switch 33 is set when the output of the shift register 32 is "1".
When , the drawing gradation data of terminal e is selected, and conversely, “0” is selected.
”, the background gradation data of the terminal f is selected. Next, the DPCM decoder 9 will be explained with reference to FIG.
0, an adder 41, a limiter 42, a predictor 43, a signal changeover switch 44, a D-type flip-flop 45, an inverter 46, and an OR circuit 47. 4-bit DPC read from frame buffer 6
The M code data is converted into a difference value by the quantization representative value setting circuit 40, a predicted value is added by the adder 41, and the value is kept within a predetermined range by the limiter 42 to generate a decoded value. The decoded value is applied to the predictor 43 for use in generating a predicted value. The predictor 43 is the same as the DPCM encoder 5, is composed of a D-type flip-flop in this embodiment, and is used as a predicted value for the next pixel. On the other hand, the binary multi-value determination signal read from the image area memory 7 is applied to a D-type flip-flop 45 and an inverter 46, and an OR circuit 47 detects the leading pixel of each line of the multi-value area. That is, in the first pixel of the line in the multi-value image area, the level of the binary multi-value judgment signal of the immediately preceding pixel is "0" and the judgment signal of the current pixel is "1", so the output of the OR circuit 47 is Only in that case, it becomes "0". Otherwise, it becomes "1". Therefore, when the output of the OR circuit 47 is "0", the common terminal of the switch 44 is connected to the terminal G, and when the output of the OR circuit 47 is "1", the terminal G is connected to the common terminal of the switch 44.
By connecting to the DPCM encoding circuit, a fixed initial value can be used as a predicted value only for the first pixel of a line in a multivalued image area. The switch 10 is read out from the image area memory 7.
According to the multi-value judgment signal, when the judgment of the current pixel is "0", the output data of the multi-value circuit 8 of terminal a is selected, and when the judgment signal is "1", the output data of the DPCM decoder 9 of terminal A is selected. and supplies it to the scan conversion circuit 11. The scan conversion circuit 11 converts the input multi-value pixel unit (2×2 pixels)
The data is converted into scanning data for the printer engine, and the data is output from the terminal 13 to the printer engine. As explained above, according to this embodiment, by compressing the amount of information of a multi-value pixel into n bits and expanding it into a bit map, a binary image and a multi-value image can be mixed without increasing the memory capacity. Images can be stored. Furthermore, since the multivalued image data is compressed and then developed into a bitmap, deterioration in the resolution of the multivalued image data can be reduced. Although not described in the examples, if the amount of information is compressed by known subsampling before performing DPCM,
Furthermore, deterioration in the resolution of the image area can be reduced. In the embodiment, the host computer is used as the light that generates the storage information, and the engine section that executes the printing process is used as the output light of the storage information, but the input light and the output light are not limited to this.

【Effect of the invention】

As described above, according to the present invention, it is possible to store binary and multivalue mixed images efficiently with a small amount of memory while maintaining high quality.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of the image processing unit of the printer in this embodiment, FIG. 2 is a diagram showing an example of a mixture of text and photographic images, and FIG. 3 is a diagram showing the data storage state of the frame buffer in the embodiment. FIG. 4 is a block diagram of a multi-value encoding circuit according to an embodiment, FIG. 5 is a block diagram of a PDCM encoder according to an embodiment, and FIG. 6 is a block diagram of a DPCM decoder according to an embodiment. In the figure, 1 and 14... input terminal, 2... interpreter, 3... resolution conversion circuit, 4... bitmap expansion circuit, 5... DPCM encoder, 6... frame buffer, 7... . . . Image area memory, 8 . . . Multi-value circuit, 9 . . . DPCM decoder, 10 . It is. Figure 2 Figure 3 Figure 4

Claims (4)

[Claims] (1) a memory for storing image information; a first storage means for storing a binary pixel as 1-bit data in the memory; a multi-value pixel as n-bit data; a second storage means for storing pixel data in the memory; an area information storage means for storing information for determining a binary/multivalued pixel area; a reading means for reading data from the memory; and a reading means for reading data from the memory. a determining means for determining whether the read data is a binary pixel or a multi-valued pixel based on area determination information stored in the area information storage means; and in the determining means, the data of interest is a binary pixel. When it is determined that the pixel of interest is multi-value pixel data, the first output means outputs data based on 1-bit information of the pixel data of interest; and second output means for outputting data based on n-bit information. (2) The second storage means includes a compression means for compressing multivalued pixel data represented by m bits into n bits (n≦m), and the second output means compresses the n-bit compressed data. 2. The image storage system according to claim 1, further comprising decompressing means for decompressing to m bits. (3) The image storage method according to claim 2, wherein the compression means is an encoding means using DCPM processing. (4) The image storage method according to claim 1, wherein the first output means allocates and outputs preset multivalued pixel data based on the logic level of the binary pixel data. .