JPH04174497A - Display controlling device - Google Patents

Abstract

PURPOSE:To write a static image to one frame buffer only in a double frame buffer display system by providing a frame buffer fixing flag to be applied to a pixel. CONSTITUTION:An output of an address counter 2 is used for an address input for frame buffers 3, 4 and a flag 5 of a frame buffer fixing flag. A multiplexer 8 is a display changing means to select the content of the frame buffer 3 when the output of a gate 7 is off, and the content of the frame buffer 4 when it is on. When the frame buffer fixing flag 5 is reset, the frame buffer designated by a display frame buffer designating flipflop 6, while if the flag 5 is set, the frame buffer 3 is selected regardless of the condition of the flipflop 6. A static image therefore need only the written in the frame buffer 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a display control device, and particularly to a device for controlling a display (display device) of a personal computer, workstation, or the like.

[Conventional technology]

Conventionally, this type of device has two frame buffers that store display information corresponding to pixels on the display.
A double buffering method is known, in which data is written to one frame buffer while displaying the contents of the other frame buffer, and the buffer is switched after the writing is complete, and is effective for displaying videos such as computer graphics and animation. It is.

[Problem to be solved by the invention]

In this conventional device, if a moving image is not displayed on only a portion of the screen, it is necessary to write still images to be displayed on the remaining portion into both frame buffers.

[Means to solve the problem]

The display control device of the present invention includes two frame buffers,
It has a frame buffer fixing flag corresponding to a pixel on the display, a display frame buffer specifying means, and a display switching means for switching the frame buffer, and when the frame buffer fixing flag is set, the display frame buffer is changed. It has a function to display the contents of a predetermined frame buffer regardless of the specification.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, a synchronization signal generation circuit 1 generates a clock C9, a horizontal synchronization H, and a vertical synchronization ■. These signals are input to the display 11 and used as timing signals, and the clock C is input to the address counter 2 to sequentially increase the address by one. The contents of the address counter 2 are addresses that identify each pixel of the display 11. In this example, the resolution of the display 11 is 1024
Let pixel x 1024 pixels. In this case, the address counter may simply be a 20-bit binary counter. Overflow from the most significant bit can be ignored.

The output of address buffer 2 is used as an address input for frame buffer 3.4 and flag 5 of frame buffer fixed flag 5. The display frame buffer designating means 6 is a flip-flop that is set/reset according to designations from the program, and designates the frame buffer 3 in the reset state and the frame buffer 4 in the set state.

The output of the gate 7 is turned on only when the frame buffer fixing flag 5 is reset and the display frame buffer designating flip-flop 6 is set.

The multiplexer 8 is a display switching means that selects the contents of the frame buffer 3 when the output of the gate 7 is off, and the contents of the frame buffer 4 when the output of the gate 7 is on. therefore,
When the frame buffer fixed flag 5 is reset, the frame buffer specified by the display frame buffer specification flip-flop 6 is selected;
is set, frame buffer 3 is selected regardless of the state of flip-flop 6. Therefore, it is better to write still images only to the frame buffer 3. The output of the multiplexer 8 is provided to the display 1 via a look-up table 9 and a digital-to-analog (DA) converter 10, as is known in the art.

〔Effect of the invention〕

As described above, the present invention has the advantage that by providing a frame buffer fixing flag for each pixel, it is possible to write a still image into only one frame buffer in a double frame buffer display system.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Synchronization signal generation circuit, 2... Address counter, 3, 4... Frame buffer, 5... Frame buffer fixing flag, 6... Display frame buffer specifying means flip-flop>, 7.・Gate, 8...
Display switching means (multiplexer), 9... Lookup checker, 10... Digital analog (DA) converter, 11... Display.

Claims (1)

[Claims] It has two frame buffers, a frame buffer fixing flag corresponding to pixels on the display, a display frame buffer specifying means, and a display switching means for switching the frame buffer, and when the frame buffer fixing flag is set, A display control device characterized in that the contents of a predetermined frame buffer are displayed regardless of the designation of the display frame buffer.