JPH0418894U

JPH0418894U -

Info

Publication number: JPH0418894U
Application number: JP6036290U
Authority: JP
Priority date: 1990-06-07
Filing date: 1990-06-07
Publication date: 1992-02-17

Description

[Brief explanation of the drawing]

第１図は本考案の画像表示コントローラの一実
施例のブロツク図、第２図は従来の画像表示装置
の一例ブロツク図である。２１……シリアルインタフエース、２２……デ
ータデイストリビユータ、２４……アドレスカウ
ンタ、２６……マルチプレクサ、２７……コント
ロールレジスタアレイ、３０……メモリコントロ
ーラ、３１……画像同期制御部、３６……表示ア
ドレス発生器、３７……ビデオメモリ。 FIG. 1 is a block diagram of an embodiment of an image display controller according to the present invention, and FIG. 2 is a block diagram of an example of a conventional image display device. 21... Serial interface, 22... Data distributor, 24... Address counter, 26... Multiplexer, 27... Control register array, 30... Memory controller, 31... Image synchronization control unit, 36... Display address generator, 37...video memory.

Claims

[Claims for Utility Model Registration] The display data stored in the video memory is sequentially read out according to the control data stored in the control register array, and the color specified by the control data of the control register array is read out in accordance with the display data. An image display controller that selects and generates and outputs image signals for display includes a serial interface that changes image display information including serially transmitted addresses and data to parallel information, and image display information supplied from the serial interface. a data distributor for extracting an address from the data distributor, an address of the control register array which is set with the address extracted by the data distributor and stores control data among the data in the image information; An image display controller comprising: an address counter that indicates an address of the video memory into which display data is to be written, and that changes the address in a base sequence according to control data of the control register array.