JPH04192516A - Impurity diffusion into inalp compound semiconductor - Google Patents

Impurity diffusion into inalp compound semiconductor

Info

Publication number
JPH04192516A
JPH04192516A JP32410290A JP32410290A JPH04192516A JP H04192516 A JPH04192516 A JP H04192516A JP 32410290 A JP32410290 A JP 32410290A JP 32410290 A JP32410290 A JP 32410290A JP H04192516 A JPH04192516 A JP H04192516A
Authority
JP
Japan
Prior art keywords
diffusion
phosphorus
inalp
pressure
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32410290A
Other languages
Japanese (ja)
Inventor
Toru Arai
亨 荒井
Yoshinori Terui
良典 照井
Ryuichi Terasaki
寺崎 隆一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP32410290A priority Critical patent/JPH04192516A/en
Publication of JPH04192516A publication Critical patent/JPH04192516A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To enable formation of a P type semiconductor layer in the vicinity of the extreme surface in the depth of about 1mum of a InAlLP semiconductor by using a substance obtained by adding phosphorus to a compound including zinc and phosphorus as a diffusion source, setting the phosphorus pressure in the system to 0.01 to 3 atmospheric pressure, heating the substance up to 670 to 750 deg.C and diffusing it and thereafter cooling it quickly. CONSTITUTION:As a InAlP group wafer 3, InAlP, InAlGaP, etc., are sued and as a diffusion source 2 obtained by adding phosphorus to a compound including zinc and phosphorus, a substance ading P such as Zn3P2, ZnP2 is used. A quartz ampul 1 is heated at 670 to 750 deg.C. The phosphorus pressure in the system can be adjusted by kind and quantity of diffusion source 2 and a heating temperature and the desirable pressure is set to 0.01 to 3 atmospheric pressure. After the diffusion processing, a quartz ampul 1 is quickly cooled by ice water. Thereby, a P type semiconductor layer can be formed in the vicinity of the extreme surface in the depth of about 1mum of the InAlP semiconductor.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はInAl!P系の化合物半導体への不純物拡散
法、特にInAIP半導体の深さ1μm程度の極表面近
傍にP型半導体層(以下、P層という)の形成とP層深
さの制御しやすい不純物の拡散法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to InAl! A method of impurity diffusion into P-based compound semiconductors, especially a method of impurity diffusion to form a P-type semiconductor layer (hereinafter referred to as P layer) near the extreme surface of an InAIP semiconductor with a depth of about 1 μm and to easily control the depth of the P layer. It is related to.

(従来の技術) InAIP系材料を金材料導体材料は短波長て発振する
可視光半導体レーザの材料をはじめとして最近注目され
ており、将来の発展か期待されている。このIn、Lj
7P系化合物半導体を用いたデバイスを作成する上で、
Zn拡散によるP層形成は基本的、かつ重要なプロセス
である。従来、GaAs等のバンドギャップの比較的小
さい化合物半導体、及びInP系においてAβを含まな
い系に対する制御性のよい亜鉛の拡散及びP層の形成法
は知られている(例えば特公平2−24369号公報)
。すなわち、拡散源である亜鉛化合物と上記化合物半導
体ウェハーを石英なとのアンプル中に真空下で封入した
後に、電気炉等で所定の温度、時間加熱し、アンプル内
に発生した亜鉛蒸気により、ウェハー内へ亜鉛を拡散さ
せるのである。
(Prior Art) InAIP-based materials and gold conductor materials have recently attracted attention, including materials for visible light semiconductor lasers that oscillate at short wavelengths, and are expected to develop in the future. This In, Lj
In creating a device using a 7P compound semiconductor,
Formation of the P layer by Zn diffusion is a fundamental and important process. Conventionally, methods for forming a P layer and diffusion of zinc with good controllability for compound semiconductors with a relatively small bandgap such as GaAs, and InP systems that do not contain Aβ are known (for example, Japanese Patent Publication No. 2-24369). Public bulletin)
. In other words, a zinc compound as a diffusion source and the compound semiconductor wafer are sealed in a quartz ampoule under vacuum, and then heated in an electric furnace or the like for a predetermined temperature and time, and the zinc vapor generated in the ampoule causes the wafer to be heated. This causes the zinc to diffuse into the interior of the body.

(発明が解決しようとする課題) InA7Pを用いた半導体デバイスの一例として半導体
レーザがあげられる。この場合、亜鉛等の不純物の拡散
によってInAl!P表面からの深さが1μm程度の極
表面近傍に亜鉛拡散層(P層)を形成しなくてはならな
い。このために、P層か形成でき、かつその深さの制御
性の良い亜鉛の拡散法か必要となる。
(Problems to be Solved by the Invention) A semiconductor laser is an example of a semiconductor device using InA7P. In this case, InAl! due to diffusion of impurities such as zinc! A zinc diffusion layer (P layer) must be formed near the extreme surface with a depth of about 1 μm from the P surface. For this purpose, a zinc diffusion method that can form a P layer and has good controllability of the depth is required.

従来、GaAS、InP等に対しての亜鉛拡散では約6
50°C以下の比較的拡散温度が低い条件で、P層を形
成できる。また、拡散速度も遅く、亜鉛の深さ方向の拡
散プロファイルの急峻性も良好なため、P層を極表面近
傍(約1μm)に制御性良く形成することかできる。
Conventionally, zinc diffusion for GaAS, InP, etc.
The P layer can be formed under conditions where the diffusion temperature is relatively low, such as 50° C. or less. Furthermore, since the diffusion rate is slow and the steepness of the zinc diffusion profile in the depth direction is good, the P layer can be formed near the extreme surface (approximately 1 μm) with good controllability.

この方法をそのまま[nl’Pに適用すると、亜鉛はI
n1P内に非常に速く拡散するのにも関わらず、P層は
形成できない。すなわちこれは、基板材料を構成してい
るAf原子とP原子の結合が強く、これを切断して亜鉛
かP型の半導体として発現するための固体内のサイトに
入ることか、(nP、GaAsに比して著しく困難なこ
とによる。
When this method is applied directly to [nl'P, zinc is
Despite diffusing very quickly into n1P, no P layer can be formed. In other words, this means that the bonds between Af and P atoms that make up the substrate material are strong, and either they are broken and enter a site in the solid to be developed as a zinc or P-type semiconductor, or (nP, GaAs This is because it is significantly more difficult than

本発明は従来、半導体デバイスに用いられていなかった
1nAI!P系半導体材料に対して、表面近傍(約1μ
m)にP層を形成させ、かつ、その表面からの深さの制
御性のよい亜鉛拡散法を提供するものである。
The present invention utilizes 1nAI!, which has not been used in semiconductor devices in the past! For P-based semiconductor materials, near the surface (approximately 1μ
m) to form a P layer and to provide a zinc diffusion method that allows good controllability of the depth from the surface.

(課題を解決するための手段) すなわち、本発明は以下を要旨とするものである。(Means for solving problems) That is, the gist of the present invention is as follows.

InAIP系の化合物半導体材料を高温に加熱して不純
物を拡散する方法において、拡散源として亜鉛とリンを
含む化合物にリンを加えたものを用い、系内のリン圧力
を0.01〜3気圧とし、670〜750″Cて加熱、
拡散処理後、急冷することを特徴とするIn1P系化合
物半導体への不純物拡散法である。
In a method of diffusing impurities by heating InAIP-based compound semiconductor materials to high temperatures, a compound containing zinc and phosphorous plus phosphorus is used as a diffusion source, and the phosphorus pressure in the system is set to 0.01 to 3 atm. , heat at 670-750″C,
This is an impurity diffusion method into an In1P-based compound semiconductor characterized by rapid cooling after the diffusion treatment.

以下、本発明についてさらに詳細に説明する。The present invention will be explained in more detail below.

第1図は拡散処理のために真空下において石英管アンプ
ル1内に拡散源2及びInAlPウエハー3を封入した
状態を示す。InA17P系ウエハーとしではInAl
P 、InAl!GaP等か使用される。拡散源である
亜鉛とリンを含む化合物にリンを加えたものとしてはZ
n+P2、ZnP*などにPを加えたものか使用される
。この石英管アンプルを電気炉内において、670〜7
50℃で加熱する。
FIG. 1 shows a state in which a diffusion source 2 and an InAlP wafer 3 are sealed in a quartz tube ampoule 1 under vacuum for diffusion processing. InA17P wafer is InAl
P, InAl! GaP etc. are used. When phosphorus is added to a compound containing zinc and phosphorus that is a diffusion source, Z
n+P2, ZnP*, etc. plus P is used. This quartz tube ampoule was heated to 670 to 7
Heat at 50°C.

670°Cより低い温度で拡散処理をした場合はP  
 ′型の半導体層の形成は認められず、又750°Cよ
り高い温度で拡散処理をした場合はInAj7Pウェハ
ーにはじめから含まれている不純物の拡散やウェハー自
体の劣化等の問題か生じるので実用的なP層の形成か困
難である。
P if diffusion treatment is performed at a temperature lower than 670°C.
The formation of a ' type semiconductor layer is not observed, and if the diffusion treatment is performed at a temperature higher than 750°C, problems such as diffusion of impurities originally contained in the InAj7P wafer and deterioration of the wafer itself may occur, so it is not practical. It is difficult to form a typical P layer.

系内のリン圧力は拡散源の種類と量及び加熱温度て調整
することかでき、0.01〜3気圧か好ましい。第2図
はrnAlpnAl−を各種拡散条件にて拡散処理を施
したときのキャリア濃度と亜鉛拡散深さを示した図であ
る。リン圧力か0.01気圧より低いとウェハーからの
リンの蒸発か激しく、Znの拡散か速く、表面からの拡
散深さの制御が困難である。
The phosphorus pressure in the system can be adjusted by the type and amount of the diffusion source and the heating temperature, and is preferably 0.01 to 3 atm. FIG. 2 is a diagram showing carrier concentration and zinc diffusion depth when rnAlpnAl- is subjected to diffusion treatment under various diffusion conditions. If the phosphorus pressure is lower than 0.01 atm, phosphorus evaporates from the wafer rapidly, Zn diffuses quickly, and it is difficult to control the diffusion depth from the surface.

すなわち、第2図Aの曲線は670’Cか、リン圧力0
.001気圧で20分の拡散処理を行った場合のキャリ
ア濃度と亜鉛の拡散深さの関係であるか、亜鉛の拡散速
度は著しく遅く、また深さ方向のキャリア濃度の変化は
少なく、亜鉛の拡散プロファイルは急峻性に乏しいため
、制御性は低い。これに反し、たとえば670°C17
50’CテP圧力3気圧て20分間拡散処理したものは
拡散深さ1μmの位置でキャリア濃度か著しく低減し、
P層の深さを制御するのが容易である。
That is, the curve in Figure 2A is 670'C or 0 phosphorus pressure.
.. This may be due to the relationship between carrier concentration and zinc diffusion depth when diffusion treatment is performed at 0.001 atm for 20 minutes.The diffusion rate of zinc is extremely slow, and the change in carrier concentration in the depth direction is small. Since the profile is not steep, controllability is low. On the other hand, for example, 670°C17
For those subjected to diffusion treatment for 20 minutes at a pressure of 3 atm at 50'C, the carrier concentration was significantly reduced at a diffusion depth of 1 μm.
It is easy to control the depth of the P layer.

しかしなから、リン圧力を0.3気圧より高めた場合、
拡散後のウェハー上にリンの凝縮によると思われる表面
荒れか発生する。ウェハー表面の荒れは半導体デバイス
作成上致命的な問題である。
However, if the phosphorus pressure is increased above 0.3 atm,
After diffusion, surface roughness appears on the wafer, which is thought to be due to phosphorus condensation. Roughness of the wafer surface is a fatal problem in the production of semiconductor devices.

リンの蒸気圧はかなり高いために、拡散後、急冷した際
に石英管内壁に凝縮しきれずに、ウェハー上へ凝縮した
ものであり、表面荒れを防ぐためには、リンの圧力は0
.O1〜3気圧とすることか必要である。
The vapor pressure of phosphorus is quite high, so when it is rapidly cooled after diffusion, it does not completely condense on the inner wall of the quartz tube, but instead condenses on the wafer.To prevent surface roughening, the pressure of phosphorus must be set to zero.
.. It is necessary to set the pressure to 1 to 3 atmospheres.

この場合、石英アンプルを徐冷すると、ウェハー上にリ
ンの凝縮か起るので、急冷することか必要である。すな
わち、上述したような条件にて拡散処理した後、石英ア
ンプルを氷水ですばやく、好ましくは10秒以内に冷却
することが必要である。
In this case, if the quartz ampoule is slowly cooled, phosphorus will condense on the wafer, so it is necessary to cool it quickly. That is, after the diffusion treatment under the conditions described above, it is necessary to quickly cool the quartz ampoule with ice water, preferably within 10 seconds.

急冷の条件はアンプルの大きさすなわち、内容量によっ
ても異なるのでいちがいに決められないか極力すみやか
に冷却した方か好ましい。
Since the conditions for quenching vary depending on the size of the ampoule, that is, the content thereof, it is preferable to cool it as quickly as possible, or if it cannot be determined exactly.

(実施例、比較例) 以下に実施例、比較例をあげて本発明を具体的に説明す
る。
(Examples and Comparative Examples) The present invention will be specifically explained below by giving Examples and Comparative Examples.

〔実施例1〜7〕 第1図に示すように石英アンプル(10Mφ×60mm
)1内に拡散源2としてZn3P2+pを、ウェハー3
として、Ino、 sAz O,sP又はIno、 s
AI!0.25G0.2SP(9X 9 Xo、4 m
m )を入れて、2 X 10−’torrの真空中に
て真空封止した後、電気炉に入れて、第1表に示す条件
にて、拡散処理した。リンの圧力は拡散源として、仕込
むリンの量で調整した。急冷は拡散処理後、拡散源を入
れである石英アンプル部を氷水によって冷却した。その
結果、第1表に示す結果か得られた。
[Examples 1 to 7] As shown in Fig. 1, a quartz ampoule (10Mφ x 60mm
) 1 as a diffusion source 2, Zn3P2+p as a diffusion source 2, wafer 3
as Ino, sAz O,sP or Ino, s
AI! 0.25G0.2SP (9X 9Xo, 4m
m) and vacuum-sealed in a vacuum of 2 x 10-'torr, then placed in an electric furnace and subjected to diffusion treatment under the conditions shown in Table 1. The pressure of phosphorus was adjusted by the amount of phosphorus charged as a diffusion source. For rapid cooling, after the diffusion treatment, the quartz ampoule containing the diffusion source was cooled with ice water. As a result, the results shown in Table 1 were obtained.

このようにして得られたウェハーは表面状態か良好で、
P層の形成も問題なく良好でその厚さは1μm以下であ
った。そして、P層の急峻性も良好ですぐれており、半
導体レーザ素子として利用したとき、良好な特性を示し
た。
The wafer thus obtained has a good surface condition;
The formation of the P layer was also satisfactory and had a thickness of 1 μm or less. The steepness of the P layer was also good and excellent, and when used as a semiconductor laser device, it exhibited good characteristics.

尚、実施例3の拡散プロファイルは第2図中のBに相当
する。同様に実施例4はC1実施例5はDに相当する。
Note that the diffusion profile of Example 3 corresponds to B in FIG. Similarly, Example 4 corresponds to C and Example 5 corresponds to D.

〔比較例1〜7〕 実施例と同様に石英アンプル中に、拡散源としてZn3
P2+pを入れ、Ino、 5Ajl’ o、 sPウ
ェハーを入れて真空封止した後、電気炉に入れて、第2
表に示す条件にて拡散処理をした。急冷は実施例と同様
の方法で行ったか、徐冷は電気炉からとり出し、そのま
ま空中で放冷した。その結果、第2表に示す結果か得ら
れた。これらのものはウェハーの表面状態、P層形成、
P層厚さ、P層急峻性のいずれかか不良で半導体レーザ
素子として使用することはできなかった。
[Comparative Examples 1 to 7] Zn3 was added as a diffusion source in a quartz ampoule as in the example.
After putting P2+p, Ino, 5Ajl'o, and sP wafers and vacuum sealing, put it in an electric furnace and put it in the second
Diffusion treatment was performed under the conditions shown in the table. The rapid cooling was performed in the same manner as in Examples, or the slow cooling was performed by taking it out of the electric furnace and leaving it to cool in the air. As a result, the results shown in Table 2 were obtained. These factors include wafer surface condition, P layer formation,
It could not be used as a semiconductor laser device because either the thickness of the P layer or the steepness of the P layer was defective.

尚、比較例3の拡散プロファイルは第2図中のAに相当
する。
Incidentally, the diffusion profile of Comparative Example 3 corresponds to A in FIG.

(発明の効果) 本発明によればInl?P系半導体のP型半導体層を形
成する際に、P層深さの制御かしやすく、1μm程度の
極表面近傍にP型半導体層を形成することかでき、しか
も良好な表面状態のものを得′ることかてきる。この拡
散法によって得られたP型半導体を用いることによって
良好な半導体レーザ素子を得ることかできる。
(Effect of the invention) According to the invention, Inl? When forming a P-type semiconductor layer of a P-based semiconductor, the depth of the P layer can be easily controlled, the P-type semiconductor layer can be formed close to the extreme surface of about 1 μm, and the surface condition is good. You can get something out of it. By using a P-type semiconductor obtained by this diffusion method, a good semiconductor laser device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は拡散処理をするため、拡散源とウェハーを封入
した石英アンプルを示す。 1・・・石英アンプル 2・・・拡散源 3・・・ウェ
ハー第2図は[nAAPウェハーに拡散処理を施したと
きのキャリア濃度と亜鉛拡散深さの関係を示す。 A−Dは拡散処理条件(温度、リン圧力、時間)A:6
70°C,0,001気圧、20分B:  670”、
  0.3  〃、  20”C:  670”、  
3     、 20〃Dニア50”、  3   〃
、  20〃特 許 出 願 人  電気化学工業株式
会社第1図 第2図 亜鉛拡散深さ  (7,1m)
FIG. 1 shows a quartz ampoule containing a diffusion source and a wafer for the diffusion process. 1... Quartz ampoule 2... Diffusion source 3... Wafer FIG. 2 shows the relationship between carrier concentration and zinc diffusion depth when [nAAP wafer is subjected to diffusion treatment]. A-D are diffusion treatment conditions (temperature, phosphorus pressure, time) A:6
70°C, 0,001 atm, 20 minutes B: 670",
0.3〃, 20"C: 670",
3, 20〃D Near 50”, 3〃
, 20 Patent applicant Denki Kagaku Kogyo Co., Ltd. Figure 1 Figure 2 Zinc diffusion depth (7.1 m)

Claims (1)

【特許請求の範囲】[Claims] InAlP系の化合物半導体材料を高温に加熱して不純
物を拡散する方法において、拡散源として、亜鉛とリン
を含む化合物にリンを加えたものを用い、系内のリン圧
力を0.01〜3気圧とし、670〜750℃で加熱、
拡散処理後、急冷することを特徴とするInAlP系化
合物半導体への不純物拡散法。
In a method of diffusing impurities by heating InAlP-based compound semiconductor materials to high temperatures, a compound containing zinc and phosphorus plus phosphorus is used as a diffusion source, and the phosphorus pressure in the system is set to 0.01 to 3 atm. and heated at 670-750℃,
A method for diffusing impurities into an InAlP-based compound semiconductor, which is characterized by rapid cooling after diffusion treatment.
JP32410290A 1990-11-27 1990-11-27 Impurity diffusion into inalp compound semiconductor Pending JPH04192516A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32410290A JPH04192516A (en) 1990-11-27 1990-11-27 Impurity diffusion into inalp compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32410290A JPH04192516A (en) 1990-11-27 1990-11-27 Impurity diffusion into inalp compound semiconductor

Publications (1)

Publication Number Publication Date
JPH04192516A true JPH04192516A (en) 1992-07-10

Family

ID=18162185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32410290A Pending JPH04192516A (en) 1990-11-27 1990-11-27 Impurity diffusion into inalp compound semiconductor

Country Status (1)

Country Link
JP (1) JPH04192516A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2522786C2 (en) * 2012-05-28 2014-07-20 Открытое Акционерное Общество "Новосибирский Завод Полупроводниковых Приборов С Окб" (Оао"Нзпп С Окб") Quartz ampoule design for diffusion of dopants into silicon (arsenic diffusion) with built-in tool for controlling rate of post-diffusion cooling of silicon p-n structures
RU2538027C2 (en) * 2012-05-28 2015-01-10 Открытое акционерное общество "Новосибирский завод полупроводниковых приборов с ОКБ" (ОАО "НЗПП с ОКБ") Control and stabilisation of post diffusion (antinomy diffusion) cooling of low-voltage (~6 v) silicon planar structures of vrd and device to this end

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2522786C2 (en) * 2012-05-28 2014-07-20 Открытое Акционерное Общество "Новосибирский Завод Полупроводниковых Приборов С Окб" (Оао"Нзпп С Окб") Quartz ampoule design for diffusion of dopants into silicon (arsenic diffusion) with built-in tool for controlling rate of post-diffusion cooling of silicon p-n structures
RU2538027C2 (en) * 2012-05-28 2015-01-10 Открытое акционерное общество "Новосибирский завод полупроводниковых приборов с ОКБ" (ОАО "НЗПП с ОКБ") Control and stabilisation of post diffusion (antinomy diffusion) cooling of low-voltage (~6 v) silicon planar structures of vrd and device to this end

Similar Documents

Publication Publication Date Title
US4576652A (en) Incoherent light annealing of gallium arsenide substrate
US4115163A (en) Method of growing epitaxial semiconductor films utilizing radiant heating
Williams Ion implantation of semiconductors
US3751310A (en) Germanium doped epitaxial films by the molecular beam method
JPS62501320A (en) Semiconductor with shallow hyper-doped region and its processing method using implanted impurities
JPH05211128A (en) Method for manufacturing thin semiconductor material film
US3595716A (en) Method of manufacturing semiconductor devices
JPS6338859B2 (en)
US6555451B1 (en) Method for making shallow diffusion junctions in semiconductors using elemental doping
JPH0338756B2 (en)
US3210225A (en) Method of making transistor
JPH0684819A (en) Method for producing highly doped semiconductor material
JPH04192516A (en) Impurity diffusion into inalp compound semiconductor
US3546032A (en) Method of manufacturing semiconductor devices on substrates consisting of single crystals
US3490965A (en) Radiation resistant silicon semiconductor devices
EP0196155A2 (en) Method of forming an oxide film on a semiconductor substrate
US3215571A (en) Fabrication of semiconductor bodies
US5874352A (en) Method of producing MIS transistors having a gate electrode of matched conductivity type
JPS60239400A (en) Annealing method for compound semiconductors
JPH0376129A (en) Manufacture of electronic device using boron nitride
US3718503A (en) Method of forming a diffusion mask barrier on a silicon substrate
US3096219A (en) Semiconductor devices
JPH05117088A (en) Method for forming diamond n-type and p-type
JPS60239030A (en) Annealing method of compound semiconductor
US3796614A (en) Method for controlling intermetallic semiconductor diffusions